xref: /linux/drivers/crypto/nx/nx.c (revision fc4bd01d9ff592f620c499686245c093440db0e8)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Routines supporting the Power 7+ Nest Accelerators driver
4  *
5  * Copyright (C) 2011-2012 International Business Machines Inc.
6  *
7  * Author: Kent Yoder <yoder1@us.ibm.com>
8  */
9 
10 #include <crypto/internal/aead.h>
11 #include <crypto/internal/hash.h>
12 #include <crypto/aes.h>
13 #include <crypto/sha2.h>
14 #include <crypto/algapi.h>
15 #include <crypto/scatterwalk.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/types.h>
19 #include <linux/mm.h>
20 #include <linux/scatterlist.h>
21 #include <linux/device.h>
22 #include <linux/of.h>
23 #include <asm/hvcall.h>
24 #include <asm/vio.h>
25 
26 #include "nx_csbcpb.h"
27 #include "nx.h"
28 
29 
30 /**
31  * nx_hcall_sync - make an H_COP_OP hcall for the passed in op structure
32  *
33  * @nx_ctx: the crypto context handle
34  * @op: PFO operation struct to pass in
35  * @may_sleep: flag indicating the request can sleep
36  *
37  * Make the hcall, retrying while the hardware is busy. If we cannot yield
38  * the thread, limit the number of retries to 10 here.
39  */
40 int nx_hcall_sync(struct nx_crypto_ctx *nx_ctx,
41 		  struct vio_pfo_op    *op,
42 		  u32                   may_sleep)
43 {
44 	int rc, retries = 10;
45 	struct vio_dev *viodev = nx_driver.viodev;
46 
47 	atomic_inc(&(nx_ctx->stats->sync_ops));
48 
49 	do {
50 		rc = vio_h_cop_sync(viodev, op);
51 	} while (rc == -EBUSY && !may_sleep && retries--);
52 
53 	if (rc) {
54 		dev_dbg(&viodev->dev, "vio_h_cop_sync failed: rc: %d "
55 			"hcall rc: %ld\n", rc, op->hcall_err);
56 		atomic_inc(&(nx_ctx->stats->errors));
57 		atomic_set(&(nx_ctx->stats->last_error), op->hcall_err);
58 		atomic_set(&(nx_ctx->stats->last_error_pid), current->pid);
59 	}
60 
61 	return rc;
62 }
63 
64 /**
65  * nx_build_sg_list - build an NX scatter list describing a single  buffer
66  *
67  * @sg_head: pointer to the first scatter list element to build
68  * @start_addr: pointer to the linear buffer
69  * @len: length of the data at @start_addr
70  * @sgmax: the largest number of scatter list elements we're allowed to create
71  *
72  * This function will start writing nx_sg elements at @sg_head and keep
73  * writing them until all of the data from @start_addr is described or
74  * until sgmax elements have been written. Scatter list elements will be
75  * created such that none of the elements describes a buffer that crosses a 4K
76  * boundary.
77  */
78 struct nx_sg *nx_build_sg_list(struct nx_sg *sg_head,
79 			       u8           *start_addr,
80 			       unsigned int *len,
81 			       u32           sgmax)
82 {
83 	unsigned int sg_len = 0;
84 	struct nx_sg *sg;
85 	u64 sg_addr = (u64)start_addr;
86 	u64 end_addr;
87 
88 	/* determine the start and end for this address range - slightly
89 	 * different if this is in VMALLOC_REGION */
90 	if (is_vmalloc_addr(start_addr))
91 		sg_addr = page_to_phys(vmalloc_to_page(start_addr))
92 			  + offset_in_page(sg_addr);
93 	else
94 		sg_addr = __pa(sg_addr);
95 
96 	end_addr = sg_addr + *len;
97 
98 	/* each iteration will write one struct nx_sg element and add the
99 	 * length of data described by that element to sg_len. Once @len bytes
100 	 * have been described (or @sgmax elements have been written), the
101 	 * loop ends. min_t is used to ensure @end_addr falls on the same page
102 	 * as sg_addr, if not, we need to create another nx_sg element for the
103 	 * data on the next page.
104 	 *
105 	 * Also when using vmalloc'ed data, every time that a system page
106 	 * boundary is crossed the physical address needs to be re-calculated.
107 	 */
108 	for (sg = sg_head; sg_len < *len; sg++) {
109 		u64 next_page;
110 
111 		sg->addr = sg_addr;
112 		sg_addr = min_t(u64, NX_PAGE_NUM(sg_addr + NX_PAGE_SIZE),
113 				end_addr);
114 
115 		next_page = (sg->addr & PAGE_MASK) + PAGE_SIZE;
116 		sg->len = min_t(u64, sg_addr, next_page) - sg->addr;
117 		sg_len += sg->len;
118 
119 		if (sg_addr >= next_page &&
120 				is_vmalloc_addr(start_addr + sg_len)) {
121 			sg_addr = page_to_phys(vmalloc_to_page(
122 						start_addr + sg_len));
123 			end_addr = sg_addr + *len - sg_len;
124 		}
125 
126 		if ((sg - sg_head) == sgmax) {
127 			pr_err("nx: scatter/gather list overflow, pid: %d\n",
128 			       current->pid);
129 			sg++;
130 			break;
131 		}
132 	}
133 	*len = sg_len;
134 
135 	/* return the moved sg_head pointer */
136 	return sg;
137 }
138 
139 /**
140  * nx_walk_and_build - walk a linux scatterlist and build an nx scatterlist
141  *
142  * @nx_dst: pointer to the first nx_sg element to write
143  * @sglen: max number of nx_sg entries we're allowed to write
144  * @sg_src: pointer to the source linux scatterlist to walk
145  * @start: number of bytes to fast-forward past at the beginning of @sg_src
146  * @src_len: number of bytes to walk in @sg_src
147  */
148 struct nx_sg *nx_walk_and_build(struct nx_sg       *nx_dst,
149 				unsigned int        sglen,
150 				struct scatterlist *sg_src,
151 				unsigned int        start,
152 				unsigned int       *src_len)
153 {
154 	struct scatter_walk walk;
155 	struct nx_sg *nx_sg = nx_dst;
156 	unsigned int n, len = *src_len;
157 	char *dst;
158 
159 	/* we need to fast forward through @start bytes first */
160 	scatterwalk_start_at_pos(&walk, sg_src, start);
161 
162 	while (len && (nx_sg - nx_dst) < sglen) {
163 		dst = scatterwalk_next(&walk, len, &n);
164 
165 		nx_sg = nx_build_sg_list(nx_sg, dst, &n, sglen - (nx_sg - nx_dst));
166 
167 		scatterwalk_done_src(&walk, dst, n);
168 		len -= n;
169 	}
170 	/* update to_process */
171 	*src_len -= len;
172 
173 	/* return the moved destination pointer */
174 	return nx_sg;
175 }
176 
177 /**
178  * trim_sg_list - ensures the bound in sg list.
179  * @sg: sg list head
180  * @end: sg lisg end
181  * @delta:  is the amount we need to crop in order to bound the list.
182  * @nbytes: length of data in the scatterlists or data length - whichever
183  *          is greater.
184  */
185 static long int trim_sg_list(struct nx_sg *sg,
186 			     struct nx_sg *end,
187 			     unsigned int delta,
188 			     unsigned int *nbytes)
189 {
190 	long int oplen;
191 	long int data_back;
192 	unsigned int is_delta = delta;
193 
194 	while (delta && end > sg) {
195 		struct nx_sg *last = end - 1;
196 
197 		if (last->len > delta) {
198 			last->len -= delta;
199 			delta = 0;
200 		} else {
201 			end--;
202 			delta -= last->len;
203 		}
204 	}
205 
206 	/* There are cases where we need to crop list in order to make it
207 	 * a block size multiple, but we also need to align data. In order to
208 	 * that we need to calculate how much we need to put back to be
209 	 * processed
210 	 */
211 	oplen = (sg - end) * sizeof(struct nx_sg);
212 	if (is_delta) {
213 		data_back = (abs(oplen) / AES_BLOCK_SIZE) *  sg->len;
214 		data_back = *nbytes - (data_back & ~(AES_BLOCK_SIZE - 1));
215 		*nbytes -= data_back;
216 	}
217 
218 	return oplen;
219 }
220 
221 /**
222  * nx_build_sg_lists - walk the input scatterlists and build arrays of NX
223  *                     scatterlists based on them.
224  *
225  * @nx_ctx: NX crypto context for the lists we're building
226  * @iv: iv data, if the algorithm requires it
227  * @dst: destination scatterlist
228  * @src: source scatterlist
229  * @nbytes: length of data described in the scatterlists
230  * @offset: number of bytes to fast-forward past at the beginning of
231  *          scatterlists.
232  * @oiv: destination for the iv data, if the algorithm requires it
233  *
234  * This is common code shared by all the AES algorithms. It uses the crypto
235  * scatterlist walk routines to traverse input and output scatterlists, building
236  * corresponding NX scatterlists
237  */
238 int nx_build_sg_lists(struct nx_crypto_ctx  *nx_ctx,
239 		      const u8              *iv,
240 		      struct scatterlist    *dst,
241 		      struct scatterlist    *src,
242 		      unsigned int          *nbytes,
243 		      unsigned int           offset,
244 		      u8                    *oiv)
245 {
246 	unsigned int delta = 0;
247 	unsigned int total = *nbytes;
248 	struct nx_sg *nx_insg = nx_ctx->in_sg;
249 	struct nx_sg *nx_outsg = nx_ctx->out_sg;
250 	unsigned int max_sg_len;
251 
252 	max_sg_len = min_t(u64, nx_ctx->ap->sglen,
253 			nx_driver.of.max_sg_len/sizeof(struct nx_sg));
254 	max_sg_len = min_t(u64, max_sg_len,
255 			nx_ctx->ap->databytelen/NX_PAGE_SIZE);
256 
257 	if (oiv)
258 		memcpy(oiv, iv, AES_BLOCK_SIZE);
259 
260 	*nbytes = min_t(u64, *nbytes, nx_ctx->ap->databytelen);
261 
262 	nx_outsg = nx_walk_and_build(nx_outsg, max_sg_len, dst,
263 					offset, nbytes);
264 	nx_insg = nx_walk_and_build(nx_insg, max_sg_len, src,
265 					offset, nbytes);
266 
267 	if (*nbytes < total)
268 		delta = *nbytes - (*nbytes & ~(AES_BLOCK_SIZE - 1));
269 
270 	/* these lengths should be negative, which will indicate to phyp that
271 	 * the input and output parameters are scatterlists, not linear
272 	 * buffers */
273 	nx_ctx->op.inlen = trim_sg_list(nx_ctx->in_sg, nx_insg, delta, nbytes);
274 	nx_ctx->op.outlen = trim_sg_list(nx_ctx->out_sg, nx_outsg, delta, nbytes);
275 
276 	return 0;
277 }
278 
279 /**
280  * nx_ctx_init - initialize an nx_ctx's vio_pfo_op struct
281  *
282  * @nx_ctx: the nx context to initialize
283  * @function: the function code for the op
284  */
285 void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function)
286 {
287 	spin_lock_init(&nx_ctx->lock);
288 	memset(nx_ctx->kmem, 0, nx_ctx->kmem_len);
289 	nx_ctx->csbcpb->csb.valid |= NX_CSB_VALID_BIT;
290 
291 	nx_ctx->op.flags = function;
292 	nx_ctx->op.csbcpb = __pa(nx_ctx->csbcpb);
293 	nx_ctx->op.in = __pa(nx_ctx->in_sg);
294 	nx_ctx->op.out = __pa(nx_ctx->out_sg);
295 
296 	if (nx_ctx->csbcpb_aead) {
297 		nx_ctx->csbcpb_aead->csb.valid |= NX_CSB_VALID_BIT;
298 
299 		nx_ctx->op_aead.flags = function;
300 		nx_ctx->op_aead.csbcpb = __pa(nx_ctx->csbcpb_aead);
301 		nx_ctx->op_aead.in = __pa(nx_ctx->in_sg);
302 		nx_ctx->op_aead.out = __pa(nx_ctx->out_sg);
303 	}
304 }
305 
306 static void nx_of_update_status(struct device   *dev,
307 			       struct property *p,
308 			       struct nx_of    *props)
309 {
310 	if (!strncmp(p->value, "okay", p->length)) {
311 		props->status = NX_WAITING;
312 		props->flags |= NX_OF_FLAG_STATUS_SET;
313 	} else {
314 		dev_info(dev, "%s: status '%s' is not 'okay'\n", __func__,
315 			 (char *)p->value);
316 	}
317 }
318 
319 static void nx_of_update_sglen(struct device   *dev,
320 			       struct property *p,
321 			       struct nx_of    *props)
322 {
323 	if (p->length != sizeof(props->max_sg_len)) {
324 		dev_err(dev, "%s: unexpected format for "
325 			"ibm,max-sg-len property\n", __func__);
326 		dev_dbg(dev, "%s: ibm,max-sg-len is %d bytes "
327 			"long, expected %zd bytes\n", __func__,
328 			p->length, sizeof(props->max_sg_len));
329 		return;
330 	}
331 
332 	props->max_sg_len = *(u32 *)p->value;
333 	props->flags |= NX_OF_FLAG_MAXSGLEN_SET;
334 }
335 
336 static void nx_of_update_msc(struct device   *dev,
337 			     struct property *p,
338 			     struct nx_of    *props)
339 {
340 	struct msc_triplet *trip;
341 	struct max_sync_cop *msc;
342 	unsigned int bytes_so_far, i, lenp;
343 
344 	msc = (struct max_sync_cop *)p->value;
345 	lenp = p->length;
346 
347 	/* You can't tell if the data read in for this property is sane by its
348 	 * size alone. This is because there are sizes embedded in the data
349 	 * structure. The best we can do is check lengths as we parse and bail
350 	 * as soon as a length error is detected. */
351 	bytes_so_far = 0;
352 
353 	while ((bytes_so_far + sizeof(struct max_sync_cop)) <= lenp) {
354 		bytes_so_far += sizeof(struct max_sync_cop);
355 
356 		trip = msc->trip;
357 
358 		for (i = 0;
359 		     ((bytes_so_far + sizeof(struct msc_triplet)) <= lenp) &&
360 		     i < msc->triplets;
361 		     i++) {
362 			if (msc->fc >= NX_MAX_FC || msc->mode >= NX_MAX_MODE) {
363 				dev_err(dev, "unknown function code/mode "
364 					"combo: %d/%d (ignored)\n", msc->fc,
365 					msc->mode);
366 				goto next_loop;
367 			}
368 
369 			if (!trip->sglen || trip->databytelen < NX_PAGE_SIZE) {
370 				dev_warn(dev, "bogus sglen/databytelen: "
371 					 "%u/%u (ignored)\n", trip->sglen,
372 					 trip->databytelen);
373 				goto next_loop;
374 			}
375 
376 			switch (trip->keybitlen) {
377 			case 128:
378 			case 160:
379 				props->ap[msc->fc][msc->mode][0].databytelen =
380 					trip->databytelen;
381 				props->ap[msc->fc][msc->mode][0].sglen =
382 					trip->sglen;
383 				break;
384 			case 192:
385 				props->ap[msc->fc][msc->mode][1].databytelen =
386 					trip->databytelen;
387 				props->ap[msc->fc][msc->mode][1].sglen =
388 					trip->sglen;
389 				break;
390 			case 256:
391 				if (msc->fc == NX_FC_AES) {
392 					props->ap[msc->fc][msc->mode][2].
393 						databytelen = trip->databytelen;
394 					props->ap[msc->fc][msc->mode][2].sglen =
395 						trip->sglen;
396 				} else if (msc->fc == NX_FC_AES_HMAC ||
397 					   msc->fc == NX_FC_SHA) {
398 					props->ap[msc->fc][msc->mode][1].
399 						databytelen = trip->databytelen;
400 					props->ap[msc->fc][msc->mode][1].sglen =
401 						trip->sglen;
402 				} else {
403 					dev_warn(dev, "unknown function "
404 						"code/key bit len combo"
405 						": (%u/256)\n", msc->fc);
406 				}
407 				break;
408 			case 512:
409 				props->ap[msc->fc][msc->mode][2].databytelen =
410 					trip->databytelen;
411 				props->ap[msc->fc][msc->mode][2].sglen =
412 					trip->sglen;
413 				break;
414 			default:
415 				dev_warn(dev, "unknown function code/key bit "
416 					 "len combo: (%u/%u)\n", msc->fc,
417 					 trip->keybitlen);
418 				break;
419 			}
420 next_loop:
421 			bytes_so_far += sizeof(struct msc_triplet);
422 			trip++;
423 		}
424 
425 		msc = (struct max_sync_cop *)trip;
426 	}
427 
428 	props->flags |= NX_OF_FLAG_MAXSYNCCOP_SET;
429 }
430 
431 /**
432  * nx_of_init - read openFirmware values from the device tree
433  *
434  * @dev: device handle
435  * @props: pointer to struct to hold the properties values
436  *
437  * Called once at driver probe time, this function will read out the
438  * openFirmware properties we use at runtime. If all the OF properties are
439  * acceptable, when we exit this function props->flags will indicate that
440  * we're ready to register our crypto algorithms.
441  */
442 static void nx_of_init(struct device *dev, struct nx_of *props)
443 {
444 	struct device_node *base_node = dev->of_node;
445 	struct property *p;
446 
447 	p = of_find_property(base_node, "status", NULL);
448 	if (!p)
449 		dev_info(dev, "%s: property 'status' not found\n", __func__);
450 	else
451 		nx_of_update_status(dev, p, props);
452 
453 	p = of_find_property(base_node, "ibm,max-sg-len", NULL);
454 	if (!p)
455 		dev_info(dev, "%s: property 'ibm,max-sg-len' not found\n",
456 			 __func__);
457 	else
458 		nx_of_update_sglen(dev, p, props);
459 
460 	p = of_find_property(base_node, "ibm,max-sync-cop", NULL);
461 	if (!p)
462 		dev_info(dev, "%s: property 'ibm,max-sync-cop' not found\n",
463 			 __func__);
464 	else
465 		nx_of_update_msc(dev, p, props);
466 }
467 
468 static bool nx_check_prop(struct device *dev, u32 fc, u32 mode, int slot)
469 {
470 	struct alg_props *props = &nx_driver.of.ap[fc][mode][slot];
471 
472 	if (!props->sglen || props->databytelen < NX_PAGE_SIZE) {
473 		if (dev)
474 			dev_warn(dev, "bogus sglen/databytelen for %u/%u/%u: "
475 				 "%u/%u (ignored)\n", fc, mode, slot,
476 				 props->sglen, props->databytelen);
477 		return false;
478 	}
479 
480 	return true;
481 }
482 
483 static bool nx_check_props(struct device *dev, u32 fc, u32 mode)
484 {
485 	int i;
486 
487 	for (i = 0; i < 3; i++)
488 		if (!nx_check_prop(dev, fc, mode, i))
489 			return false;
490 
491 	return true;
492 }
493 
494 static int nx_register_skcipher(struct skcipher_alg *alg, u32 fc, u32 mode)
495 {
496 	return nx_check_props(&nx_driver.viodev->dev, fc, mode) ?
497 	       crypto_register_skcipher(alg) : 0;
498 }
499 
500 static int nx_register_aead(struct aead_alg *alg, u32 fc, u32 mode)
501 {
502 	return nx_check_props(&nx_driver.viodev->dev, fc, mode) ?
503 	       crypto_register_aead(alg) : 0;
504 }
505 
506 static int nx_register_shash(struct shash_alg *alg, u32 fc, u32 mode, int slot)
507 {
508 	return (slot >= 0 ? nx_check_prop(&nx_driver.viodev->dev,
509 					  fc, mode, slot) :
510 			    nx_check_props(&nx_driver.viodev->dev, fc, mode)) ?
511 	       crypto_register_shash(alg) : 0;
512 }
513 
514 static void nx_unregister_skcipher(struct skcipher_alg *alg, u32 fc, u32 mode)
515 {
516 	if (nx_check_props(NULL, fc, mode))
517 		crypto_unregister_skcipher(alg);
518 }
519 
520 static void nx_unregister_aead(struct aead_alg *alg, u32 fc, u32 mode)
521 {
522 	if (nx_check_props(NULL, fc, mode))
523 		crypto_unregister_aead(alg);
524 }
525 
526 static void nx_unregister_shash(struct shash_alg *alg, u32 fc, u32 mode,
527 				int slot)
528 {
529 	if (slot >= 0 ? nx_check_prop(NULL, fc, mode, slot) :
530 			nx_check_props(NULL, fc, mode))
531 		crypto_unregister_shash(alg);
532 }
533 
534 /**
535  * nx_register_algs - register algorithms with the crypto API
536  *
537  * Called from nx_probe()
538  *
539  * If all OF properties are in an acceptable state, the driver flags will
540  * indicate that we're ready and we'll create our debugfs files and register
541  * out crypto algorithms.
542  */
543 static int nx_register_algs(void)
544 {
545 	int rc = -1;
546 
547 	if (nx_driver.of.flags != NX_OF_FLAG_MASK_READY)
548 		goto out;
549 
550 	memset(&nx_driver.stats, 0, sizeof(struct nx_stats));
551 
552 	NX_DEBUGFS_INIT(&nx_driver);
553 
554 	nx_driver.of.status = NX_OKAY;
555 
556 	rc = nx_register_skcipher(&nx_ecb_aes_alg, NX_FC_AES, NX_MODE_AES_ECB);
557 	if (rc)
558 		goto out;
559 
560 	rc = nx_register_skcipher(&nx_cbc_aes_alg, NX_FC_AES, NX_MODE_AES_CBC);
561 	if (rc)
562 		goto out_unreg_ecb;
563 
564 	rc = nx_register_skcipher(&nx_ctr3686_aes_alg, NX_FC_AES,
565 				  NX_MODE_AES_CTR);
566 	if (rc)
567 		goto out_unreg_cbc;
568 
569 	rc = nx_register_aead(&nx_gcm_aes_alg, NX_FC_AES, NX_MODE_AES_GCM);
570 	if (rc)
571 		goto out_unreg_ctr3686;
572 
573 	rc = nx_register_aead(&nx_gcm4106_aes_alg, NX_FC_AES, NX_MODE_AES_GCM);
574 	if (rc)
575 		goto out_unreg_gcm;
576 
577 	rc = nx_register_aead(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
578 	if (rc)
579 		goto out_unreg_gcm4106;
580 
581 	rc = nx_register_aead(&nx_ccm4309_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
582 	if (rc)
583 		goto out_unreg_ccm;
584 
585 	rc = nx_register_shash(&nx_shash_sha256_alg, NX_FC_SHA, NX_MODE_SHA,
586 			       NX_PROPS_SHA256);
587 	if (rc)
588 		goto out_unreg_ccm4309;
589 
590 	rc = nx_register_shash(&nx_shash_sha512_alg, NX_FC_SHA, NX_MODE_SHA,
591 			       NX_PROPS_SHA512);
592 	if (rc)
593 		goto out_unreg_s256;
594 
595 	rc = nx_register_shash(&nx_shash_aes_xcbc_alg,
596 			       NX_FC_AES, NX_MODE_AES_XCBC_MAC, -1);
597 	if (rc)
598 		goto out_unreg_s512;
599 
600 	goto out;
601 
602 out_unreg_s512:
603 	nx_unregister_shash(&nx_shash_sha512_alg, NX_FC_SHA, NX_MODE_SHA,
604 			    NX_PROPS_SHA512);
605 out_unreg_s256:
606 	nx_unregister_shash(&nx_shash_sha256_alg, NX_FC_SHA, NX_MODE_SHA,
607 			    NX_PROPS_SHA256);
608 out_unreg_ccm4309:
609 	nx_unregister_aead(&nx_ccm4309_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
610 out_unreg_ccm:
611 	nx_unregister_aead(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
612 out_unreg_gcm4106:
613 	nx_unregister_aead(&nx_gcm4106_aes_alg, NX_FC_AES, NX_MODE_AES_GCM);
614 out_unreg_gcm:
615 	nx_unregister_aead(&nx_gcm_aes_alg, NX_FC_AES, NX_MODE_AES_GCM);
616 out_unreg_ctr3686:
617 	nx_unregister_skcipher(&nx_ctr3686_aes_alg, NX_FC_AES, NX_MODE_AES_CTR);
618 out_unreg_cbc:
619 	nx_unregister_skcipher(&nx_cbc_aes_alg, NX_FC_AES, NX_MODE_AES_CBC);
620 out_unreg_ecb:
621 	nx_unregister_skcipher(&nx_ecb_aes_alg, NX_FC_AES, NX_MODE_AES_ECB);
622 out:
623 	return rc;
624 }
625 
626 /**
627  * nx_crypto_ctx_init - create and initialize a crypto api context
628  *
629  * @nx_ctx: the crypto api context
630  * @fc: function code for the context
631  * @mode: the function code specific mode for this context
632  */
633 static int nx_crypto_ctx_init(struct nx_crypto_ctx *nx_ctx, u32 fc, u32 mode)
634 {
635 	if (nx_driver.of.status != NX_OKAY) {
636 		pr_err("Attempt to initialize NX crypto context while device "
637 		       "is not available!\n");
638 		return -ENODEV;
639 	}
640 
641 	/* we need an extra page for csbcpb_aead for these modes */
642 	if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)
643 		nx_ctx->kmem_len = (5 * NX_PAGE_SIZE) +
644 				   sizeof(struct nx_csbcpb);
645 	else
646 		nx_ctx->kmem_len = (4 * NX_PAGE_SIZE) +
647 				   sizeof(struct nx_csbcpb);
648 
649 	nx_ctx->kmem = kmalloc(nx_ctx->kmem_len, GFP_KERNEL);
650 	if (!nx_ctx->kmem)
651 		return -ENOMEM;
652 
653 	/* the csbcpb and scatterlists must be 4K aligned pages */
654 	nx_ctx->csbcpb = (struct nx_csbcpb *)(round_up((u64)nx_ctx->kmem,
655 						       (u64)NX_PAGE_SIZE));
656 	nx_ctx->in_sg = (struct nx_sg *)((u8 *)nx_ctx->csbcpb + NX_PAGE_SIZE);
657 	nx_ctx->out_sg = (struct nx_sg *)((u8 *)nx_ctx->in_sg + NX_PAGE_SIZE);
658 
659 	if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)
660 		nx_ctx->csbcpb_aead =
661 			(struct nx_csbcpb *)((u8 *)nx_ctx->out_sg +
662 					     NX_PAGE_SIZE);
663 
664 	/* give each context a pointer to global stats and their OF
665 	 * properties */
666 	nx_ctx->stats = &nx_driver.stats;
667 	memcpy(nx_ctx->props, nx_driver.of.ap[fc][mode],
668 	       sizeof(struct alg_props) * 3);
669 
670 	return 0;
671 }
672 
673 /* entry points from the crypto tfm initializers */
674 int nx_crypto_ctx_aes_ccm_init(struct crypto_aead *tfm)
675 {
676 	crypto_aead_set_reqsize(tfm, sizeof(struct nx_ccm_rctx));
677 	return nx_crypto_ctx_init(crypto_aead_ctx(tfm), NX_FC_AES,
678 				  NX_MODE_AES_CCM);
679 }
680 
681 int nx_crypto_ctx_aes_gcm_init(struct crypto_aead *tfm)
682 {
683 	crypto_aead_set_reqsize(tfm, sizeof(struct nx_gcm_rctx));
684 	return nx_crypto_ctx_init(crypto_aead_ctx(tfm), NX_FC_AES,
685 				  NX_MODE_AES_GCM);
686 }
687 
688 int nx_crypto_ctx_aes_ctr_init(struct crypto_skcipher *tfm)
689 {
690 	return nx_crypto_ctx_init(crypto_skcipher_ctx(tfm), NX_FC_AES,
691 				  NX_MODE_AES_CTR);
692 }
693 
694 int nx_crypto_ctx_aes_cbc_init(struct crypto_skcipher *tfm)
695 {
696 	return nx_crypto_ctx_init(crypto_skcipher_ctx(tfm), NX_FC_AES,
697 				  NX_MODE_AES_CBC);
698 }
699 
700 int nx_crypto_ctx_aes_ecb_init(struct crypto_skcipher *tfm)
701 {
702 	return nx_crypto_ctx_init(crypto_skcipher_ctx(tfm), NX_FC_AES,
703 				  NX_MODE_AES_ECB);
704 }
705 
706 int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm)
707 {
708 	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_SHA, NX_MODE_SHA);
709 }
710 
711 int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm)
712 {
713 	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
714 				  NX_MODE_AES_XCBC_MAC);
715 }
716 
717 /**
718  * nx_crypto_ctx_exit - destroy a crypto api context
719  *
720  * @tfm: the crypto transform pointer for the context
721  *
722  * As crypto API contexts are destroyed, this exit hook is called to free the
723  * memory associated with it.
724  */
725 void nx_crypto_ctx_exit(struct crypto_tfm *tfm)
726 {
727 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
728 
729 	kfree_sensitive(nx_ctx->kmem);
730 	nx_ctx->csbcpb = NULL;
731 	nx_ctx->csbcpb_aead = NULL;
732 	nx_ctx->in_sg = NULL;
733 	nx_ctx->out_sg = NULL;
734 }
735 
736 void nx_crypto_ctx_skcipher_exit(struct crypto_skcipher *tfm)
737 {
738 	nx_crypto_ctx_exit(crypto_skcipher_ctx(tfm));
739 }
740 
741 void nx_crypto_ctx_aead_exit(struct crypto_aead *tfm)
742 {
743 	struct nx_crypto_ctx *nx_ctx = crypto_aead_ctx(tfm);
744 
745 	kfree_sensitive(nx_ctx->kmem);
746 }
747 
748 static int nx_probe(struct vio_dev *viodev, const struct vio_device_id *id)
749 {
750 	dev_dbg(&viodev->dev, "driver probed: %s resource id: 0x%x\n",
751 		viodev->name, viodev->resource_id);
752 
753 	if (nx_driver.viodev) {
754 		dev_err(&viodev->dev, "%s: Attempt to register more than one "
755 			"instance of the hardware\n", __func__);
756 		return -EINVAL;
757 	}
758 
759 	nx_driver.viodev = viodev;
760 
761 	nx_of_init(&viodev->dev, &nx_driver.of);
762 
763 	return nx_register_algs();
764 }
765 
766 static void nx_remove(struct vio_dev *viodev)
767 {
768 	dev_dbg(&viodev->dev, "entering nx_remove for UA 0x%x\n",
769 		viodev->unit_address);
770 
771 	if (nx_driver.of.status == NX_OKAY) {
772 		NX_DEBUGFS_FINI(&nx_driver);
773 
774 		nx_unregister_shash(&nx_shash_aes_xcbc_alg,
775 				    NX_FC_AES, NX_MODE_AES_XCBC_MAC, -1);
776 		nx_unregister_shash(&nx_shash_sha512_alg,
777 				    NX_FC_SHA, NX_MODE_SHA, NX_PROPS_SHA256);
778 		nx_unregister_shash(&nx_shash_sha256_alg,
779 				    NX_FC_SHA, NX_MODE_SHA, NX_PROPS_SHA512);
780 		nx_unregister_aead(&nx_ccm4309_aes_alg,
781 				   NX_FC_AES, NX_MODE_AES_CCM);
782 		nx_unregister_aead(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM);
783 		nx_unregister_aead(&nx_gcm4106_aes_alg,
784 				   NX_FC_AES, NX_MODE_AES_GCM);
785 		nx_unregister_aead(&nx_gcm_aes_alg,
786 				   NX_FC_AES, NX_MODE_AES_GCM);
787 		nx_unregister_skcipher(&nx_ctr3686_aes_alg,
788 				       NX_FC_AES, NX_MODE_AES_CTR);
789 		nx_unregister_skcipher(&nx_cbc_aes_alg, NX_FC_AES,
790 				       NX_MODE_AES_CBC);
791 		nx_unregister_skcipher(&nx_ecb_aes_alg, NX_FC_AES,
792 				       NX_MODE_AES_ECB);
793 	}
794 }
795 
796 
797 /* module wide initialization/cleanup */
798 static int __init nx_init(void)
799 {
800 	return vio_register_driver(&nx_driver.viodriver);
801 }
802 
803 static void __exit nx_fini(void)
804 {
805 	vio_unregister_driver(&nx_driver.viodriver);
806 }
807 
808 static const struct vio_device_id nx_crypto_driver_ids[] = {
809 	{ "ibm,sym-encryption-v1", "ibm,sym-encryption" },
810 	{ "", "" }
811 };
812 MODULE_DEVICE_TABLE(vio, nx_crypto_driver_ids);
813 
814 /* driver state structure */
815 struct nx_crypto_driver nx_driver = {
816 	.viodriver = {
817 		.id_table = nx_crypto_driver_ids,
818 		.probe = nx_probe,
819 		.remove = nx_remove,
820 		.name  = NX_NAME,
821 	},
822 };
823 
824 module_init(nx_init);
825 module_exit(nx_fini);
826 
827 MODULE_AUTHOR("Kent Yoder <yoder1@us.ibm.com>");
828 MODULE_DESCRIPTION(NX_STRING);
829 MODULE_LICENSE("GPL");
830 MODULE_VERSION(NX_VERSION);
831