1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Routines supporting the Power 7+ Nest Accelerators driver 4 * 5 * Copyright (C) 2011-2012 International Business Machines Inc. 6 * 7 * Author: Kent Yoder <yoder1@us.ibm.com> 8 */ 9 10 #include <crypto/internal/aead.h> 11 #include <crypto/internal/hash.h> 12 #include <crypto/aes.h> 13 #include <crypto/sha2.h> 14 #include <crypto/algapi.h> 15 #include <crypto/scatterwalk.h> 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <linux/types.h> 19 #include <linux/mm.h> 20 #include <linux/scatterlist.h> 21 #include <linux/device.h> 22 #include <linux/of.h> 23 #include <asm/hvcall.h> 24 #include <asm/vio.h> 25 26 #include "nx_csbcpb.h" 27 #include "nx.h" 28 29 30 /** 31 * nx_hcall_sync - make an H_COP_OP hcall for the passed in op structure 32 * 33 * @nx_ctx: the crypto context handle 34 * @op: PFO operation struct to pass in 35 * @may_sleep: flag indicating the request can sleep 36 * 37 * Make the hcall, retrying while the hardware is busy. If we cannot yield 38 * the thread, limit the number of retries to 10 here. 39 */ 40 int nx_hcall_sync(struct nx_crypto_ctx *nx_ctx, 41 struct vio_pfo_op *op, 42 u32 may_sleep) 43 { 44 int rc, retries = 10; 45 struct vio_dev *viodev = nx_driver.viodev; 46 47 atomic_inc(&(nx_ctx->stats->sync_ops)); 48 49 do { 50 rc = vio_h_cop_sync(viodev, op); 51 } while (rc == -EBUSY && !may_sleep && retries--); 52 53 if (rc) { 54 dev_dbg(&viodev->dev, "vio_h_cop_sync failed: rc: %d " 55 "hcall rc: %ld\n", rc, op->hcall_err); 56 atomic_inc(&(nx_ctx->stats->errors)); 57 atomic_set(&(nx_ctx->stats->last_error), op->hcall_err); 58 atomic_set(&(nx_ctx->stats->last_error_pid), current->pid); 59 } 60 61 return rc; 62 } 63 64 /** 65 * nx_build_sg_list - build an NX scatter list describing a single buffer 66 * 67 * @sg_head: pointer to the first scatter list element to build 68 * @start_addr: pointer to the linear buffer 69 * @len: length of the data at @start_addr 70 * @sgmax: the largest number of scatter list elements we're allowed to create 71 * 72 * This function will start writing nx_sg elements at @sg_head and keep 73 * writing them until all of the data from @start_addr is described or 74 * until sgmax elements have been written. Scatter list elements will be 75 * created such that none of the elements describes a buffer that crosses a 4K 76 * boundary. 77 */ 78 struct nx_sg *nx_build_sg_list(struct nx_sg *sg_head, 79 u8 *start_addr, 80 unsigned int *len, 81 u32 sgmax) 82 { 83 unsigned int sg_len = 0; 84 struct nx_sg *sg; 85 u64 sg_addr = (u64)start_addr; 86 u64 end_addr; 87 88 /* determine the start and end for this address range - slightly 89 * different if this is in VMALLOC_REGION */ 90 if (is_vmalloc_addr(start_addr)) 91 sg_addr = page_to_phys(vmalloc_to_page(start_addr)) 92 + offset_in_page(sg_addr); 93 else 94 sg_addr = __pa(sg_addr); 95 96 end_addr = sg_addr + *len; 97 98 /* each iteration will write one struct nx_sg element and add the 99 * length of data described by that element to sg_len. Once @len bytes 100 * have been described (or @sgmax elements have been written), the 101 * loop ends. min_t is used to ensure @end_addr falls on the same page 102 * as sg_addr, if not, we need to create another nx_sg element for the 103 * data on the next page. 104 * 105 * Also when using vmalloc'ed data, every time that a system page 106 * boundary is crossed the physical address needs to be re-calculated. 107 */ 108 for (sg = sg_head; sg_len < *len; sg++) { 109 u64 next_page; 110 111 sg->addr = sg_addr; 112 sg_addr = min_t(u64, NX_PAGE_NUM(sg_addr + NX_PAGE_SIZE), 113 end_addr); 114 115 next_page = (sg->addr & PAGE_MASK) + PAGE_SIZE; 116 sg->len = min_t(u64, sg_addr, next_page) - sg->addr; 117 sg_len += sg->len; 118 119 if (sg_addr >= next_page && 120 is_vmalloc_addr(start_addr + sg_len)) { 121 sg_addr = page_to_phys(vmalloc_to_page( 122 start_addr + sg_len)); 123 end_addr = sg_addr + *len - sg_len; 124 } 125 126 if ((sg - sg_head) == sgmax) { 127 pr_err("nx: scatter/gather list overflow, pid: %d\n", 128 current->pid); 129 sg++; 130 break; 131 } 132 } 133 *len = sg_len; 134 135 /* return the moved sg_head pointer */ 136 return sg; 137 } 138 139 /** 140 * nx_walk_and_build - walk a linux scatterlist and build an nx scatterlist 141 * 142 * @nx_dst: pointer to the first nx_sg element to write 143 * @sglen: max number of nx_sg entries we're allowed to write 144 * @sg_src: pointer to the source linux scatterlist to walk 145 * @start: number of bytes to fast-forward past at the beginning of @sg_src 146 * @src_len: number of bytes to walk in @sg_src 147 */ 148 struct nx_sg *nx_walk_and_build(struct nx_sg *nx_dst, 149 unsigned int sglen, 150 struct scatterlist *sg_src, 151 unsigned int start, 152 unsigned int *src_len) 153 { 154 struct scatter_walk walk; 155 struct nx_sg *nx_sg = nx_dst; 156 unsigned int n, len = *src_len; 157 158 /* we need to fast forward through @start bytes first */ 159 scatterwalk_start_at_pos(&walk, sg_src, start); 160 161 while (len && (nx_sg - nx_dst) < sglen) { 162 n = scatterwalk_next(&walk, len); 163 164 nx_sg = nx_build_sg_list(nx_sg, walk.addr, &n, sglen - (nx_sg - nx_dst)); 165 166 scatterwalk_done_src(&walk, n); 167 len -= n; 168 } 169 /* update to_process */ 170 *src_len -= len; 171 172 /* return the moved destination pointer */ 173 return nx_sg; 174 } 175 176 /** 177 * trim_sg_list - ensures the bound in sg list. 178 * @sg: sg list head 179 * @end: sg lisg end 180 * @delta: is the amount we need to crop in order to bound the list. 181 * @nbytes: length of data in the scatterlists or data length - whichever 182 * is greater. 183 */ 184 static long int trim_sg_list(struct nx_sg *sg, 185 struct nx_sg *end, 186 unsigned int delta, 187 unsigned int *nbytes) 188 { 189 long int oplen; 190 long int data_back; 191 unsigned int is_delta = delta; 192 193 while (delta && end > sg) { 194 struct nx_sg *last = end - 1; 195 196 if (last->len > delta) { 197 last->len -= delta; 198 delta = 0; 199 } else { 200 end--; 201 delta -= last->len; 202 } 203 } 204 205 /* There are cases where we need to crop list in order to make it 206 * a block size multiple, but we also need to align data. In order to 207 * that we need to calculate how much we need to put back to be 208 * processed 209 */ 210 oplen = (sg - end) * sizeof(struct nx_sg); 211 if (is_delta) { 212 data_back = (abs(oplen) / AES_BLOCK_SIZE) * sg->len; 213 data_back = *nbytes - (data_back & ~(AES_BLOCK_SIZE - 1)); 214 *nbytes -= data_back; 215 } 216 217 return oplen; 218 } 219 220 /** 221 * nx_build_sg_lists - walk the input scatterlists and build arrays of NX 222 * scatterlists based on them. 223 * 224 * @nx_ctx: NX crypto context for the lists we're building 225 * @iv: iv data, if the algorithm requires it 226 * @dst: destination scatterlist 227 * @src: source scatterlist 228 * @nbytes: length of data described in the scatterlists 229 * @offset: number of bytes to fast-forward past at the beginning of 230 * scatterlists. 231 * @oiv: destination for the iv data, if the algorithm requires it 232 * 233 * This is common code shared by all the AES algorithms. It uses the crypto 234 * scatterlist walk routines to traverse input and output scatterlists, building 235 * corresponding NX scatterlists 236 */ 237 int nx_build_sg_lists(struct nx_crypto_ctx *nx_ctx, 238 const u8 *iv, 239 struct scatterlist *dst, 240 struct scatterlist *src, 241 unsigned int *nbytes, 242 unsigned int offset, 243 u8 *oiv) 244 { 245 unsigned int delta = 0; 246 unsigned int total = *nbytes; 247 struct nx_sg *nx_insg = nx_ctx->in_sg; 248 struct nx_sg *nx_outsg = nx_ctx->out_sg; 249 unsigned int max_sg_len; 250 251 max_sg_len = min_t(u64, nx_ctx->ap->sglen, 252 nx_driver.of.max_sg_len/sizeof(struct nx_sg)); 253 max_sg_len = min_t(u64, max_sg_len, 254 nx_ctx->ap->databytelen/NX_PAGE_SIZE); 255 256 if (oiv) 257 memcpy(oiv, iv, AES_BLOCK_SIZE); 258 259 *nbytes = min_t(u64, *nbytes, nx_ctx->ap->databytelen); 260 261 nx_outsg = nx_walk_and_build(nx_outsg, max_sg_len, dst, 262 offset, nbytes); 263 nx_insg = nx_walk_and_build(nx_insg, max_sg_len, src, 264 offset, nbytes); 265 266 if (*nbytes < total) 267 delta = *nbytes - (*nbytes & ~(AES_BLOCK_SIZE - 1)); 268 269 /* these lengths should be negative, which will indicate to phyp that 270 * the input and output parameters are scatterlists, not linear 271 * buffers */ 272 nx_ctx->op.inlen = trim_sg_list(nx_ctx->in_sg, nx_insg, delta, nbytes); 273 nx_ctx->op.outlen = trim_sg_list(nx_ctx->out_sg, nx_outsg, delta, nbytes); 274 275 return 0; 276 } 277 278 /** 279 * nx_ctx_init - initialize an nx_ctx's vio_pfo_op struct 280 * 281 * @nx_ctx: the nx context to initialize 282 * @function: the function code for the op 283 */ 284 void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function) 285 { 286 spin_lock_init(&nx_ctx->lock); 287 memset(nx_ctx->kmem, 0, nx_ctx->kmem_len); 288 nx_ctx->csbcpb->csb.valid |= NX_CSB_VALID_BIT; 289 290 nx_ctx->op.flags = function; 291 nx_ctx->op.csbcpb = __pa(nx_ctx->csbcpb); 292 nx_ctx->op.in = __pa(nx_ctx->in_sg); 293 nx_ctx->op.out = __pa(nx_ctx->out_sg); 294 295 if (nx_ctx->csbcpb_aead) { 296 nx_ctx->csbcpb_aead->csb.valid |= NX_CSB_VALID_BIT; 297 298 nx_ctx->op_aead.flags = function; 299 nx_ctx->op_aead.csbcpb = __pa(nx_ctx->csbcpb_aead); 300 nx_ctx->op_aead.in = __pa(nx_ctx->in_sg); 301 nx_ctx->op_aead.out = __pa(nx_ctx->out_sg); 302 } 303 } 304 305 static void nx_of_update_status(struct device *dev, 306 struct property *p, 307 struct nx_of *props) 308 { 309 if (!strncmp(p->value, "okay", p->length)) { 310 props->status = NX_WAITING; 311 props->flags |= NX_OF_FLAG_STATUS_SET; 312 } else { 313 dev_info(dev, "%s: status '%s' is not 'okay'\n", __func__, 314 (char *)p->value); 315 } 316 } 317 318 static void nx_of_update_sglen(struct device *dev, 319 struct property *p, 320 struct nx_of *props) 321 { 322 if (p->length != sizeof(props->max_sg_len)) { 323 dev_err(dev, "%s: unexpected format for " 324 "ibm,max-sg-len property\n", __func__); 325 dev_dbg(dev, "%s: ibm,max-sg-len is %d bytes " 326 "long, expected %zd bytes\n", __func__, 327 p->length, sizeof(props->max_sg_len)); 328 return; 329 } 330 331 props->max_sg_len = *(u32 *)p->value; 332 props->flags |= NX_OF_FLAG_MAXSGLEN_SET; 333 } 334 335 static void nx_of_update_msc(struct device *dev, 336 struct property *p, 337 struct nx_of *props) 338 { 339 struct msc_triplet *trip; 340 struct max_sync_cop *msc; 341 unsigned int bytes_so_far, i, lenp; 342 343 msc = (struct max_sync_cop *)p->value; 344 lenp = p->length; 345 346 /* You can't tell if the data read in for this property is sane by its 347 * size alone. This is because there are sizes embedded in the data 348 * structure. The best we can do is check lengths as we parse and bail 349 * as soon as a length error is detected. */ 350 bytes_so_far = 0; 351 352 while ((bytes_so_far + sizeof(struct max_sync_cop)) <= lenp) { 353 bytes_so_far += sizeof(struct max_sync_cop); 354 355 trip = msc->trip; 356 357 for (i = 0; 358 ((bytes_so_far + sizeof(struct msc_triplet)) <= lenp) && 359 i < msc->triplets; 360 i++) { 361 if (msc->fc >= NX_MAX_FC || msc->mode >= NX_MAX_MODE) { 362 dev_err(dev, "unknown function code/mode " 363 "combo: %d/%d (ignored)\n", msc->fc, 364 msc->mode); 365 goto next_loop; 366 } 367 368 if (!trip->sglen || trip->databytelen < NX_PAGE_SIZE) { 369 dev_warn(dev, "bogus sglen/databytelen: " 370 "%u/%u (ignored)\n", trip->sglen, 371 trip->databytelen); 372 goto next_loop; 373 } 374 375 switch (trip->keybitlen) { 376 case 128: 377 case 160: 378 props->ap[msc->fc][msc->mode][0].databytelen = 379 trip->databytelen; 380 props->ap[msc->fc][msc->mode][0].sglen = 381 trip->sglen; 382 break; 383 case 192: 384 props->ap[msc->fc][msc->mode][1].databytelen = 385 trip->databytelen; 386 props->ap[msc->fc][msc->mode][1].sglen = 387 trip->sglen; 388 break; 389 case 256: 390 if (msc->fc == NX_FC_AES) { 391 props->ap[msc->fc][msc->mode][2]. 392 databytelen = trip->databytelen; 393 props->ap[msc->fc][msc->mode][2].sglen = 394 trip->sglen; 395 } else if (msc->fc == NX_FC_AES_HMAC || 396 msc->fc == NX_FC_SHA) { 397 props->ap[msc->fc][msc->mode][1]. 398 databytelen = trip->databytelen; 399 props->ap[msc->fc][msc->mode][1].sglen = 400 trip->sglen; 401 } else { 402 dev_warn(dev, "unknown function " 403 "code/key bit len combo" 404 ": (%u/256)\n", msc->fc); 405 } 406 break; 407 case 512: 408 props->ap[msc->fc][msc->mode][2].databytelen = 409 trip->databytelen; 410 props->ap[msc->fc][msc->mode][2].sglen = 411 trip->sglen; 412 break; 413 default: 414 dev_warn(dev, "unknown function code/key bit " 415 "len combo: (%u/%u)\n", msc->fc, 416 trip->keybitlen); 417 break; 418 } 419 next_loop: 420 bytes_so_far += sizeof(struct msc_triplet); 421 trip++; 422 } 423 424 msc = (struct max_sync_cop *)trip; 425 } 426 427 props->flags |= NX_OF_FLAG_MAXSYNCCOP_SET; 428 } 429 430 /** 431 * nx_of_init - read openFirmware values from the device tree 432 * 433 * @dev: device handle 434 * @props: pointer to struct to hold the properties values 435 * 436 * Called once at driver probe time, this function will read out the 437 * openFirmware properties we use at runtime. If all the OF properties are 438 * acceptable, when we exit this function props->flags will indicate that 439 * we're ready to register our crypto algorithms. 440 */ 441 static void nx_of_init(struct device *dev, struct nx_of *props) 442 { 443 struct device_node *base_node = dev->of_node; 444 struct property *p; 445 446 p = of_find_property(base_node, "status", NULL); 447 if (!p) 448 dev_info(dev, "%s: property 'status' not found\n", __func__); 449 else 450 nx_of_update_status(dev, p, props); 451 452 p = of_find_property(base_node, "ibm,max-sg-len", NULL); 453 if (!p) 454 dev_info(dev, "%s: property 'ibm,max-sg-len' not found\n", 455 __func__); 456 else 457 nx_of_update_sglen(dev, p, props); 458 459 p = of_find_property(base_node, "ibm,max-sync-cop", NULL); 460 if (!p) 461 dev_info(dev, "%s: property 'ibm,max-sync-cop' not found\n", 462 __func__); 463 else 464 nx_of_update_msc(dev, p, props); 465 } 466 467 static bool nx_check_prop(struct device *dev, u32 fc, u32 mode, int slot) 468 { 469 struct alg_props *props = &nx_driver.of.ap[fc][mode][slot]; 470 471 if (!props->sglen || props->databytelen < NX_PAGE_SIZE) { 472 if (dev) 473 dev_warn(dev, "bogus sglen/databytelen for %u/%u/%u: " 474 "%u/%u (ignored)\n", fc, mode, slot, 475 props->sglen, props->databytelen); 476 return false; 477 } 478 479 return true; 480 } 481 482 static bool nx_check_props(struct device *dev, u32 fc, u32 mode) 483 { 484 int i; 485 486 for (i = 0; i < 3; i++) 487 if (!nx_check_prop(dev, fc, mode, i)) 488 return false; 489 490 return true; 491 } 492 493 static int nx_register_skcipher(struct skcipher_alg *alg, u32 fc, u32 mode) 494 { 495 return nx_check_props(&nx_driver.viodev->dev, fc, mode) ? 496 crypto_register_skcipher(alg) : 0; 497 } 498 499 static int nx_register_aead(struct aead_alg *alg, u32 fc, u32 mode) 500 { 501 return nx_check_props(&nx_driver.viodev->dev, fc, mode) ? 502 crypto_register_aead(alg) : 0; 503 } 504 505 static int nx_register_shash(struct shash_alg *alg, u32 fc, u32 mode, int slot) 506 { 507 return (slot >= 0 ? nx_check_prop(&nx_driver.viodev->dev, 508 fc, mode, slot) : 509 nx_check_props(&nx_driver.viodev->dev, fc, mode)) ? 510 crypto_register_shash(alg) : 0; 511 } 512 513 static void nx_unregister_skcipher(struct skcipher_alg *alg, u32 fc, u32 mode) 514 { 515 if (nx_check_props(NULL, fc, mode)) 516 crypto_unregister_skcipher(alg); 517 } 518 519 static void nx_unregister_aead(struct aead_alg *alg, u32 fc, u32 mode) 520 { 521 if (nx_check_props(NULL, fc, mode)) 522 crypto_unregister_aead(alg); 523 } 524 525 static void nx_unregister_shash(struct shash_alg *alg, u32 fc, u32 mode, 526 int slot) 527 { 528 if (slot >= 0 ? nx_check_prop(NULL, fc, mode, slot) : 529 nx_check_props(NULL, fc, mode)) 530 crypto_unregister_shash(alg); 531 } 532 533 /** 534 * nx_register_algs - register algorithms with the crypto API 535 * 536 * Called from nx_probe() 537 * 538 * If all OF properties are in an acceptable state, the driver flags will 539 * indicate that we're ready and we'll create our debugfs files and register 540 * out crypto algorithms. 541 */ 542 static int nx_register_algs(void) 543 { 544 int rc = -1; 545 546 if (nx_driver.of.flags != NX_OF_FLAG_MASK_READY) 547 goto out; 548 549 memset(&nx_driver.stats, 0, sizeof(struct nx_stats)); 550 551 NX_DEBUGFS_INIT(&nx_driver); 552 553 nx_driver.of.status = NX_OKAY; 554 555 rc = nx_register_skcipher(&nx_ecb_aes_alg, NX_FC_AES, NX_MODE_AES_ECB); 556 if (rc) 557 goto out; 558 559 rc = nx_register_skcipher(&nx_cbc_aes_alg, NX_FC_AES, NX_MODE_AES_CBC); 560 if (rc) 561 goto out_unreg_ecb; 562 563 rc = nx_register_skcipher(&nx_ctr3686_aes_alg, NX_FC_AES, 564 NX_MODE_AES_CTR); 565 if (rc) 566 goto out_unreg_cbc; 567 568 rc = nx_register_aead(&nx_gcm_aes_alg, NX_FC_AES, NX_MODE_AES_GCM); 569 if (rc) 570 goto out_unreg_ctr3686; 571 572 rc = nx_register_aead(&nx_gcm4106_aes_alg, NX_FC_AES, NX_MODE_AES_GCM); 573 if (rc) 574 goto out_unreg_gcm; 575 576 rc = nx_register_aead(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM); 577 if (rc) 578 goto out_unreg_gcm4106; 579 580 rc = nx_register_aead(&nx_ccm4309_aes_alg, NX_FC_AES, NX_MODE_AES_CCM); 581 if (rc) 582 goto out_unreg_ccm; 583 584 rc = nx_register_shash(&nx_shash_sha256_alg, NX_FC_SHA, NX_MODE_SHA, 585 NX_PROPS_SHA256); 586 if (rc) 587 goto out_unreg_ccm4309; 588 589 rc = nx_register_shash(&nx_shash_sha512_alg, NX_FC_SHA, NX_MODE_SHA, 590 NX_PROPS_SHA512); 591 if (rc) 592 goto out_unreg_s256; 593 594 rc = nx_register_shash(&nx_shash_aes_xcbc_alg, 595 NX_FC_AES, NX_MODE_AES_XCBC_MAC, -1); 596 if (rc) 597 goto out_unreg_s512; 598 599 goto out; 600 601 out_unreg_s512: 602 nx_unregister_shash(&nx_shash_sha512_alg, NX_FC_SHA, NX_MODE_SHA, 603 NX_PROPS_SHA512); 604 out_unreg_s256: 605 nx_unregister_shash(&nx_shash_sha256_alg, NX_FC_SHA, NX_MODE_SHA, 606 NX_PROPS_SHA256); 607 out_unreg_ccm4309: 608 nx_unregister_aead(&nx_ccm4309_aes_alg, NX_FC_AES, NX_MODE_AES_CCM); 609 out_unreg_ccm: 610 nx_unregister_aead(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM); 611 out_unreg_gcm4106: 612 nx_unregister_aead(&nx_gcm4106_aes_alg, NX_FC_AES, NX_MODE_AES_GCM); 613 out_unreg_gcm: 614 nx_unregister_aead(&nx_gcm_aes_alg, NX_FC_AES, NX_MODE_AES_GCM); 615 out_unreg_ctr3686: 616 nx_unregister_skcipher(&nx_ctr3686_aes_alg, NX_FC_AES, NX_MODE_AES_CTR); 617 out_unreg_cbc: 618 nx_unregister_skcipher(&nx_cbc_aes_alg, NX_FC_AES, NX_MODE_AES_CBC); 619 out_unreg_ecb: 620 nx_unregister_skcipher(&nx_ecb_aes_alg, NX_FC_AES, NX_MODE_AES_ECB); 621 out: 622 return rc; 623 } 624 625 /** 626 * nx_crypto_ctx_init - create and initialize a crypto api context 627 * 628 * @nx_ctx: the crypto api context 629 * @fc: function code for the context 630 * @mode: the function code specific mode for this context 631 */ 632 static int nx_crypto_ctx_init(struct nx_crypto_ctx *nx_ctx, u32 fc, u32 mode) 633 { 634 if (nx_driver.of.status != NX_OKAY) { 635 pr_err("Attempt to initialize NX crypto context while device " 636 "is not available!\n"); 637 return -ENODEV; 638 } 639 640 /* we need an extra page for csbcpb_aead for these modes */ 641 if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM) 642 nx_ctx->kmem_len = (5 * NX_PAGE_SIZE) + 643 sizeof(struct nx_csbcpb); 644 else 645 nx_ctx->kmem_len = (4 * NX_PAGE_SIZE) + 646 sizeof(struct nx_csbcpb); 647 648 nx_ctx->kmem = kmalloc(nx_ctx->kmem_len, GFP_KERNEL); 649 if (!nx_ctx->kmem) 650 return -ENOMEM; 651 652 /* the csbcpb and scatterlists must be 4K aligned pages */ 653 nx_ctx->csbcpb = (struct nx_csbcpb *)(round_up((u64)nx_ctx->kmem, 654 (u64)NX_PAGE_SIZE)); 655 nx_ctx->in_sg = (struct nx_sg *)((u8 *)nx_ctx->csbcpb + NX_PAGE_SIZE); 656 nx_ctx->out_sg = (struct nx_sg *)((u8 *)nx_ctx->in_sg + NX_PAGE_SIZE); 657 658 if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM) 659 nx_ctx->csbcpb_aead = 660 (struct nx_csbcpb *)((u8 *)nx_ctx->out_sg + 661 NX_PAGE_SIZE); 662 663 /* give each context a pointer to global stats and their OF 664 * properties */ 665 nx_ctx->stats = &nx_driver.stats; 666 memcpy(nx_ctx->props, nx_driver.of.ap[fc][mode], 667 sizeof(struct alg_props) * 3); 668 669 return 0; 670 } 671 672 /* entry points from the crypto tfm initializers */ 673 int nx_crypto_ctx_aes_ccm_init(struct crypto_aead *tfm) 674 { 675 crypto_aead_set_reqsize(tfm, sizeof(struct nx_ccm_rctx)); 676 return nx_crypto_ctx_init(crypto_aead_ctx(tfm), NX_FC_AES, 677 NX_MODE_AES_CCM); 678 } 679 680 int nx_crypto_ctx_aes_gcm_init(struct crypto_aead *tfm) 681 { 682 crypto_aead_set_reqsize(tfm, sizeof(struct nx_gcm_rctx)); 683 return nx_crypto_ctx_init(crypto_aead_ctx(tfm), NX_FC_AES, 684 NX_MODE_AES_GCM); 685 } 686 687 int nx_crypto_ctx_aes_ctr_init(struct crypto_skcipher *tfm) 688 { 689 return nx_crypto_ctx_init(crypto_skcipher_ctx(tfm), NX_FC_AES, 690 NX_MODE_AES_CTR); 691 } 692 693 int nx_crypto_ctx_aes_cbc_init(struct crypto_skcipher *tfm) 694 { 695 return nx_crypto_ctx_init(crypto_skcipher_ctx(tfm), NX_FC_AES, 696 NX_MODE_AES_CBC); 697 } 698 699 int nx_crypto_ctx_aes_ecb_init(struct crypto_skcipher *tfm) 700 { 701 return nx_crypto_ctx_init(crypto_skcipher_ctx(tfm), NX_FC_AES, 702 NX_MODE_AES_ECB); 703 } 704 705 int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm) 706 { 707 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_SHA, NX_MODE_SHA); 708 } 709 710 int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm) 711 { 712 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES, 713 NX_MODE_AES_XCBC_MAC); 714 } 715 716 /** 717 * nx_crypto_ctx_exit - destroy a crypto api context 718 * 719 * @tfm: the crypto transform pointer for the context 720 * 721 * As crypto API contexts are destroyed, this exit hook is called to free the 722 * memory associated with it. 723 */ 724 void nx_crypto_ctx_exit(struct crypto_tfm *tfm) 725 { 726 struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm); 727 728 kfree_sensitive(nx_ctx->kmem); 729 nx_ctx->csbcpb = NULL; 730 nx_ctx->csbcpb_aead = NULL; 731 nx_ctx->in_sg = NULL; 732 nx_ctx->out_sg = NULL; 733 } 734 735 void nx_crypto_ctx_skcipher_exit(struct crypto_skcipher *tfm) 736 { 737 nx_crypto_ctx_exit(crypto_skcipher_ctx(tfm)); 738 } 739 740 void nx_crypto_ctx_aead_exit(struct crypto_aead *tfm) 741 { 742 struct nx_crypto_ctx *nx_ctx = crypto_aead_ctx(tfm); 743 744 kfree_sensitive(nx_ctx->kmem); 745 } 746 747 static int nx_probe(struct vio_dev *viodev, const struct vio_device_id *id) 748 { 749 dev_dbg(&viodev->dev, "driver probed: %s resource id: 0x%x\n", 750 viodev->name, viodev->resource_id); 751 752 if (nx_driver.viodev) { 753 dev_err(&viodev->dev, "%s: Attempt to register more than one " 754 "instance of the hardware\n", __func__); 755 return -EINVAL; 756 } 757 758 nx_driver.viodev = viodev; 759 760 nx_of_init(&viodev->dev, &nx_driver.of); 761 762 return nx_register_algs(); 763 } 764 765 static void nx_remove(struct vio_dev *viodev) 766 { 767 dev_dbg(&viodev->dev, "entering nx_remove for UA 0x%x\n", 768 viodev->unit_address); 769 770 if (nx_driver.of.status == NX_OKAY) { 771 NX_DEBUGFS_FINI(&nx_driver); 772 773 nx_unregister_shash(&nx_shash_aes_xcbc_alg, 774 NX_FC_AES, NX_MODE_AES_XCBC_MAC, -1); 775 nx_unregister_shash(&nx_shash_sha512_alg, 776 NX_FC_SHA, NX_MODE_SHA, NX_PROPS_SHA256); 777 nx_unregister_shash(&nx_shash_sha256_alg, 778 NX_FC_SHA, NX_MODE_SHA, NX_PROPS_SHA512); 779 nx_unregister_aead(&nx_ccm4309_aes_alg, 780 NX_FC_AES, NX_MODE_AES_CCM); 781 nx_unregister_aead(&nx_ccm_aes_alg, NX_FC_AES, NX_MODE_AES_CCM); 782 nx_unregister_aead(&nx_gcm4106_aes_alg, 783 NX_FC_AES, NX_MODE_AES_GCM); 784 nx_unregister_aead(&nx_gcm_aes_alg, 785 NX_FC_AES, NX_MODE_AES_GCM); 786 nx_unregister_skcipher(&nx_ctr3686_aes_alg, 787 NX_FC_AES, NX_MODE_AES_CTR); 788 nx_unregister_skcipher(&nx_cbc_aes_alg, NX_FC_AES, 789 NX_MODE_AES_CBC); 790 nx_unregister_skcipher(&nx_ecb_aes_alg, NX_FC_AES, 791 NX_MODE_AES_ECB); 792 } 793 } 794 795 796 /* module wide initialization/cleanup */ 797 static int __init nx_init(void) 798 { 799 return vio_register_driver(&nx_driver.viodriver); 800 } 801 802 static void __exit nx_fini(void) 803 { 804 vio_unregister_driver(&nx_driver.viodriver); 805 } 806 807 static const struct vio_device_id nx_crypto_driver_ids[] = { 808 { "ibm,sym-encryption-v1", "ibm,sym-encryption" }, 809 { "", "" } 810 }; 811 MODULE_DEVICE_TABLE(vio, nx_crypto_driver_ids); 812 813 /* driver state structure */ 814 struct nx_crypto_driver nx_driver = { 815 .viodriver = { 816 .id_table = nx_crypto_driver_ids, 817 .probe = nx_probe, 818 .remove = nx_remove, 819 .name = NX_NAME, 820 }, 821 }; 822 823 module_init(nx_init); 824 module_exit(nx_fini); 825 826 MODULE_AUTHOR("Kent Yoder <yoder1@us.ibm.com>"); 827 MODULE_DESCRIPTION(NX_STRING); 828 MODULE_LICENSE("GPL"); 829 MODULE_VERSION(NX_VERSION); 830