1 /** 2 * Routines supporting the Power 7+ Nest Accelerators driver 3 * 4 * Copyright (C) 2011-2012 International Business Machines Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; version 2 only. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18 * 19 * Author: Kent Yoder <yoder1@us.ibm.com> 20 */ 21 22 #include <crypto/internal/hash.h> 23 #include <crypto/hash.h> 24 #include <crypto/aes.h> 25 #include <crypto/sha.h> 26 #include <crypto/algapi.h> 27 #include <crypto/scatterwalk.h> 28 #include <linux/module.h> 29 #include <linux/moduleparam.h> 30 #include <linux/types.h> 31 #include <linux/mm.h> 32 #include <linux/crypto.h> 33 #include <linux/scatterlist.h> 34 #include <linux/device.h> 35 #include <linux/of.h> 36 #include <asm/pSeries_reconfig.h> 37 #include <asm/abs_addr.h> 38 #include <asm/hvcall.h> 39 #include <asm/vio.h> 40 41 #include "nx_csbcpb.h" 42 #include "nx.h" 43 44 45 /** 46 * nx_hcall_sync - make an H_COP_OP hcall for the passed in op structure 47 * 48 * @nx_ctx: the crypto context handle 49 * @op: PFO operation struct to pass in 50 * @may_sleep: flag indicating the request can sleep 51 * 52 * Make the hcall, retrying while the hardware is busy. If we cannot yield 53 * the thread, limit the number of retries to 10 here. 54 */ 55 int nx_hcall_sync(struct nx_crypto_ctx *nx_ctx, 56 struct vio_pfo_op *op, 57 u32 may_sleep) 58 { 59 int rc, retries = 10; 60 struct vio_dev *viodev = nx_driver.viodev; 61 62 atomic_inc(&(nx_ctx->stats->sync_ops)); 63 64 do { 65 rc = vio_h_cop_sync(viodev, op); 66 } while ((rc == -EBUSY && !may_sleep && retries--) || 67 (rc == -EBUSY && may_sleep && cond_resched())); 68 69 if (rc) { 70 dev_dbg(&viodev->dev, "vio_h_cop_sync failed: rc: %d " 71 "hcall rc: %ld\n", rc, op->hcall_err); 72 atomic_inc(&(nx_ctx->stats->errors)); 73 atomic_set(&(nx_ctx->stats->last_error), op->hcall_err); 74 atomic_set(&(nx_ctx->stats->last_error_pid), current->pid); 75 } 76 77 return rc; 78 } 79 80 /** 81 * nx_build_sg_list - build an NX scatter list describing a single buffer 82 * 83 * @sg_head: pointer to the first scatter list element to build 84 * @start_addr: pointer to the linear buffer 85 * @len: length of the data at @start_addr 86 * @sgmax: the largest number of scatter list elements we're allowed to create 87 * 88 * This function will start writing nx_sg elements at @sg_head and keep 89 * writing them until all of the data from @start_addr is described or 90 * until sgmax elements have been written. Scatter list elements will be 91 * created such that none of the elements describes a buffer that crosses a 4K 92 * boundary. 93 */ 94 struct nx_sg *nx_build_sg_list(struct nx_sg *sg_head, 95 u8 *start_addr, 96 unsigned int len, 97 u32 sgmax) 98 { 99 unsigned int sg_len = 0; 100 struct nx_sg *sg; 101 u64 sg_addr = (u64)start_addr; 102 u64 end_addr; 103 104 /* determine the start and end for this address range - slightly 105 * different if this is in VMALLOC_REGION */ 106 if (is_vmalloc_addr(start_addr)) 107 sg_addr = phys_to_abs(page_to_phys(vmalloc_to_page(start_addr))) 108 + offset_in_page(sg_addr); 109 else 110 sg_addr = virt_to_abs(sg_addr); 111 112 end_addr = sg_addr + len; 113 114 /* each iteration will write one struct nx_sg element and add the 115 * length of data described by that element to sg_len. Once @len bytes 116 * have been described (or @sgmax elements have been written), the 117 * loop ends. min_t is used to ensure @end_addr falls on the same page 118 * as sg_addr, if not, we need to create another nx_sg element for the 119 * data on the next page */ 120 for (sg = sg_head; sg_len < len; sg++) { 121 sg->addr = sg_addr; 122 sg_addr = min_t(u64, NX_PAGE_NUM(sg_addr + NX_PAGE_SIZE), end_addr); 123 sg->len = sg_addr - sg->addr; 124 sg_len += sg->len; 125 126 if ((sg - sg_head) == sgmax) { 127 pr_err("nx: scatter/gather list overflow, pid: %d\n", 128 current->pid); 129 return NULL; 130 } 131 } 132 133 /* return the moved sg_head pointer */ 134 return sg; 135 } 136 137 /** 138 * nx_walk_and_build - walk a linux scatterlist and build an nx scatterlist 139 * 140 * @nx_dst: pointer to the first nx_sg element to write 141 * @sglen: max number of nx_sg entries we're allowed to write 142 * @sg_src: pointer to the source linux scatterlist to walk 143 * @start: number of bytes to fast-forward past at the beginning of @sg_src 144 * @src_len: number of bytes to walk in @sg_src 145 */ 146 struct nx_sg *nx_walk_and_build(struct nx_sg *nx_dst, 147 unsigned int sglen, 148 struct scatterlist *sg_src, 149 unsigned int start, 150 unsigned int src_len) 151 { 152 struct scatter_walk walk; 153 struct nx_sg *nx_sg = nx_dst; 154 unsigned int n, offset = 0, len = src_len; 155 char *dst; 156 157 /* we need to fast forward through @start bytes first */ 158 for (;;) { 159 scatterwalk_start(&walk, sg_src); 160 161 if (start < offset + sg_src->length) 162 break; 163 164 offset += sg_src->length; 165 sg_src = scatterwalk_sg_next(sg_src); 166 } 167 168 /* start - offset is the number of bytes to advance in the scatterlist 169 * element we're currently looking at */ 170 scatterwalk_advance(&walk, start - offset); 171 172 while (len && nx_sg) { 173 n = scatterwalk_clamp(&walk, len); 174 if (!n) { 175 scatterwalk_start(&walk, sg_next(walk.sg)); 176 n = scatterwalk_clamp(&walk, len); 177 } 178 dst = scatterwalk_map(&walk); 179 180 nx_sg = nx_build_sg_list(nx_sg, dst, n, sglen); 181 len -= n; 182 183 scatterwalk_unmap(dst); 184 scatterwalk_advance(&walk, n); 185 scatterwalk_done(&walk, SCATTERWALK_FROM_SG, len); 186 } 187 188 /* return the moved destination pointer */ 189 return nx_sg; 190 } 191 192 /** 193 * nx_build_sg_lists - walk the input scatterlists and build arrays of NX 194 * scatterlists based on them. 195 * 196 * @nx_ctx: NX crypto context for the lists we're building 197 * @desc: the block cipher descriptor for the operation 198 * @dst: destination scatterlist 199 * @src: source scatterlist 200 * @nbytes: length of data described in the scatterlists 201 * @iv: destination for the iv data, if the algorithm requires it 202 * 203 * This is common code shared by all the AES algorithms. It uses the block 204 * cipher walk routines to traverse input and output scatterlists, building 205 * corresponding NX scatterlists 206 */ 207 int nx_build_sg_lists(struct nx_crypto_ctx *nx_ctx, 208 struct blkcipher_desc *desc, 209 struct scatterlist *dst, 210 struct scatterlist *src, 211 unsigned int nbytes, 212 u8 *iv) 213 { 214 struct nx_sg *nx_insg = nx_ctx->in_sg; 215 struct nx_sg *nx_outsg = nx_ctx->out_sg; 216 struct blkcipher_walk walk; 217 int rc; 218 219 blkcipher_walk_init(&walk, dst, src, nbytes); 220 rc = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE); 221 if (rc) 222 goto out; 223 224 if (iv) 225 memcpy(iv, walk.iv, AES_BLOCK_SIZE); 226 227 while (walk.nbytes) { 228 nx_insg = nx_build_sg_list(nx_insg, walk.src.virt.addr, 229 walk.nbytes, nx_ctx->ap->sglen); 230 nx_outsg = nx_build_sg_list(nx_outsg, walk.dst.virt.addr, 231 walk.nbytes, nx_ctx->ap->sglen); 232 233 rc = blkcipher_walk_done(desc, &walk, 0); 234 if (rc) 235 break; 236 } 237 238 if (walk.nbytes) { 239 nx_insg = nx_build_sg_list(nx_insg, walk.src.virt.addr, 240 walk.nbytes, nx_ctx->ap->sglen); 241 nx_outsg = nx_build_sg_list(nx_outsg, walk.dst.virt.addr, 242 walk.nbytes, nx_ctx->ap->sglen); 243 244 rc = 0; 245 } 246 247 /* these lengths should be negative, which will indicate to phyp that 248 * the input and output parameters are scatterlists, not linear 249 * buffers */ 250 nx_ctx->op.inlen = (nx_ctx->in_sg - nx_insg) * sizeof(struct nx_sg); 251 nx_ctx->op.outlen = (nx_ctx->out_sg - nx_outsg) * sizeof(struct nx_sg); 252 out: 253 return rc; 254 } 255 256 /** 257 * nx_ctx_init - initialize an nx_ctx's vio_pfo_op struct 258 * 259 * @nx_ctx: the nx context to initialize 260 * @function: the function code for the op 261 */ 262 void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function) 263 { 264 memset(nx_ctx->kmem, 0, nx_ctx->kmem_len); 265 nx_ctx->csbcpb->csb.valid |= NX_CSB_VALID_BIT; 266 267 nx_ctx->op.flags = function; 268 nx_ctx->op.csbcpb = virt_to_abs(nx_ctx->csbcpb); 269 nx_ctx->op.in = virt_to_abs(nx_ctx->in_sg); 270 nx_ctx->op.out = virt_to_abs(nx_ctx->out_sg); 271 272 if (nx_ctx->csbcpb_aead) { 273 nx_ctx->csbcpb_aead->csb.valid |= NX_CSB_VALID_BIT; 274 275 nx_ctx->op_aead.flags = function; 276 nx_ctx->op_aead.csbcpb = virt_to_abs(nx_ctx->csbcpb_aead); 277 nx_ctx->op_aead.in = virt_to_abs(nx_ctx->in_sg); 278 nx_ctx->op_aead.out = virt_to_abs(nx_ctx->out_sg); 279 } 280 } 281 282 static void nx_of_update_status(struct device *dev, 283 struct property *p, 284 struct nx_of *props) 285 { 286 if (!strncmp(p->value, "okay", p->length)) { 287 props->status = NX_WAITING; 288 props->flags |= NX_OF_FLAG_STATUS_SET; 289 } else { 290 dev_info(dev, "%s: status '%s' is not 'okay'\n", __func__, 291 (char *)p->value); 292 } 293 } 294 295 static void nx_of_update_sglen(struct device *dev, 296 struct property *p, 297 struct nx_of *props) 298 { 299 if (p->length != sizeof(props->max_sg_len)) { 300 dev_err(dev, "%s: unexpected format for " 301 "ibm,max-sg-len property\n", __func__); 302 dev_dbg(dev, "%s: ibm,max-sg-len is %d bytes " 303 "long, expected %zd bytes\n", __func__, 304 p->length, sizeof(props->max_sg_len)); 305 return; 306 } 307 308 props->max_sg_len = *(u32 *)p->value; 309 props->flags |= NX_OF_FLAG_MAXSGLEN_SET; 310 } 311 312 static void nx_of_update_msc(struct device *dev, 313 struct property *p, 314 struct nx_of *props) 315 { 316 struct msc_triplet *trip; 317 struct max_sync_cop *msc; 318 unsigned int bytes_so_far, i, lenp; 319 320 msc = (struct max_sync_cop *)p->value; 321 lenp = p->length; 322 323 /* You can't tell if the data read in for this property is sane by its 324 * size alone. This is because there are sizes embedded in the data 325 * structure. The best we can do is check lengths as we parse and bail 326 * as soon as a length error is detected. */ 327 bytes_so_far = 0; 328 329 while ((bytes_so_far + sizeof(struct max_sync_cop)) <= lenp) { 330 bytes_so_far += sizeof(struct max_sync_cop); 331 332 trip = msc->trip; 333 334 for (i = 0; 335 ((bytes_so_far + sizeof(struct msc_triplet)) <= lenp) && 336 i < msc->triplets; 337 i++) { 338 if (msc->fc > NX_MAX_FC || msc->mode > NX_MAX_MODE) { 339 dev_err(dev, "unknown function code/mode " 340 "combo: %d/%d (ignored)\n", msc->fc, 341 msc->mode); 342 goto next_loop; 343 } 344 345 switch (trip->keybitlen) { 346 case 128: 347 case 160: 348 props->ap[msc->fc][msc->mode][0].databytelen = 349 trip->databytelen; 350 props->ap[msc->fc][msc->mode][0].sglen = 351 trip->sglen; 352 break; 353 case 192: 354 props->ap[msc->fc][msc->mode][1].databytelen = 355 trip->databytelen; 356 props->ap[msc->fc][msc->mode][1].sglen = 357 trip->sglen; 358 break; 359 case 256: 360 if (msc->fc == NX_FC_AES) { 361 props->ap[msc->fc][msc->mode][2]. 362 databytelen = trip->databytelen; 363 props->ap[msc->fc][msc->mode][2].sglen = 364 trip->sglen; 365 } else if (msc->fc == NX_FC_AES_HMAC || 366 msc->fc == NX_FC_SHA) { 367 props->ap[msc->fc][msc->mode][1]. 368 databytelen = trip->databytelen; 369 props->ap[msc->fc][msc->mode][1].sglen = 370 trip->sglen; 371 } else { 372 dev_warn(dev, "unknown function " 373 "code/key bit len combo" 374 ": (%u/256)\n", msc->fc); 375 } 376 break; 377 case 512: 378 props->ap[msc->fc][msc->mode][2].databytelen = 379 trip->databytelen; 380 props->ap[msc->fc][msc->mode][2].sglen = 381 trip->sglen; 382 break; 383 default: 384 dev_warn(dev, "unknown function code/key bit " 385 "len combo: (%u/%u)\n", msc->fc, 386 trip->keybitlen); 387 break; 388 } 389 next_loop: 390 bytes_so_far += sizeof(struct msc_triplet); 391 trip++; 392 } 393 394 msc = (struct max_sync_cop *)trip; 395 } 396 397 props->flags |= NX_OF_FLAG_MAXSYNCCOP_SET; 398 } 399 400 /** 401 * nx_of_init - read openFirmware values from the device tree 402 * 403 * @dev: device handle 404 * @props: pointer to struct to hold the properties values 405 * 406 * Called once at driver probe time, this function will read out the 407 * openFirmware properties we use at runtime. If all the OF properties are 408 * acceptable, when we exit this function props->flags will indicate that 409 * we're ready to register our crypto algorithms. 410 */ 411 static void nx_of_init(struct device *dev, struct nx_of *props) 412 { 413 struct device_node *base_node = dev->of_node; 414 struct property *p; 415 416 p = of_find_property(base_node, "status", NULL); 417 if (!p) 418 dev_info(dev, "%s: property 'status' not found\n", __func__); 419 else 420 nx_of_update_status(dev, p, props); 421 422 p = of_find_property(base_node, "ibm,max-sg-len", NULL); 423 if (!p) 424 dev_info(dev, "%s: property 'ibm,max-sg-len' not found\n", 425 __func__); 426 else 427 nx_of_update_sglen(dev, p, props); 428 429 p = of_find_property(base_node, "ibm,max-sync-cop", NULL); 430 if (!p) 431 dev_info(dev, "%s: property 'ibm,max-sync-cop' not found\n", 432 __func__); 433 else 434 nx_of_update_msc(dev, p, props); 435 } 436 437 /** 438 * nx_register_algs - register algorithms with the crypto API 439 * 440 * Called from nx_probe() 441 * 442 * If all OF properties are in an acceptable state, the driver flags will 443 * indicate that we're ready and we'll create our debugfs files and register 444 * out crypto algorithms. 445 */ 446 static int nx_register_algs(void) 447 { 448 int rc = -1; 449 450 if (nx_driver.of.flags != NX_OF_FLAG_MASK_READY) 451 goto out; 452 453 memset(&nx_driver.stats, 0, sizeof(struct nx_stats)); 454 455 rc = NX_DEBUGFS_INIT(&nx_driver); 456 if (rc) 457 goto out; 458 459 rc = crypto_register_alg(&nx_ecb_aes_alg); 460 if (rc) 461 goto out; 462 463 rc = crypto_register_alg(&nx_cbc_aes_alg); 464 if (rc) 465 goto out_unreg_ecb; 466 467 rc = crypto_register_alg(&nx_ctr_aes_alg); 468 if (rc) 469 goto out_unreg_cbc; 470 471 rc = crypto_register_alg(&nx_ctr3686_aes_alg); 472 if (rc) 473 goto out_unreg_ctr; 474 475 rc = crypto_register_alg(&nx_gcm_aes_alg); 476 if (rc) 477 goto out_unreg_ctr3686; 478 479 rc = crypto_register_alg(&nx_gcm4106_aes_alg); 480 if (rc) 481 goto out_unreg_gcm; 482 483 rc = crypto_register_alg(&nx_ccm_aes_alg); 484 if (rc) 485 goto out_unreg_gcm4106; 486 487 rc = crypto_register_alg(&nx_ccm4309_aes_alg); 488 if (rc) 489 goto out_unreg_ccm; 490 491 rc = crypto_register_shash(&nx_shash_sha256_alg); 492 if (rc) 493 goto out_unreg_ccm4309; 494 495 rc = crypto_register_shash(&nx_shash_sha512_alg); 496 if (rc) 497 goto out_unreg_s256; 498 499 rc = crypto_register_shash(&nx_shash_aes_xcbc_alg); 500 if (rc) 501 goto out_unreg_s512; 502 503 nx_driver.of.status = NX_OKAY; 504 505 goto out; 506 507 out_unreg_s512: 508 crypto_unregister_shash(&nx_shash_sha512_alg); 509 out_unreg_s256: 510 crypto_unregister_shash(&nx_shash_sha256_alg); 511 out_unreg_ccm4309: 512 crypto_unregister_alg(&nx_ccm4309_aes_alg); 513 out_unreg_ccm: 514 crypto_unregister_alg(&nx_ccm_aes_alg); 515 out_unreg_gcm4106: 516 crypto_unregister_alg(&nx_gcm4106_aes_alg); 517 out_unreg_gcm: 518 crypto_unregister_alg(&nx_gcm_aes_alg); 519 out_unreg_ctr3686: 520 crypto_unregister_alg(&nx_ctr3686_aes_alg); 521 out_unreg_ctr: 522 crypto_unregister_alg(&nx_ctr_aes_alg); 523 out_unreg_cbc: 524 crypto_unregister_alg(&nx_cbc_aes_alg); 525 out_unreg_ecb: 526 crypto_unregister_alg(&nx_ecb_aes_alg); 527 out: 528 return rc; 529 } 530 531 /** 532 * nx_crypto_ctx_init - create and initialize a crypto api context 533 * 534 * @nx_ctx: the crypto api context 535 * @fc: function code for the context 536 * @mode: the function code specific mode for this context 537 */ 538 static int nx_crypto_ctx_init(struct nx_crypto_ctx *nx_ctx, u32 fc, u32 mode) 539 { 540 if (nx_driver.of.status != NX_OKAY) { 541 pr_err("Attempt to initialize NX crypto context while device " 542 "is not available!\n"); 543 return -ENODEV; 544 } 545 546 /* we need an extra page for csbcpb_aead for these modes */ 547 if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM) 548 nx_ctx->kmem_len = (4 * NX_PAGE_SIZE) + 549 sizeof(struct nx_csbcpb); 550 else 551 nx_ctx->kmem_len = (3 * NX_PAGE_SIZE) + 552 sizeof(struct nx_csbcpb); 553 554 nx_ctx->kmem = kmalloc(nx_ctx->kmem_len, GFP_KERNEL); 555 if (!nx_ctx->kmem) 556 return -ENOMEM; 557 558 /* the csbcpb and scatterlists must be 4K aligned pages */ 559 nx_ctx->csbcpb = (struct nx_csbcpb *)(round_up((u64)nx_ctx->kmem, 560 (u64)NX_PAGE_SIZE)); 561 nx_ctx->in_sg = (struct nx_sg *)((u8 *)nx_ctx->csbcpb + NX_PAGE_SIZE); 562 nx_ctx->out_sg = (struct nx_sg *)((u8 *)nx_ctx->in_sg + NX_PAGE_SIZE); 563 564 if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM) 565 nx_ctx->csbcpb_aead = 566 (struct nx_csbcpb *)((u8 *)nx_ctx->out_sg + 567 NX_PAGE_SIZE); 568 569 /* give each context a pointer to global stats and their OF 570 * properties */ 571 nx_ctx->stats = &nx_driver.stats; 572 memcpy(nx_ctx->props, nx_driver.of.ap[fc][mode], 573 sizeof(struct alg_props) * 3); 574 575 return 0; 576 } 577 578 /* entry points from the crypto tfm initializers */ 579 int nx_crypto_ctx_aes_ccm_init(struct crypto_tfm *tfm) 580 { 581 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES, 582 NX_MODE_AES_CCM); 583 } 584 585 int nx_crypto_ctx_aes_gcm_init(struct crypto_tfm *tfm) 586 { 587 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES, 588 NX_MODE_AES_GCM); 589 } 590 591 int nx_crypto_ctx_aes_ctr_init(struct crypto_tfm *tfm) 592 { 593 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES, 594 NX_MODE_AES_CTR); 595 } 596 597 int nx_crypto_ctx_aes_cbc_init(struct crypto_tfm *tfm) 598 { 599 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES, 600 NX_MODE_AES_CBC); 601 } 602 603 int nx_crypto_ctx_aes_ecb_init(struct crypto_tfm *tfm) 604 { 605 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES, 606 NX_MODE_AES_ECB); 607 } 608 609 int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm) 610 { 611 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_SHA, NX_MODE_SHA); 612 } 613 614 int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm) 615 { 616 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES, 617 NX_MODE_AES_XCBC_MAC); 618 } 619 620 /** 621 * nx_crypto_ctx_exit - destroy a crypto api context 622 * 623 * @tfm: the crypto transform pointer for the context 624 * 625 * As crypto API contexts are destroyed, this exit hook is called to free the 626 * memory associated with it. 627 */ 628 void nx_crypto_ctx_exit(struct crypto_tfm *tfm) 629 { 630 struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm); 631 632 kzfree(nx_ctx->kmem); 633 nx_ctx->csbcpb = NULL; 634 nx_ctx->csbcpb_aead = NULL; 635 nx_ctx->in_sg = NULL; 636 nx_ctx->out_sg = NULL; 637 } 638 639 static int __devinit nx_probe(struct vio_dev *viodev, 640 const struct vio_device_id *id) 641 { 642 dev_dbg(&viodev->dev, "driver probed: %s resource id: 0x%x\n", 643 viodev->name, viodev->resource_id); 644 645 if (nx_driver.viodev) { 646 dev_err(&viodev->dev, "%s: Attempt to register more than one " 647 "instance of the hardware\n", __func__); 648 return -EINVAL; 649 } 650 651 nx_driver.viodev = viodev; 652 653 nx_of_init(&viodev->dev, &nx_driver.of); 654 655 return nx_register_algs(); 656 } 657 658 static int __devexit nx_remove(struct vio_dev *viodev) 659 { 660 dev_dbg(&viodev->dev, "entering nx_remove for UA 0x%x\n", 661 viodev->unit_address); 662 663 if (nx_driver.of.status == NX_OKAY) { 664 NX_DEBUGFS_FINI(&nx_driver); 665 666 crypto_unregister_alg(&nx_ccm_aes_alg); 667 crypto_unregister_alg(&nx_ccm4309_aes_alg); 668 crypto_unregister_alg(&nx_gcm_aes_alg); 669 crypto_unregister_alg(&nx_gcm4106_aes_alg); 670 crypto_unregister_alg(&nx_ctr_aes_alg); 671 crypto_unregister_alg(&nx_ctr3686_aes_alg); 672 crypto_unregister_alg(&nx_cbc_aes_alg); 673 crypto_unregister_alg(&nx_ecb_aes_alg); 674 crypto_unregister_shash(&nx_shash_sha256_alg); 675 crypto_unregister_shash(&nx_shash_sha512_alg); 676 crypto_unregister_shash(&nx_shash_aes_xcbc_alg); 677 } 678 679 return 0; 680 } 681 682 683 /* module wide initialization/cleanup */ 684 static int __init nx_init(void) 685 { 686 return vio_register_driver(&nx_driver.viodriver); 687 } 688 689 static void __exit nx_fini(void) 690 { 691 vio_unregister_driver(&nx_driver.viodriver); 692 } 693 694 static struct vio_device_id nx_crypto_driver_ids[] __devinitdata = { 695 { "ibm,sym-encryption-v1", "ibm,sym-encryption" }, 696 { "", "" } 697 }; 698 MODULE_DEVICE_TABLE(vio, nx_crypto_driver_ids); 699 700 /* driver state structure */ 701 struct nx_crypto_driver nx_driver = { 702 .viodriver = { 703 .id_table = nx_crypto_driver_ids, 704 .probe = nx_probe, 705 .remove = nx_remove, 706 .name = NX_NAME, 707 }, 708 }; 709 710 module_init(nx_init); 711 module_exit(nx_fini); 712 713 MODULE_AUTHOR("Kent Yoder <yoder1@us.ibm.com>"); 714 MODULE_DESCRIPTION(NX_STRING); 715 MODULE_LICENSE("GPL"); 716 MODULE_VERSION(NX_VERSION); 717