xref: /linux/drivers/crypto/nx/nx-aes-ctr.c (revision 93df8a1ed6231727c5db94a80b1a6bd5ee67cec3)
1 /**
2  * AES CTR routines supporting the Power 7+ Nest Accelerators driver
3  *
4  * Copyright (C) 2011-2012 International Business Machines Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 only.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  *
19  * Author: Kent Yoder <yoder1@us.ibm.com>
20  */
21 
22 #include <crypto/aes.h>
23 #include <crypto/ctr.h>
24 #include <crypto/algapi.h>
25 #include <linux/module.h>
26 #include <linux/types.h>
27 #include <linux/crypto.h>
28 #include <asm/vio.h>
29 
30 #include "nx_csbcpb.h"
31 #include "nx.h"
32 
33 
34 static int ctr_aes_nx_set_key(struct crypto_tfm *tfm,
35 			      const u8          *in_key,
36 			      unsigned int       key_len)
37 {
38 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
39 	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
40 
41 	nx_ctx_init(nx_ctx, HCOP_FC_AES);
42 
43 	switch (key_len) {
44 	case AES_KEYSIZE_128:
45 		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
46 		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
47 		break;
48 	case AES_KEYSIZE_192:
49 		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);
50 		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_192];
51 		break;
52 	case AES_KEYSIZE_256:
53 		NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);
54 		nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_256];
55 		break;
56 	default:
57 		return -EINVAL;
58 	}
59 
60 	csbcpb->cpb.hdr.mode = NX_MODE_AES_CTR;
61 	memcpy(csbcpb->cpb.aes_ctr.key, in_key, key_len);
62 
63 	return 0;
64 }
65 
66 static int ctr3686_aes_nx_set_key(struct crypto_tfm *tfm,
67 				  const u8          *in_key,
68 				  unsigned int       key_len)
69 {
70 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
71 
72 	if (key_len < CTR_RFC3686_NONCE_SIZE)
73 		return -EINVAL;
74 
75 	memcpy(nx_ctx->priv.ctr.nonce,
76 	       in_key + key_len - CTR_RFC3686_NONCE_SIZE,
77 	       CTR_RFC3686_NONCE_SIZE);
78 
79 	key_len -= CTR_RFC3686_NONCE_SIZE;
80 
81 	return ctr_aes_nx_set_key(tfm, in_key, key_len);
82 }
83 
84 static int ctr_aes_nx_crypt(struct blkcipher_desc *desc,
85 			    struct scatterlist    *dst,
86 			    struct scatterlist    *src,
87 			    unsigned int           nbytes)
88 {
89 	struct nx_crypto_ctx *nx_ctx = crypto_blkcipher_ctx(desc->tfm);
90 	struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
91 	unsigned long irq_flags;
92 	unsigned int processed = 0, to_process;
93 	int rc;
94 
95 	spin_lock_irqsave(&nx_ctx->lock, irq_flags);
96 
97 	do {
98 		to_process = nbytes - processed;
99 
100 		rc = nx_build_sg_lists(nx_ctx, desc, dst, src, &to_process,
101 				       processed, csbcpb->cpb.aes_ctr.iv);
102 		if (rc)
103 			goto out;
104 
105 		if (!nx_ctx->op.inlen || !nx_ctx->op.outlen) {
106 			rc = -EINVAL;
107 			goto out;
108 		}
109 
110 		rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
111 				   desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
112 		if (rc)
113 			goto out;
114 
115 		memcpy(desc->info, csbcpb->cpb.aes_cbc.cv, AES_BLOCK_SIZE);
116 
117 		atomic_inc(&(nx_ctx->stats->aes_ops));
118 		atomic64_add(csbcpb->csb.processed_byte_count,
119 			     &(nx_ctx->stats->aes_bytes));
120 
121 		processed += to_process;
122 	} while (processed < nbytes);
123 out:
124 	spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
125 	return rc;
126 }
127 
128 static int ctr3686_aes_nx_crypt(struct blkcipher_desc *desc,
129 				struct scatterlist    *dst,
130 				struct scatterlist    *src,
131 				unsigned int           nbytes)
132 {
133 	struct nx_crypto_ctx *nx_ctx = crypto_blkcipher_ctx(desc->tfm);
134 	u8 iv[16];
135 
136 	memcpy(iv, nx_ctx->priv.ctr.nonce, CTR_RFC3686_IV_SIZE);
137 	memcpy(iv + CTR_RFC3686_NONCE_SIZE,
138 	       desc->info, CTR_RFC3686_IV_SIZE);
139 	iv[12] = iv[13] = iv[14] = 0;
140 	iv[15] = 1;
141 
142 	desc->info = iv;
143 
144 	return ctr_aes_nx_crypt(desc, dst, src, nbytes);
145 }
146 
147 struct crypto_alg nx_ctr_aes_alg = {
148 	.cra_name        = "ctr(aes)",
149 	.cra_driver_name = "ctr-aes-nx",
150 	.cra_priority    = 300,
151 	.cra_flags       = CRYPTO_ALG_TYPE_BLKCIPHER,
152 	.cra_blocksize   = 1,
153 	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),
154 	.cra_type        = &crypto_blkcipher_type,
155 	.cra_module      = THIS_MODULE,
156 	.cra_init        = nx_crypto_ctx_aes_ctr_init,
157 	.cra_exit        = nx_crypto_ctx_exit,
158 	.cra_blkcipher = {
159 		.min_keysize = AES_MIN_KEY_SIZE,
160 		.max_keysize = AES_MAX_KEY_SIZE,
161 		.ivsize      = AES_BLOCK_SIZE,
162 		.setkey      = ctr_aes_nx_set_key,
163 		.encrypt     = ctr_aes_nx_crypt,
164 		.decrypt     = ctr_aes_nx_crypt,
165 	}
166 };
167 
168 struct crypto_alg nx_ctr3686_aes_alg = {
169 	.cra_name        = "rfc3686(ctr(aes))",
170 	.cra_driver_name = "rfc3686-ctr-aes-nx",
171 	.cra_priority    = 300,
172 	.cra_flags       = CRYPTO_ALG_TYPE_BLKCIPHER,
173 	.cra_blocksize   = 1,
174 	.cra_ctxsize     = sizeof(struct nx_crypto_ctx),
175 	.cra_type        = &crypto_blkcipher_type,
176 	.cra_module      = THIS_MODULE,
177 	.cra_init        = nx_crypto_ctx_aes_ctr_init,
178 	.cra_exit        = nx_crypto_ctx_exit,
179 	.cra_blkcipher = {
180 		.min_keysize = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE,
181 		.max_keysize = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE,
182 		.ivsize      = CTR_RFC3686_IV_SIZE,
183 		.geniv       = "seqiv",
184 		.setkey      = ctr3686_aes_nx_set_key,
185 		.encrypt     = ctr3686_aes_nx_crypt,
186 		.decrypt     = ctr3686_aes_nx_crypt,
187 	}
188 };
189