xref: /linux/drivers/crypto/intel/qat/qat_common/adf_gen6_tl.c (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640)
1*c6b012a2SVijay Sundar Selvamani // SPDX-License-Identifier: GPL-2.0-only
2*c6b012a2SVijay Sundar Selvamani /* Copyright (c) 2025 Intel Corporation. */
3*c6b012a2SVijay Sundar Selvamani #include <linux/export.h>
4*c6b012a2SVijay Sundar Selvamani 
5*c6b012a2SVijay Sundar Selvamani #include "adf_gen6_tl.h"
6*c6b012a2SVijay Sundar Selvamani #include "adf_telemetry.h"
7*c6b012a2SVijay Sundar Selvamani #include "adf_tl_debugfs.h"
8*c6b012a2SVijay Sundar Selvamani #include "icp_qat_fw_init_admin.h"
9*c6b012a2SVijay Sundar Selvamani 
10*c6b012a2SVijay Sundar Selvamani #define ADF_GEN6_TL_DEV_REG_OFF(reg) ADF_TL_DEV_REG_OFF(reg, gen6)
11*c6b012a2SVijay Sundar Selvamani 
12*c6b012a2SVijay Sundar Selvamani #define ADF_GEN6_TL_RP_REG_OFF(reg) ADF_TL_RP_REG_OFF(reg, gen6)
13*c6b012a2SVijay Sundar Selvamani 
14*c6b012a2SVijay Sundar Selvamani #define ADF_GEN6_TL_SL_UTIL_COUNTER(_name)			\
15*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER("util_" #_name, ADF_TL_SIMPLE_COUNT,	\
16*c6b012a2SVijay Sundar Selvamani 			ADF_TL_SLICE_REG_OFF(_name, reg_tm_slice_util, gen6))
17*c6b012a2SVijay Sundar Selvamani 
18*c6b012a2SVijay Sundar Selvamani #define ADF_GEN6_TL_SL_EXEC_COUNTER(_name)			\
19*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER("exec_" #_name, ADF_TL_SIMPLE_COUNT,	\
20*c6b012a2SVijay Sundar Selvamani 			ADF_TL_SLICE_REG_OFF(_name, reg_tm_slice_exec_cnt, gen6))
21*c6b012a2SVijay Sundar Selvamani 
22*c6b012a2SVijay Sundar Selvamani #define SLICE_IDX(sl) offsetof(struct icp_qat_fw_init_admin_slice_cnt, sl##_cnt)
23*c6b012a2SVijay Sundar Selvamani 
24*c6b012a2SVijay Sundar Selvamani /* Device level counters. */
25*c6b012a2SVijay Sundar Selvamani static const struct adf_tl_dbg_counter dev_counters[] = {
26*c6b012a2SVijay Sundar Selvamani 	/* PCIe partial transactions. */
27*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(PCI_TRANS_CNT_NAME, ADF_TL_SIMPLE_COUNT,
28*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_prt_trans_cnt)),
29*c6b012a2SVijay Sundar Selvamani 	/* Max read latency[ns]. */
30*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(MAX_RD_LAT_NAME, ADF_TL_COUNTER_NS,
31*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_rd_lat_max)),
32*c6b012a2SVijay Sundar Selvamani 	/* Read latency average[ns]. */
33*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER_LATENCY(RD_LAT_ACC_NAME, ADF_TL_COUNTER_NS_AVG,
34*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_rd_lat_acc),
35*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_rd_cmpl_cnt)),
36*c6b012a2SVijay Sundar Selvamani 	/* Max "get to put" latency[ns]. */
37*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(MAX_LAT_NAME, ADF_TL_COUNTER_NS,
38*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_gp_lat_max)),
39*c6b012a2SVijay Sundar Selvamani 	/* "Get to put" latency average[ns]. */
40*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER_LATENCY(LAT_ACC_NAME, ADF_TL_COUNTER_NS_AVG,
41*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_gp_lat_acc),
42*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_ae_put_cnt)),
43*c6b012a2SVijay Sundar Selvamani 	/* PCIe write bandwidth[Mbps]. */
44*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(BW_IN_NAME, ADF_TL_COUNTER_MBPS,
45*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_bw_in)),
46*c6b012a2SVijay Sundar Selvamani 	/* PCIe read bandwidth[Mbps]. */
47*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(BW_OUT_NAME, ADF_TL_COUNTER_MBPS,
48*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_bw_out)),
49*c6b012a2SVijay Sundar Selvamani 	/* Page request latency average[ns]. */
50*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER_LATENCY(PAGE_REQ_LAT_NAME, ADF_TL_COUNTER_NS_AVG,
51*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_at_page_req_lat_acc),
52*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_at_page_req_cnt)),
53*c6b012a2SVijay Sundar Selvamani 	/* Page translation latency average[ns]. */
54*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER_LATENCY(AT_TRANS_LAT_NAME, ADF_TL_COUNTER_NS_AVG,
55*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_at_trans_lat_acc),
56*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_at_trans_lat_cnt)),
57*c6b012a2SVijay Sundar Selvamani 	/* Maximum uTLB used. */
58*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(AT_MAX_UTLB_USED_NAME, ADF_TL_SIMPLE_COUNT,
59*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_DEV_REG_OFF(reg_tl_at_max_utlb_used)),
60*c6b012a2SVijay Sundar Selvamani };
61*c6b012a2SVijay Sundar Selvamani 
62*c6b012a2SVijay Sundar Selvamani /* Accelerator utilization counters */
63*c6b012a2SVijay Sundar Selvamani static const struct adf_tl_dbg_counter sl_util_counters[ADF_TL_SL_CNT_COUNT] = {
64*c6b012a2SVijay Sundar Selvamani 	/* Compression accelerator utilization. */
65*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(cpr)] = ADF_GEN6_TL_SL_UTIL_COUNTER(cnv),
66*c6b012a2SVijay Sundar Selvamani 	/* Decompression accelerator utilization. */
67*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(dcpr)] = ADF_GEN6_TL_SL_UTIL_COUNTER(dcprz),
68*c6b012a2SVijay Sundar Selvamani 	/* PKE accelerator utilization. */
69*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(pke)] = ADF_GEN6_TL_SL_UTIL_COUNTER(pke),
70*c6b012a2SVijay Sundar Selvamani 	/* Wireless Authentication accelerator utilization. */
71*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(wat)] = ADF_GEN6_TL_SL_UTIL_COUNTER(wat),
72*c6b012a2SVijay Sundar Selvamani 	/* Wireless Cipher accelerator utilization. */
73*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(wcp)] = ADF_GEN6_TL_SL_UTIL_COUNTER(wcp),
74*c6b012a2SVijay Sundar Selvamani 	/* UCS accelerator utilization. */
75*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(ucs)] = ADF_GEN6_TL_SL_UTIL_COUNTER(ucs),
76*c6b012a2SVijay Sundar Selvamani 	/* Authentication accelerator utilization. */
77*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(ath)] = ADF_GEN6_TL_SL_UTIL_COUNTER(ath),
78*c6b012a2SVijay Sundar Selvamani };
79*c6b012a2SVijay Sundar Selvamani 
80*c6b012a2SVijay Sundar Selvamani /* Accelerator execution counters */
81*c6b012a2SVijay Sundar Selvamani static const struct adf_tl_dbg_counter sl_exec_counters[ADF_TL_SL_CNT_COUNT] = {
82*c6b012a2SVijay Sundar Selvamani 	/* Compression accelerator execution count. */
83*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(cpr)] = ADF_GEN6_TL_SL_EXEC_COUNTER(cnv),
84*c6b012a2SVijay Sundar Selvamani 	/* Decompression accelerator execution count. */
85*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(dcpr)] = ADF_GEN6_TL_SL_EXEC_COUNTER(dcprz),
86*c6b012a2SVijay Sundar Selvamani 	/* PKE execution count. */
87*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(pke)] = ADF_GEN6_TL_SL_EXEC_COUNTER(pke),
88*c6b012a2SVijay Sundar Selvamani 	/* Wireless Authentication accelerator execution count. */
89*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(wat)] = ADF_GEN6_TL_SL_EXEC_COUNTER(wat),
90*c6b012a2SVijay Sundar Selvamani 	/* Wireless Cipher accelerator execution count. */
91*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(wcp)] = ADF_GEN6_TL_SL_EXEC_COUNTER(wcp),
92*c6b012a2SVijay Sundar Selvamani 	/* UCS accelerator execution count. */
93*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(ucs)] = ADF_GEN6_TL_SL_EXEC_COUNTER(ucs),
94*c6b012a2SVijay Sundar Selvamani 	/* Authentication accelerator execution count. */
95*c6b012a2SVijay Sundar Selvamani 	[SLICE_IDX(ath)] = ADF_GEN6_TL_SL_EXEC_COUNTER(ath),
96*c6b012a2SVijay Sundar Selvamani };
97*c6b012a2SVijay Sundar Selvamani 
98*c6b012a2SVijay Sundar Selvamani /* Ring pair counters. */
99*c6b012a2SVijay Sundar Selvamani static const struct adf_tl_dbg_counter rp_counters[] = {
100*c6b012a2SVijay Sundar Selvamani 	/* PCIe partial transactions. */
101*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(PCI_TRANS_CNT_NAME, ADF_TL_SIMPLE_COUNT,
102*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_RP_REG_OFF(reg_tl_prt_trans_cnt)),
103*c6b012a2SVijay Sundar Selvamani 	/* "Get to put" latency average[ns]. */
104*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER_LATENCY(LAT_ACC_NAME, ADF_TL_COUNTER_NS_AVG,
105*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_RP_REG_OFF(reg_tl_gp_lat_acc),
106*c6b012a2SVijay Sundar Selvamani 			       ADF_GEN6_TL_RP_REG_OFF(reg_tl_ae_put_cnt)),
107*c6b012a2SVijay Sundar Selvamani 	/* PCIe write bandwidth[Mbps]. */
108*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(BW_IN_NAME, ADF_TL_COUNTER_MBPS,
109*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_RP_REG_OFF(reg_tl_bw_in)),
110*c6b012a2SVijay Sundar Selvamani 	/* PCIe read bandwidth[Mbps]. */
111*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(BW_OUT_NAME, ADF_TL_COUNTER_MBPS,
112*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_RP_REG_OFF(reg_tl_bw_out)),
113*c6b012a2SVijay Sundar Selvamani 	/* Message descriptor DevTLB hit rate. */
114*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(AT_GLOB_DTLB_HIT_NAME, ADF_TL_SIMPLE_COUNT,
115*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_RP_REG_OFF(reg_tl_at_glob_devtlb_hit)),
116*c6b012a2SVijay Sundar Selvamani 	/* Message descriptor DevTLB miss rate. */
117*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(AT_GLOB_DTLB_MISS_NAME, ADF_TL_SIMPLE_COUNT,
118*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_RP_REG_OFF(reg_tl_at_glob_devtlb_miss)),
119*c6b012a2SVijay Sundar Selvamani 	/* Payload DevTLB hit rate. */
120*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(AT_PAYLD_DTLB_HIT_NAME, ADF_TL_SIMPLE_COUNT,
121*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_RP_REG_OFF(reg_tl_at_payld_devtlb_hit)),
122*c6b012a2SVijay Sundar Selvamani 	/* Payload DevTLB miss rate. */
123*c6b012a2SVijay Sundar Selvamani 	ADF_TL_COUNTER(AT_PAYLD_DTLB_MISS_NAME, ADF_TL_SIMPLE_COUNT,
124*c6b012a2SVijay Sundar Selvamani 		       ADF_GEN6_TL_RP_REG_OFF(reg_tl_at_payld_devtlb_miss)),
125*c6b012a2SVijay Sundar Selvamani };
126*c6b012a2SVijay Sundar Selvamani 
127*c6b012a2SVijay Sundar Selvamani void adf_gen6_init_tl_data(struct adf_tl_hw_data *tl_data)
128*c6b012a2SVijay Sundar Selvamani {
129*c6b012a2SVijay Sundar Selvamani 	tl_data->layout_sz = ADF_GEN6_TL_LAYOUT_SZ;
130*c6b012a2SVijay Sundar Selvamani 	tl_data->slice_reg_sz = ADF_GEN6_TL_SLICE_REG_SZ;
131*c6b012a2SVijay Sundar Selvamani 	tl_data->rp_reg_sz = ADF_GEN6_TL_RP_REG_SZ;
132*c6b012a2SVijay Sundar Selvamani 	tl_data->num_hbuff = ADF_GEN6_TL_NUM_HIST_BUFFS;
133*c6b012a2SVijay Sundar Selvamani 	tl_data->max_rp = ADF_GEN6_TL_MAX_RP_NUM;
134*c6b012a2SVijay Sundar Selvamani 	tl_data->msg_cnt_off = ADF_GEN6_TL_MSG_CNT_OFF;
135*c6b012a2SVijay Sundar Selvamani 	tl_data->cpp_ns_per_cycle = ADF_GEN6_CPP_NS_PER_CYCLE;
136*c6b012a2SVijay Sundar Selvamani 	tl_data->bw_units_to_bytes = ADF_GEN6_TL_BW_HW_UNITS_TO_BYTES;
137*c6b012a2SVijay Sundar Selvamani 
138*c6b012a2SVijay Sundar Selvamani 	tl_data->dev_counters = dev_counters;
139*c6b012a2SVijay Sundar Selvamani 	tl_data->num_dev_counters = ARRAY_SIZE(dev_counters);
140*c6b012a2SVijay Sundar Selvamani 	tl_data->sl_util_counters = sl_util_counters;
141*c6b012a2SVijay Sundar Selvamani 	tl_data->sl_exec_counters = sl_exec_counters;
142*c6b012a2SVijay Sundar Selvamani 	tl_data->rp_counters = rp_counters;
143*c6b012a2SVijay Sundar Selvamani 	tl_data->num_rp_counters = ARRAY_SIZE(rp_counters);
144*c6b012a2SVijay Sundar Selvamani 	tl_data->max_sl_cnt = ADF_GEN6_TL_MAX_SLICES_PER_TYPE;
145*c6b012a2SVijay Sundar Selvamani }
146*c6b012a2SVijay Sundar Selvamani EXPORT_SYMBOL_GPL(adf_gen6_init_tl_data);
147