1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */ 2 /* Copyright(c) 2014 - 2021 Intel Corporation */ 3 #ifndef ADF_DRV_H 4 #define ADF_DRV_H 5 6 #include <linux/list.h> 7 #include <linux/pci.h> 8 #include "adf_accel_devices.h" 9 #include "icp_qat_fw_loader_handle.h" 10 #include "icp_qat_hal.h" 11 12 #define ADF_STATUS_RESTARTING 0 13 #define ADF_STATUS_STARTING 1 14 #define ADF_STATUS_CONFIGURED 2 15 #define ADF_STATUS_STARTED 3 16 #define ADF_STATUS_AE_INITIALISED 4 17 #define ADF_STATUS_AE_UCODE_LOADED 5 18 #define ADF_STATUS_AE_STARTED 6 19 #define ADF_STATUS_PF_RUNNING 7 20 #define ADF_STATUS_IRQ_ALLOCATED 8 21 #define ADF_STATUS_CRYPTO_ALGS_REGISTERED 9 22 #define ADF_STATUS_COMP_ALGS_REGISTERED 10 23 24 enum adf_dev_reset_mode { 25 ADF_DEV_RESET_ASYNC = 0, 26 ADF_DEV_RESET_SYNC 27 }; 28 29 enum adf_event { 30 ADF_EVENT_INIT = 0, 31 ADF_EVENT_START, 32 ADF_EVENT_STOP, 33 ADF_EVENT_SHUTDOWN, 34 ADF_EVENT_RESTARTING, 35 ADF_EVENT_RESTARTED, 36 ADF_EVENT_FATAL_ERROR, 37 }; 38 39 struct service_hndl { 40 int (*event_hld)(struct adf_accel_dev *accel_dev, 41 enum adf_event event); 42 unsigned long init_status[ADF_DEVS_ARRAY_SIZE]; 43 unsigned long start_status[ADF_DEVS_ARRAY_SIZE]; 44 char *name; 45 struct list_head list; 46 }; 47 48 int adf_service_register(struct service_hndl *service); 49 int adf_service_unregister(struct service_hndl *service); 50 51 int adf_dev_up(struct adf_accel_dev *accel_dev, bool init_config); 52 int adf_dev_down(struct adf_accel_dev *accel_dev); 53 int adf_dev_restart(struct adf_accel_dev *accel_dev); 54 55 void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data); 56 void adf_clean_vf_map(bool); 57 int adf_notify_fatal_error(struct adf_accel_dev *accel_dev); 58 void adf_error_notifier(struct adf_accel_dev *accel_dev); 59 int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, 60 struct adf_accel_dev *pf); 61 void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, 62 struct adf_accel_dev *pf); 63 struct list_head *adf_devmgr_get_head(void); 64 struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev); 65 int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev); 66 int adf_dev_started(struct adf_accel_dev *accel_dev); 67 int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev); 68 int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev); 69 int adf_ae_init(struct adf_accel_dev *accel_dev); 70 int adf_ae_shutdown(struct adf_accel_dev *accel_dev); 71 int adf_ae_fw_load(struct adf_accel_dev *accel_dev); 72 void adf_ae_fw_release(struct adf_accel_dev *accel_dev); 73 int adf_ae_start(struct adf_accel_dev *accel_dev); 74 int adf_ae_stop(struct adf_accel_dev *accel_dev); 75 76 extern const struct pci_error_handlers adf_err_handler; 77 void adf_reset_sbr(struct adf_accel_dev *accel_dev); 78 void adf_reset_flr(struct adf_accel_dev *accel_dev); 79 void adf_dev_restore(struct adf_accel_dev *accel_dev); 80 void adf_set_bme(struct adf_accel_dev *accel_dev); 81 int adf_init_aer(void); 82 void adf_exit_aer(void); 83 int adf_init_arb(struct adf_accel_dev *accel_dev); 84 void adf_exit_arb(struct adf_accel_dev *accel_dev); 85 void adf_update_ring_arb(struct adf_etr_ring_data *ring); 86 87 int adf_dev_get(struct adf_accel_dev *accel_dev); 88 void adf_dev_put(struct adf_accel_dev *accel_dev); 89 int adf_dev_in_use(struct adf_accel_dev *accel_dev); 90 int adf_init_etr_data(struct adf_accel_dev *accel_dev); 91 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev); 92 int qat_crypto_register(void); 93 int qat_crypto_unregister(void); 94 int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev); 95 struct qat_crypto_instance *qat_crypto_get_instance_node(int node); 96 void qat_crypto_put_instance(struct qat_crypto_instance *inst); 97 void qat_alg_callback(void *resp); 98 void qat_alg_asym_callback(void *resp); 99 int qat_algs_register(void); 100 void qat_algs_unregister(void); 101 int qat_asym_algs_register(void); 102 void qat_asym_algs_unregister(void); 103 104 struct qat_compression_instance *qat_compression_get_instance_node(int node, int alg); 105 void qat_compression_put_instance(struct qat_compression_instance *inst); 106 int qat_compression_register(void); 107 int qat_compression_unregister(void); 108 int qat_comp_algs_register(u32 caps); 109 void qat_comp_algs_unregister(u32 caps); 110 void qat_comp_alg_callback(void *resp); 111 112 int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 113 void adf_isr_resource_free(struct adf_accel_dev *accel_dev); 114 void adf_isr_sync_ae_cluster(struct adf_accel_dev *accel_dev); 115 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 116 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev); 117 118 int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev); 119 120 int adf_sysfs_init(struct adf_accel_dev *accel_dev); 121 122 int qat_hal_init(struct adf_accel_dev *accel_dev); 123 void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle); 124 int qat_hal_start(struct icp_qat_fw_loader_handle *handle); 125 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae, 126 unsigned int ctx_mask); 127 void qat_hal_reset(struct icp_qat_fw_loader_handle *handle); 128 int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle); 129 void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle, 130 unsigned char ae, unsigned int ctx_mask); 131 int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle, 132 unsigned int ae); 133 int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle, 134 unsigned char ae, enum icp_qat_uof_regtype lm_type, 135 unsigned char mode); 136 int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle, 137 unsigned char ae, unsigned char mode); 138 int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle, 139 unsigned char ae, unsigned char mode); 140 void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle, 141 unsigned char ae, unsigned int ctx_mask, unsigned int upc); 142 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle, 143 unsigned char ae, unsigned int uaddr, 144 unsigned int words_num, u64 *uword); 145 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae, 146 unsigned int uword_addr, unsigned int words_num, 147 unsigned int *data); 148 int qat_hal_get_ins_num(void); 149 int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle, 150 unsigned char ae, 151 struct icp_qat_uof_batch_init *lm_init_header); 152 int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, 153 unsigned char ae, unsigned long ctx_mask, 154 enum icp_qat_uof_regtype reg_type, 155 unsigned short reg_num, unsigned int regdata); 156 int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, 157 unsigned char ae, unsigned long ctx_mask, 158 enum icp_qat_uof_regtype reg_type, 159 unsigned short reg_num, unsigned int regdata); 160 int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, 161 unsigned char ae, unsigned long ctx_mask, 162 enum icp_qat_uof_regtype reg_type, 163 unsigned short reg_num, unsigned int regdata); 164 int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, 165 unsigned char ae, unsigned long ctx_mask, 166 unsigned short reg_num, unsigned int regdata); 167 void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle, 168 unsigned char ae, unsigned char mode); 169 int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); 170 void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle); 171 int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, void *addr_ptr, 172 int mem_size); 173 int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle, 174 void *addr_ptr, u32 mem_size, const char *obj_name); 175 int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle, 176 unsigned int cfg_ae_mask); 177 int adf_init_misc_wq(void); 178 void adf_exit_misc_wq(void); 179 bool adf_misc_wq_queue_work(struct work_struct *work); 180 bool adf_misc_wq_queue_delayed_work(struct delayed_work *work, 181 unsigned long delay); 182 void adf_misc_wq_flush(void); 183 #if defined(CONFIG_PCI_IOV) 184 int adf_sriov_configure(struct pci_dev *pdev, int numvfs); 185 void adf_disable_sriov(struct adf_accel_dev *accel_dev); 186 void adf_reenable_sriov(struct adf_accel_dev *accel_dev); 187 void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask); 188 void adf_enable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 num_vfs); 189 void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev); 190 bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev); 191 bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr); 192 int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev); 193 void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); 194 void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); 195 void adf_schedule_vf2pf_handler(struct adf_accel_vf_info *vf_info); 196 int adf_init_pf_wq(void); 197 void adf_exit_pf_wq(void); 198 int adf_init_vf_wq(void); 199 void adf_exit_vf_wq(void); 200 void adf_flush_vf_wq(struct adf_accel_dev *accel_dev); 201 #else 202 #define adf_sriov_configure NULL 203 204 static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev) 205 { 206 } 207 208 static inline void adf_reenable_sriov(struct adf_accel_dev *accel_dev) 209 { 210 } 211 212 static inline int adf_init_pf_wq(void) 213 { 214 return 0; 215 } 216 217 static inline void adf_exit_pf_wq(void) 218 { 219 } 220 221 static inline int adf_init_vf_wq(void) 222 { 223 return 0; 224 } 225 226 static inline void adf_exit_vf_wq(void) 227 { 228 } 229 230 #endif 231 232 static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev) 233 { 234 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 235 struct adf_bar *pmisc; 236 237 pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; 238 239 return pmisc->virt_addr; 240 } 241 242 static inline void __iomem *adf_get_etr_base(struct adf_accel_dev *accel_dev) 243 { 244 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 245 struct adf_bar *etr; 246 247 etr = &GET_BARS(accel_dev)[hw_data->get_etr_bar_id(hw_data)]; 248 249 return etr->virt_addr; 250 } 251 252 static inline void __iomem *adf_get_aram_base(struct adf_accel_dev *accel_dev) 253 { 254 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 255 struct adf_bar *param; 256 257 param = &GET_BARS(accel_dev)[hw_data->get_sram_bar_id(hw_data)]; 258 259 return param->virt_addr; 260 } 261 262 #endif 263