xref: /linux/drivers/crypto/intel/keembay/ocs-hcu.h (revision fbf31dd599875cb132d764cf4d05d7985e332c05)
1*fbf31dd5STom Zanussi /* SPDX-License-Identifier: GPL-2.0-only */
2*fbf31dd5STom Zanussi /*
3*fbf31dd5STom Zanussi  * Intel Keem Bay OCS HCU Crypto Driver.
4*fbf31dd5STom Zanussi  *
5*fbf31dd5STom Zanussi  * Copyright (C) 2018-2020 Intel Corporation
6*fbf31dd5STom Zanussi  */
7*fbf31dd5STom Zanussi 
8*fbf31dd5STom Zanussi #include <linux/dma-mapping.h>
9*fbf31dd5STom Zanussi 
10*fbf31dd5STom Zanussi #ifndef _CRYPTO_OCS_HCU_H
11*fbf31dd5STom Zanussi #define _CRYPTO_OCS_HCU_H
12*fbf31dd5STom Zanussi 
13*fbf31dd5STom Zanussi #define OCS_HCU_DMA_BIT_MASK		DMA_BIT_MASK(32)
14*fbf31dd5STom Zanussi 
15*fbf31dd5STom Zanussi #define OCS_HCU_HW_KEY_LEN		64
16*fbf31dd5STom Zanussi 
17*fbf31dd5STom Zanussi struct ocs_hcu_dma_list;
18*fbf31dd5STom Zanussi 
19*fbf31dd5STom Zanussi enum ocs_hcu_algo {
20*fbf31dd5STom Zanussi 	OCS_HCU_ALGO_SHA256 = 2,
21*fbf31dd5STom Zanussi 	OCS_HCU_ALGO_SHA224 = 3,
22*fbf31dd5STom Zanussi 	OCS_HCU_ALGO_SHA384 = 4,
23*fbf31dd5STom Zanussi 	OCS_HCU_ALGO_SHA512 = 5,
24*fbf31dd5STom Zanussi 	OCS_HCU_ALGO_SM3    = 6,
25*fbf31dd5STom Zanussi };
26*fbf31dd5STom Zanussi 
27*fbf31dd5STom Zanussi /**
28*fbf31dd5STom Zanussi  * struct ocs_hcu_dev - OCS HCU device context.
29*fbf31dd5STom Zanussi  * @list:	List of device contexts.
30*fbf31dd5STom Zanussi  * @dev:	OCS HCU device.
31*fbf31dd5STom Zanussi  * @io_base:	Base address of OCS HCU registers.
32*fbf31dd5STom Zanussi  * @engine:	Crypto engine for the device.
33*fbf31dd5STom Zanussi  * @irq:	IRQ number.
34*fbf31dd5STom Zanussi  * @irq_done:	Completion for IRQ.
35*fbf31dd5STom Zanussi  * @irq_err:	Flag indicating an IRQ error has happened.
36*fbf31dd5STom Zanussi  */
37*fbf31dd5STom Zanussi struct ocs_hcu_dev {
38*fbf31dd5STom Zanussi 	struct list_head list;
39*fbf31dd5STom Zanussi 	struct device *dev;
40*fbf31dd5STom Zanussi 	void __iomem *io_base;
41*fbf31dd5STom Zanussi 	struct crypto_engine *engine;
42*fbf31dd5STom Zanussi 	int irq;
43*fbf31dd5STom Zanussi 	struct completion irq_done;
44*fbf31dd5STom Zanussi 	bool irq_err;
45*fbf31dd5STom Zanussi };
46*fbf31dd5STom Zanussi 
47*fbf31dd5STom Zanussi /**
48*fbf31dd5STom Zanussi  * struct ocs_hcu_idata - Intermediate data generated by the HCU.
49*fbf31dd5STom Zanussi  * @msg_len_lo: Length of data the HCU has operated on in bits, low 32b.
50*fbf31dd5STom Zanussi  * @msg_len_hi: Length of data the HCU has operated on in bits, high 32b.
51*fbf31dd5STom Zanussi  * @digest: The digest read from the HCU. If the HCU is terminated, it will
52*fbf31dd5STom Zanussi  *	    contain the actual hash digest. Otherwise it is the intermediate
53*fbf31dd5STom Zanussi  *	    state.
54*fbf31dd5STom Zanussi  */
55*fbf31dd5STom Zanussi struct ocs_hcu_idata {
56*fbf31dd5STom Zanussi 	u32 msg_len_lo;
57*fbf31dd5STom Zanussi 	u32 msg_len_hi;
58*fbf31dd5STom Zanussi 	u8  digest[SHA512_DIGEST_SIZE];
59*fbf31dd5STom Zanussi };
60*fbf31dd5STom Zanussi 
61*fbf31dd5STom Zanussi /**
62*fbf31dd5STom Zanussi  * struct ocs_hcu_hash_ctx - Context for OCS HCU hashing operation.
63*fbf31dd5STom Zanussi  * @algo:	The hashing algorithm being used.
64*fbf31dd5STom Zanussi  * @idata:	The current intermediate data.
65*fbf31dd5STom Zanussi  */
66*fbf31dd5STom Zanussi struct ocs_hcu_hash_ctx {
67*fbf31dd5STom Zanussi 	enum ocs_hcu_algo	algo;
68*fbf31dd5STom Zanussi 	struct ocs_hcu_idata	idata;
69*fbf31dd5STom Zanussi };
70*fbf31dd5STom Zanussi 
71*fbf31dd5STom Zanussi irqreturn_t ocs_hcu_irq_handler(int irq, void *dev_id);
72*fbf31dd5STom Zanussi 
73*fbf31dd5STom Zanussi struct ocs_hcu_dma_list *ocs_hcu_dma_list_alloc(struct ocs_hcu_dev *hcu_dev,
74*fbf31dd5STom Zanussi 						int max_nents);
75*fbf31dd5STom Zanussi 
76*fbf31dd5STom Zanussi void ocs_hcu_dma_list_free(struct ocs_hcu_dev *hcu_dev,
77*fbf31dd5STom Zanussi 			   struct ocs_hcu_dma_list *dma_list);
78*fbf31dd5STom Zanussi 
79*fbf31dd5STom Zanussi int ocs_hcu_dma_list_add_tail(struct ocs_hcu_dev *hcu_dev,
80*fbf31dd5STom Zanussi 			      struct ocs_hcu_dma_list *dma_list,
81*fbf31dd5STom Zanussi 			      dma_addr_t addr, u32 len);
82*fbf31dd5STom Zanussi 
83*fbf31dd5STom Zanussi int ocs_hcu_hash_init(struct ocs_hcu_hash_ctx *ctx, enum ocs_hcu_algo algo);
84*fbf31dd5STom Zanussi 
85*fbf31dd5STom Zanussi int ocs_hcu_hash_update(struct ocs_hcu_dev *hcu_dev,
86*fbf31dd5STom Zanussi 			struct ocs_hcu_hash_ctx *ctx,
87*fbf31dd5STom Zanussi 			const struct ocs_hcu_dma_list *dma_list);
88*fbf31dd5STom Zanussi 
89*fbf31dd5STom Zanussi int ocs_hcu_hash_finup(struct ocs_hcu_dev *hcu_dev,
90*fbf31dd5STom Zanussi 		       const struct ocs_hcu_hash_ctx *ctx,
91*fbf31dd5STom Zanussi 		       const struct ocs_hcu_dma_list *dma_list,
92*fbf31dd5STom Zanussi 		       u8 *dgst, size_t dgst_len);
93*fbf31dd5STom Zanussi 
94*fbf31dd5STom Zanussi int ocs_hcu_hash_final(struct ocs_hcu_dev *hcu_dev,
95*fbf31dd5STom Zanussi 		       const struct ocs_hcu_hash_ctx *ctx, u8 *dgst,
96*fbf31dd5STom Zanussi 		       size_t dgst_len);
97*fbf31dd5STom Zanussi 
98*fbf31dd5STom Zanussi int ocs_hcu_digest(struct ocs_hcu_dev *hcu_dev, enum ocs_hcu_algo algo,
99*fbf31dd5STom Zanussi 		   void *data, size_t data_len, u8 *dgst, size_t dgst_len);
100*fbf31dd5STom Zanussi 
101*fbf31dd5STom Zanussi int ocs_hcu_hmac(struct ocs_hcu_dev *hcu_dev, enum ocs_hcu_algo algo,
102*fbf31dd5STom Zanussi 		 const u8 *key, size_t key_len,
103*fbf31dd5STom Zanussi 		 const struct ocs_hcu_dma_list *dma_list,
104*fbf31dd5STom Zanussi 		 u8 *dgst, size_t dgst_len);
105*fbf31dd5STom Zanussi 
106*fbf31dd5STom Zanussi #endif /* _CRYPTO_OCS_HCU_H */
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