1*fbf31dd5STom Zanussi /* SPDX-License-Identifier: GPL-2.0-only */ 2*fbf31dd5STom Zanussi /* 3*fbf31dd5STom Zanussi * Intel Keem Bay OCS AES Crypto Driver. 4*fbf31dd5STom Zanussi * 5*fbf31dd5STom Zanussi * Copyright (C) 2018-2020 Intel Corporation 6*fbf31dd5STom Zanussi */ 7*fbf31dd5STom Zanussi 8*fbf31dd5STom Zanussi #ifndef _CRYPTO_OCS_AES_H 9*fbf31dd5STom Zanussi #define _CRYPTO_OCS_AES_H 10*fbf31dd5STom Zanussi 11*fbf31dd5STom Zanussi #include <linux/dma-mapping.h> 12*fbf31dd5STom Zanussi 13*fbf31dd5STom Zanussi enum ocs_cipher { 14*fbf31dd5STom Zanussi OCS_AES = 0, 15*fbf31dd5STom Zanussi OCS_SM4 = 1, 16*fbf31dd5STom Zanussi }; 17*fbf31dd5STom Zanussi 18*fbf31dd5STom Zanussi enum ocs_mode { 19*fbf31dd5STom Zanussi OCS_MODE_ECB = 0, 20*fbf31dd5STom Zanussi OCS_MODE_CBC = 1, 21*fbf31dd5STom Zanussi OCS_MODE_CTR = 2, 22*fbf31dd5STom Zanussi OCS_MODE_CCM = 6, 23*fbf31dd5STom Zanussi OCS_MODE_GCM = 7, 24*fbf31dd5STom Zanussi OCS_MODE_CTS = 9, 25*fbf31dd5STom Zanussi }; 26*fbf31dd5STom Zanussi 27*fbf31dd5STom Zanussi enum ocs_instruction { 28*fbf31dd5STom Zanussi OCS_ENCRYPT = 0, 29*fbf31dd5STom Zanussi OCS_DECRYPT = 1, 30*fbf31dd5STom Zanussi OCS_EXPAND = 2, 31*fbf31dd5STom Zanussi OCS_BYPASS = 3, 32*fbf31dd5STom Zanussi }; 33*fbf31dd5STom Zanussi 34*fbf31dd5STom Zanussi /** 35*fbf31dd5STom Zanussi * struct ocs_aes_dev - AES device context. 36*fbf31dd5STom Zanussi * @list: List head for insertion into device list hold 37*fbf31dd5STom Zanussi * by driver. 38*fbf31dd5STom Zanussi * @dev: OCS AES device. 39*fbf31dd5STom Zanussi * @irq: IRQ number. 40*fbf31dd5STom Zanussi * @base_reg: IO base address of OCS AES. 41*fbf31dd5STom Zanussi * @irq_copy_completion: Completion to indicate IRQ has been triggered. 42*fbf31dd5STom Zanussi * @dma_err_mask: Error reported by OCS DMA interrupts. 43*fbf31dd5STom Zanussi * @engine: Crypto engine for the device. 44*fbf31dd5STom Zanussi */ 45*fbf31dd5STom Zanussi struct ocs_aes_dev { 46*fbf31dd5STom Zanussi struct list_head list; 47*fbf31dd5STom Zanussi struct device *dev; 48*fbf31dd5STom Zanussi int irq; 49*fbf31dd5STom Zanussi void __iomem *base_reg; 50*fbf31dd5STom Zanussi struct completion irq_completion; 51*fbf31dd5STom Zanussi u32 dma_err_mask; 52*fbf31dd5STom Zanussi struct crypto_engine *engine; 53*fbf31dd5STom Zanussi }; 54*fbf31dd5STom Zanussi 55*fbf31dd5STom Zanussi /** 56*fbf31dd5STom Zanussi * struct ocs_dll_desc - Descriptor of an OCS DMA Linked List. 57*fbf31dd5STom Zanussi * @vaddr: Virtual address of the linked list head. 58*fbf31dd5STom Zanussi * @dma_addr: DMA address of the linked list head. 59*fbf31dd5STom Zanussi * @size: Size (in bytes) of the linked list. 60*fbf31dd5STom Zanussi */ 61*fbf31dd5STom Zanussi struct ocs_dll_desc { 62*fbf31dd5STom Zanussi void *vaddr; 63*fbf31dd5STom Zanussi dma_addr_t dma_addr; 64*fbf31dd5STom Zanussi size_t size; 65*fbf31dd5STom Zanussi }; 66*fbf31dd5STom Zanussi 67*fbf31dd5STom Zanussi int ocs_aes_set_key(struct ocs_aes_dev *aes_dev, const u32 key_size, 68*fbf31dd5STom Zanussi const u8 *key, const enum ocs_cipher cipher); 69*fbf31dd5STom Zanussi 70*fbf31dd5STom Zanussi int ocs_aes_op(struct ocs_aes_dev *aes_dev, 71*fbf31dd5STom Zanussi enum ocs_mode mode, 72*fbf31dd5STom Zanussi enum ocs_cipher cipher, 73*fbf31dd5STom Zanussi enum ocs_instruction instruction, 74*fbf31dd5STom Zanussi dma_addr_t dst_dma_list, 75*fbf31dd5STom Zanussi dma_addr_t src_dma_list, 76*fbf31dd5STom Zanussi u32 src_size, 77*fbf31dd5STom Zanussi u8 *iv, 78*fbf31dd5STom Zanussi u32 iv_size); 79*fbf31dd5STom Zanussi 80*fbf31dd5STom Zanussi /** 81*fbf31dd5STom Zanussi * ocs_aes_bypass_op() - Use OCS DMA to copy data. 82*fbf31dd5STom Zanussi * @aes_dev: The OCS AES device to use. 83*fbf31dd5STom Zanussi * @dst_dma_list: The OCS DMA list mapping the memory where input data 84*fbf31dd5STom Zanussi * will be copied to. 85*fbf31dd5STom Zanussi * @src_dma_list: The OCS DMA list mapping input data. 86*fbf31dd5STom Zanussi * @src_size: The amount of data to copy. 87*fbf31dd5STom Zanussi */ 88*fbf31dd5STom Zanussi static inline int ocs_aes_bypass_op(struct ocs_aes_dev *aes_dev, 89*fbf31dd5STom Zanussi dma_addr_t dst_dma_list, 90*fbf31dd5STom Zanussi dma_addr_t src_dma_list, u32 src_size) 91*fbf31dd5STom Zanussi { 92*fbf31dd5STom Zanussi return ocs_aes_op(aes_dev, OCS_MODE_ECB, OCS_AES, OCS_BYPASS, 93*fbf31dd5STom Zanussi dst_dma_list, src_dma_list, src_size, NULL, 0); 94*fbf31dd5STom Zanussi } 95*fbf31dd5STom Zanussi 96*fbf31dd5STom Zanussi int ocs_aes_gcm_op(struct ocs_aes_dev *aes_dev, 97*fbf31dd5STom Zanussi enum ocs_cipher cipher, 98*fbf31dd5STom Zanussi enum ocs_instruction instruction, 99*fbf31dd5STom Zanussi dma_addr_t dst_dma_list, 100*fbf31dd5STom Zanussi dma_addr_t src_dma_list, 101*fbf31dd5STom Zanussi u32 src_size, 102*fbf31dd5STom Zanussi const u8 *iv, 103*fbf31dd5STom Zanussi dma_addr_t aad_dma_list, 104*fbf31dd5STom Zanussi u32 aad_size, 105*fbf31dd5STom Zanussi u8 *out_tag, 106*fbf31dd5STom Zanussi u32 tag_size); 107*fbf31dd5STom Zanussi 108*fbf31dd5STom Zanussi int ocs_aes_ccm_op(struct ocs_aes_dev *aes_dev, 109*fbf31dd5STom Zanussi enum ocs_cipher cipher, 110*fbf31dd5STom Zanussi enum ocs_instruction instruction, 111*fbf31dd5STom Zanussi dma_addr_t dst_dma_list, 112*fbf31dd5STom Zanussi dma_addr_t src_dma_list, 113*fbf31dd5STom Zanussi u32 src_size, 114*fbf31dd5STom Zanussi u8 *iv, 115*fbf31dd5STom Zanussi dma_addr_t adata_dma_list, 116*fbf31dd5STom Zanussi u32 adata_size, 117*fbf31dd5STom Zanussi u8 *in_tag, 118*fbf31dd5STom Zanussi u32 tag_size); 119*fbf31dd5STom Zanussi 120*fbf31dd5STom Zanussi int ocs_create_linked_list_from_sg(const struct ocs_aes_dev *aes_dev, 121*fbf31dd5STom Zanussi struct scatterlist *sg, 122*fbf31dd5STom Zanussi int sg_dma_count, 123*fbf31dd5STom Zanussi struct ocs_dll_desc *dll_desc, 124*fbf31dd5STom Zanussi size_t data_size, 125*fbf31dd5STom Zanussi size_t data_offset); 126*fbf31dd5STom Zanussi 127*fbf31dd5STom Zanussi irqreturn_t ocs_aes_irq_handler(int irq, void *dev_id); 128*fbf31dd5STom Zanussi 129*fbf31dd5STom Zanussi #endif 130