1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2021 Intel Corporation. All rights rsvd. */ 3 4 #include <linux/module.h> 5 #include <linux/kernel.h> 6 #include <linux/highmem.h> 7 #include <linux/mm.h> 8 #include <linux/slab.h> 9 #include <linux/delay.h> 10 #include <linux/smp.h> 11 #include <uapi/linux/idxd.h> 12 #include <linux/idxd.h> 13 #include <linux/dmaengine.h> 14 #include "../../dma/idxd/idxd.h" 15 #include <linux/debugfs.h> 16 #include <crypto/internal/acompress.h> 17 #include "iaa_crypto.h" 18 #include "iaa_crypto_stats.h" 19 20 static atomic64_t total_comp_calls; 21 static atomic64_t total_decomp_calls; 22 static atomic64_t total_sw_decomp_calls; 23 static atomic64_t total_comp_bytes_out; 24 static atomic64_t total_decomp_bytes_in; 25 static atomic64_t total_completion_einval_errors; 26 static atomic64_t total_completion_timeout_errors; 27 static atomic64_t total_completion_comp_buf_overflow_errors; 28 29 static struct dentry *iaa_crypto_debugfs_root; 30 31 void update_total_comp_calls(void) 32 { 33 atomic64_inc(&total_comp_calls); 34 } 35 36 void update_total_comp_bytes_out(int n) 37 { 38 atomic64_add(n, &total_comp_bytes_out); 39 } 40 41 void update_total_decomp_calls(void) 42 { 43 atomic64_inc(&total_decomp_calls); 44 } 45 46 void update_total_sw_decomp_calls(void) 47 { 48 atomic64_inc(&total_sw_decomp_calls); 49 } 50 51 void update_total_decomp_bytes_in(int n) 52 { 53 atomic64_add(n, &total_decomp_bytes_in); 54 } 55 56 void update_completion_einval_errs(void) 57 { 58 atomic64_inc(&total_completion_einval_errors); 59 } 60 61 void update_completion_timeout_errs(void) 62 { 63 atomic64_inc(&total_completion_timeout_errors); 64 } 65 66 void update_completion_comp_buf_overflow_errs(void) 67 { 68 atomic64_inc(&total_completion_comp_buf_overflow_errors); 69 } 70 71 void update_wq_comp_calls(struct idxd_wq *idxd_wq) 72 { 73 struct iaa_wq *wq = idxd_wq_get_private(idxd_wq); 74 75 atomic64_inc(&wq->comp_calls); 76 atomic64_inc(&wq->iaa_device->comp_calls); 77 } 78 79 void update_wq_comp_bytes(struct idxd_wq *idxd_wq, int n) 80 { 81 struct iaa_wq *wq = idxd_wq_get_private(idxd_wq); 82 83 atomic64_add(n, &wq->comp_bytes); 84 atomic64_add(n, &wq->iaa_device->comp_bytes); 85 } 86 87 void update_wq_decomp_calls(struct idxd_wq *idxd_wq) 88 { 89 struct iaa_wq *wq = idxd_wq_get_private(idxd_wq); 90 91 atomic64_inc(&wq->decomp_calls); 92 atomic64_inc(&wq->iaa_device->decomp_calls); 93 } 94 95 void update_wq_decomp_bytes(struct idxd_wq *idxd_wq, int n) 96 { 97 struct iaa_wq *wq = idxd_wq_get_private(idxd_wq); 98 99 atomic64_add(n, &wq->decomp_bytes); 100 atomic64_add(n, &wq->iaa_device->decomp_bytes); 101 } 102 103 static void reset_iaa_crypto_stats(void) 104 { 105 atomic64_set(&total_comp_calls, 0); 106 atomic64_set(&total_decomp_calls, 0); 107 atomic64_set(&total_sw_decomp_calls, 0); 108 atomic64_set(&total_comp_bytes_out, 0); 109 atomic64_set(&total_decomp_bytes_in, 0); 110 atomic64_set(&total_completion_einval_errors, 0); 111 atomic64_set(&total_completion_timeout_errors, 0); 112 atomic64_set(&total_completion_comp_buf_overflow_errors, 0); 113 } 114 115 static void reset_wq_stats(struct iaa_wq *wq) 116 { 117 atomic64_set(&wq->comp_calls, 0); 118 atomic64_set(&wq->comp_bytes, 0); 119 atomic64_set(&wq->decomp_calls, 0); 120 atomic64_set(&wq->decomp_bytes, 0); 121 } 122 123 static void reset_device_stats(struct iaa_device *iaa_device) 124 { 125 struct iaa_wq *iaa_wq; 126 127 atomic64_set(&iaa_device->comp_calls, 0); 128 atomic64_set(&iaa_device->comp_bytes, 0); 129 atomic64_set(&iaa_device->decomp_calls, 0); 130 atomic64_set(&iaa_device->decomp_bytes, 0); 131 132 list_for_each_entry(iaa_wq, &iaa_device->wqs, list) 133 reset_wq_stats(iaa_wq); 134 } 135 136 static void wq_show(struct seq_file *m, struct iaa_wq *iaa_wq) 137 { 138 seq_printf(m, " name: %s\n", iaa_wq->wq->name); 139 seq_printf(m, " comp_calls: %llu\n", 140 atomic64_read(&iaa_wq->comp_calls)); 141 seq_printf(m, " comp_bytes: %llu\n", 142 atomic64_read(&iaa_wq->comp_bytes)); 143 seq_printf(m, " decomp_calls: %llu\n", 144 atomic64_read(&iaa_wq->decomp_calls)); 145 seq_printf(m, " decomp_bytes: %llu\n\n", 146 atomic64_read(&iaa_wq->decomp_bytes)); 147 } 148 149 static void device_stats_show(struct seq_file *m, struct iaa_device *iaa_device) 150 { 151 struct iaa_wq *iaa_wq; 152 153 seq_puts(m, "iaa device:\n"); 154 seq_printf(m, " id: %d\n", iaa_device->idxd->id); 155 seq_printf(m, " n_wqs: %d\n", iaa_device->n_wq); 156 seq_printf(m, " comp_calls: %llu\n", 157 atomic64_read(&iaa_device->comp_calls)); 158 seq_printf(m, " comp_bytes: %llu\n", 159 atomic64_read(&iaa_device->comp_bytes)); 160 seq_printf(m, " decomp_calls: %llu\n", 161 atomic64_read(&iaa_device->decomp_calls)); 162 seq_printf(m, " decomp_bytes: %llu\n", 163 atomic64_read(&iaa_device->decomp_bytes)); 164 seq_puts(m, " wqs:\n"); 165 166 list_for_each_entry(iaa_wq, &iaa_device->wqs, list) 167 wq_show(m, iaa_wq); 168 } 169 170 static int global_stats_show(struct seq_file *m, void *v) 171 { 172 seq_puts(m, "global stats:\n"); 173 seq_printf(m, " total_comp_calls: %llu\n", 174 atomic64_read(&total_comp_calls)); 175 seq_printf(m, " total_decomp_calls: %llu\n", 176 atomic64_read(&total_decomp_calls)); 177 seq_printf(m, " total_sw_decomp_calls: %llu\n", 178 atomic64_read(&total_sw_decomp_calls)); 179 seq_printf(m, " total_comp_bytes_out: %llu\n", 180 atomic64_read(&total_comp_bytes_out)); 181 seq_printf(m, " total_decomp_bytes_in: %llu\n", 182 atomic64_read(&total_decomp_bytes_in)); 183 seq_printf(m, " total_completion_einval_errors: %llu\n", 184 atomic64_read(&total_completion_einval_errors)); 185 seq_printf(m, " total_completion_timeout_errors: %llu\n", 186 atomic64_read(&total_completion_timeout_errors)); 187 seq_printf(m, " total_completion_comp_buf_overflow_errors: %llu\n\n", 188 atomic64_read(&total_completion_comp_buf_overflow_errors)); 189 190 return 0; 191 } 192 193 static int wq_stats_show(struct seq_file *m, void *v) 194 { 195 struct iaa_device *iaa_device; 196 197 mutex_lock(&iaa_devices_lock); 198 199 list_for_each_entry(iaa_device, &iaa_devices, list) 200 device_stats_show(m, iaa_device); 201 202 mutex_unlock(&iaa_devices_lock); 203 204 return 0; 205 } 206 207 static int iaa_crypto_stats_reset(void *data, u64 value) 208 { 209 struct iaa_device *iaa_device; 210 211 reset_iaa_crypto_stats(); 212 213 mutex_lock(&iaa_devices_lock); 214 215 list_for_each_entry(iaa_device, &iaa_devices, list) 216 reset_device_stats(iaa_device); 217 218 mutex_unlock(&iaa_devices_lock); 219 220 return 0; 221 } 222 223 static int wq_stats_open(struct inode *inode, struct file *file) 224 { 225 return single_open(file, wq_stats_show, file); 226 } 227 228 static const struct file_operations wq_stats_fops = { 229 .open = wq_stats_open, 230 .read = seq_read, 231 .llseek = seq_lseek, 232 .release = single_release, 233 }; 234 235 static int global_stats_open(struct inode *inode, struct file *file) 236 { 237 return single_open(file, global_stats_show, file); 238 } 239 240 static const struct file_operations global_stats_fops = { 241 .open = global_stats_open, 242 .read = seq_read, 243 .llseek = seq_lseek, 244 .release = single_release, 245 }; 246 247 DEFINE_DEBUGFS_ATTRIBUTE(wq_stats_reset_fops, NULL, iaa_crypto_stats_reset, "%llu\n"); 248 249 int __init iaa_crypto_debugfs_init(void) 250 { 251 if (!debugfs_initialized()) 252 return -ENODEV; 253 254 iaa_crypto_debugfs_root = debugfs_create_dir("iaa_crypto", NULL); 255 256 debugfs_create_file("global_stats", 0644, iaa_crypto_debugfs_root, NULL, 257 &global_stats_fops); 258 debugfs_create_file("wq_stats", 0644, iaa_crypto_debugfs_root, NULL, 259 &wq_stats_fops); 260 debugfs_create_file("stats_reset", 0644, iaa_crypto_debugfs_root, NULL, 261 &wq_stats_reset_fops); 262 263 return 0; 264 } 265 266 void __exit iaa_crypto_debugfs_cleanup(void) 267 { 268 debugfs_remove_recursive(iaa_crypto_debugfs_root); 269 } 270 271 MODULE_LICENSE("GPL"); 272