1*09463346SWeili Qian // SPDX-License-Identifier: GPL-2.0 2*09463346SWeili Qian /* Copyright (c) 2024 HiSilicon Limited. */ 3*09463346SWeili Qian 4*09463346SWeili Qian #include <linux/bitops.h> 5*09463346SWeili Qian #include <linux/io.h> 6*09463346SWeili Qian #include <linux/uacce.h> 7*09463346SWeili Qian #include "zip.h" 8*09463346SWeili Qian 9*09463346SWeili Qian /* memory */ 10*09463346SWeili Qian #define DAE_MEM_START_OFFSET 0x331040 11*09463346SWeili Qian #define DAE_MEM_DONE_OFFSET 0x331044 12*09463346SWeili Qian #define DAE_MEM_START_MASK 0x1 13*09463346SWeili Qian #define DAE_MEM_DONE_MASK 0x1 14*09463346SWeili Qian #define DAE_REG_RD_INTVRL_US 10 15*09463346SWeili Qian #define DAE_REG_RD_TMOUT_US USEC_PER_SEC 16*09463346SWeili Qian 17*09463346SWeili Qian #define DAE_ALG_NAME "hashagg" 18*09463346SWeili Qian 19*09463346SWeili Qian static inline bool dae_is_support(struct hisi_qm *qm) 20*09463346SWeili Qian { 21*09463346SWeili Qian if (test_bit(QM_SUPPORT_DAE, &qm->caps)) 22*09463346SWeili Qian return true; 23*09463346SWeili Qian 24*09463346SWeili Qian return false; 25*09463346SWeili Qian } 26*09463346SWeili Qian 27*09463346SWeili Qian int hisi_dae_set_user_domain(struct hisi_qm *qm) 28*09463346SWeili Qian { 29*09463346SWeili Qian u32 val; 30*09463346SWeili Qian int ret; 31*09463346SWeili Qian 32*09463346SWeili Qian if (!dae_is_support(qm)) 33*09463346SWeili Qian return 0; 34*09463346SWeili Qian 35*09463346SWeili Qian val = readl(qm->io_base + DAE_MEM_START_OFFSET); 36*09463346SWeili Qian val |= DAE_MEM_START_MASK; 37*09463346SWeili Qian writel(val, qm->io_base + DAE_MEM_START_OFFSET); 38*09463346SWeili Qian ret = readl_relaxed_poll_timeout(qm->io_base + DAE_MEM_DONE_OFFSET, val, 39*09463346SWeili Qian val & DAE_MEM_DONE_MASK, 40*09463346SWeili Qian DAE_REG_RD_INTVRL_US, DAE_REG_RD_TMOUT_US); 41*09463346SWeili Qian if (ret) 42*09463346SWeili Qian pci_err(qm->pdev, "failed to init dae memory!\n"); 43*09463346SWeili Qian 44*09463346SWeili Qian return ret; 45*09463346SWeili Qian } 46*09463346SWeili Qian 47*09463346SWeili Qian int hisi_dae_set_alg(struct hisi_qm *qm) 48*09463346SWeili Qian { 49*09463346SWeili Qian size_t len; 50*09463346SWeili Qian 51*09463346SWeili Qian if (!dae_is_support(qm)) 52*09463346SWeili Qian return 0; 53*09463346SWeili Qian 54*09463346SWeili Qian if (!qm->uacce) 55*09463346SWeili Qian return 0; 56*09463346SWeili Qian 57*09463346SWeili Qian len = strlen(qm->uacce->algs); 58*09463346SWeili Qian /* A line break may be required */ 59*09463346SWeili Qian if (len + strlen(DAE_ALG_NAME) + 1 >= QM_DEV_ALG_MAX_LEN) { 60*09463346SWeili Qian pci_err(qm->pdev, "algorithm name is too long!\n"); 61*09463346SWeili Qian return -EINVAL; 62*09463346SWeili Qian } 63*09463346SWeili Qian 64*09463346SWeili Qian if (len) 65*09463346SWeili Qian strcat((char *)qm->uacce->algs, "\n"); 66*09463346SWeili Qian 67*09463346SWeili Qian strcat((char *)qm->uacce->algs, DAE_ALG_NAME); 68*09463346SWeili Qian 69*09463346SWeili Qian return 0; 70*09463346SWeili Qian } 71