xref: /linux/drivers/crypto/hisilicon/sec2/sec_crypto.c (revision 21452eaa06edb5f6038720e643aed0bbfffad9c3)
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 HiSilicon Limited. */
3 
4 #include <crypto/aes.h>
5 #include <crypto/aead.h>
6 #include <crypto/algapi.h>
7 #include <crypto/authenc.h>
8 #include <crypto/des.h>
9 #include <crypto/hash.h>
10 #include <crypto/internal/aead.h>
11 #include <crypto/internal/des.h>
12 #include <crypto/sha1.h>
13 #include <crypto/sha2.h>
14 #include <crypto/skcipher.h>
15 #include <crypto/xts.h>
16 #include <linux/crypto.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/idr.h>
19 
20 #include "sec.h"
21 #include "sec_crypto.h"
22 
23 #define SEC_PRIORITY		4001
24 #define SEC_XTS_MIN_KEY_SIZE	(2 * AES_MIN_KEY_SIZE)
25 #define SEC_XTS_MID_KEY_SIZE	(3 * AES_MIN_KEY_SIZE)
26 #define SEC_XTS_MAX_KEY_SIZE	(2 * AES_MAX_KEY_SIZE)
27 #define SEC_DES3_2KEY_SIZE	(2 * DES_KEY_SIZE)
28 #define SEC_DES3_3KEY_SIZE	(3 * DES_KEY_SIZE)
29 
30 /* SEC sqe(bd) bit operational relative MACRO */
31 #define SEC_DE_OFFSET		1
32 #define SEC_CIPHER_OFFSET	4
33 #define SEC_SCENE_OFFSET	3
34 #define SEC_DST_SGL_OFFSET	2
35 #define SEC_SRC_SGL_OFFSET	7
36 #define SEC_CKEY_OFFSET		9
37 #define SEC_CMODE_OFFSET	12
38 #define SEC_AKEY_OFFSET         5
39 #define SEC_AEAD_ALG_OFFSET     11
40 #define SEC_AUTH_OFFSET		6
41 
42 #define SEC_DE_OFFSET_V3		9
43 #define SEC_SCENE_OFFSET_V3	5
44 #define SEC_CKEY_OFFSET_V3	13
45 #define SEC_CTR_CNT_OFFSET	25
46 #define SEC_CTR_CNT_ROLLOVER	2
47 #define SEC_SRC_SGL_OFFSET_V3	11
48 #define SEC_DST_SGL_OFFSET_V3	14
49 #define SEC_CALG_OFFSET_V3	4
50 #define SEC_AKEY_OFFSET_V3	9
51 #define SEC_MAC_OFFSET_V3	4
52 #define SEC_AUTH_ALG_OFFSET_V3	15
53 #define SEC_CIPHER_AUTH_V3	0xbf
54 #define SEC_AUTH_CIPHER_V3	0x40
55 #define SEC_FLAG_OFFSET		7
56 #define SEC_FLAG_MASK		0x0780
57 #define SEC_DONE_MASK		0x0001
58 #define SEC_ICV_MASK		0x000E
59 
60 #define SEC_TOTAL_IV_SZ(depth)	(SEC_IV_SIZE * (depth))
61 #define SEC_SGL_SGE_NR		128
62 #define SEC_CIPHER_AUTH		0xfe
63 #define SEC_AUTH_CIPHER		0x1
64 #define SEC_MAX_MAC_LEN		64
65 #define SEC_MAX_AAD_LEN		65535
66 #define SEC_MAX_CCM_AAD_LEN	65279
67 #define SEC_TOTAL_MAC_SZ(depth) (SEC_MAX_MAC_LEN * (depth))
68 
69 #define SEC_PBUF_IV_OFFSET		SEC_PBUF_SZ
70 #define SEC_PBUF_MAC_OFFSET		(SEC_PBUF_SZ + SEC_IV_SIZE)
71 #define SEC_PBUF_PKG		(SEC_PBUF_SZ + SEC_IV_SIZE +	\
72 			SEC_MAX_MAC_LEN * 2)
73 #define SEC_PBUF_NUM		(PAGE_SIZE / SEC_PBUF_PKG)
74 #define SEC_PBUF_PAGE_NUM(depth)	((depth) / SEC_PBUF_NUM)
75 #define SEC_PBUF_LEFT_SZ(depth)		(SEC_PBUF_PKG * ((depth) -	\
76 				SEC_PBUF_PAGE_NUM(depth) * SEC_PBUF_NUM))
77 #define SEC_TOTAL_PBUF_SZ(depth)	(PAGE_SIZE * SEC_PBUF_PAGE_NUM(depth) +	\
78 				SEC_PBUF_LEFT_SZ(depth))
79 
80 #define SEC_SQE_CFLAG		2
81 #define SEC_SQE_AEAD_FLAG	3
82 #define SEC_SQE_DONE		0x1
83 #define SEC_ICV_ERR		0x2
84 #define MAC_LEN_MASK		0x1U
85 #define MAX_INPUT_DATA_LEN	0xFFFE00
86 #define BITS_MASK		0xFF
87 #define WORD_MASK		0x3
88 #define BYTE_BITS		0x8
89 #define BYTES_TO_WORDS(bcount)	((bcount) >> 2)
90 #define SEC_XTS_NAME_SZ		0x3
91 #define IV_CM_CAL_NUM		2
92 #define IV_CL_MASK		0x7
93 #define IV_CL_MIN		2
94 #define IV_CL_MID		4
95 #define IV_CL_MAX		8
96 #define IV_FLAGS_OFFSET	0x6
97 #define IV_CM_OFFSET		0x3
98 #define IV_LAST_BYTE1		1
99 #define IV_LAST_BYTE2		2
100 #define IV_LAST_BYTE_MASK	0xFF
101 #define IV_CTR_INIT		0x1
102 #define IV_BYTE_OFFSET		0x8
103 #define SEC_GCM_MIN_AUTH_SZ	0x8
104 #define SEC_RETRY_MAX_CNT	5U
105 
106 static DEFINE_MUTEX(sec_algs_lock);
107 static unsigned int sec_available_devs;
108 
109 struct sec_skcipher {
110 	u64 alg_msk;
111 	struct skcipher_alg alg;
112 };
113 
114 struct sec_aead {
115 	u64 alg_msk;
116 	struct aead_alg alg;
117 };
118 
119 static int sec_aead_soft_crypto(struct sec_ctx *ctx,
120 				struct aead_request *aead_req,
121 				bool encrypt);
122 static int sec_skcipher_soft_crypto(struct sec_ctx *ctx,
123 				    struct skcipher_request *sreq, bool encrypt);
124 
125 static int sec_alloc_req_id(struct sec_req *req, struct sec_qp_ctx *qp_ctx)
126 {
127 	int req_id;
128 
129 	spin_lock_bh(&qp_ctx->id_lock);
130 	req_id = idr_alloc_cyclic(&qp_ctx->req_idr, NULL, 0, qp_ctx->qp->sq_depth, GFP_ATOMIC);
131 	spin_unlock_bh(&qp_ctx->id_lock);
132 	return req_id;
133 }
134 
135 static void sec_free_req_id(struct sec_req *req)
136 {
137 	struct sec_qp_ctx *qp_ctx = req->qp_ctx;
138 	int req_id = req->req_id;
139 
140 	if (unlikely(req_id < 0 || req_id >= qp_ctx->qp->sq_depth)) {
141 		dev_err(req->ctx->dev, "free request id invalid!\n");
142 		return;
143 	}
144 
145 	spin_lock_bh(&qp_ctx->id_lock);
146 	idr_remove(&qp_ctx->req_idr, req_id);
147 	spin_unlock_bh(&qp_ctx->id_lock);
148 }
149 
150 static void pre_parse_finished_bd(struct bd_status *status, void *resp)
151 {
152 	struct sec_sqe *bd = resp;
153 
154 	status->done = le16_to_cpu(bd->type2.done_flag) & SEC_DONE_MASK;
155 	status->icv = (le16_to_cpu(bd->type2.done_flag) & SEC_ICV_MASK) >> 1;
156 	status->flag = (le16_to_cpu(bd->type2.done_flag) &
157 					SEC_FLAG_MASK) >> SEC_FLAG_OFFSET;
158 	status->tag = le16_to_cpu(bd->type2.tag);
159 	status->err_type = bd->type2.error_type;
160 }
161 
162 static void pre_parse_finished_bd3(struct bd_status *status, void *resp)
163 {
164 	struct sec_sqe3 *bd3 = resp;
165 
166 	status->done = le16_to_cpu(bd3->done_flag) & SEC_DONE_MASK;
167 	status->icv = (le16_to_cpu(bd3->done_flag) & SEC_ICV_MASK) >> 1;
168 	status->flag = (le16_to_cpu(bd3->done_flag) &
169 					SEC_FLAG_MASK) >> SEC_FLAG_OFFSET;
170 	status->tag = le64_to_cpu(bd3->tag);
171 	status->err_type = bd3->error_type;
172 }
173 
174 static int sec_cb_status_check(struct sec_req *req,
175 			       struct bd_status *status)
176 {
177 	struct sec_ctx *ctx = req->ctx;
178 
179 	if (unlikely(req->err_type || status->done != SEC_SQE_DONE)) {
180 		dev_err_ratelimited(ctx->dev, "err_type[%d], done[%u]\n",
181 				    req->err_type, status->done);
182 		return -EIO;
183 	}
184 
185 	if (unlikely(ctx->alg_type == SEC_SKCIPHER)) {
186 		if (unlikely(status->flag != SEC_SQE_CFLAG)) {
187 			dev_err_ratelimited(ctx->dev, "flag[%u]\n",
188 					    status->flag);
189 			return -EIO;
190 		}
191 	} else if (unlikely(ctx->alg_type == SEC_AEAD)) {
192 		if (unlikely(status->flag != SEC_SQE_AEAD_FLAG ||
193 			     status->icv == SEC_ICV_ERR)) {
194 			dev_err_ratelimited(ctx->dev,
195 					    "flag[%u], icv[%u]\n",
196 					    status->flag, status->icv);
197 			return -EBADMSG;
198 		}
199 	}
200 
201 	return 0;
202 }
203 
204 static int qp_send_message(struct sec_req *req)
205 {
206 	struct sec_qp_ctx *qp_ctx = req->qp_ctx;
207 	int ret;
208 
209 	if (atomic_read(&qp_ctx->qp->qp_status.used) == qp_ctx->qp->sq_depth - 1)
210 		return -EBUSY;
211 
212 	spin_lock_bh(&qp_ctx->req_lock);
213 	if (atomic_read(&qp_ctx->qp->qp_status.used) == qp_ctx->qp->sq_depth - 1) {
214 		spin_unlock_bh(&qp_ctx->req_lock);
215 		return -EBUSY;
216 	}
217 
218 	if (qp_ctx->ctx->type_supported == SEC_BD_TYPE2) {
219 		req->sec_sqe.type2.tag = cpu_to_le16((u16)qp_ctx->send_head);
220 		qp_ctx->req_list[qp_ctx->send_head] = req;
221 	}
222 
223 	ret = hisi_qp_send(qp_ctx->qp, &req->sec_sqe);
224 	if (ret) {
225 		spin_unlock_bh(&qp_ctx->req_lock);
226 		return ret;
227 	}
228 	if (qp_ctx->ctx->type_supported == SEC_BD_TYPE2)
229 		qp_ctx->send_head = (qp_ctx->send_head + 1) % qp_ctx->qp->sq_depth;
230 
231 	spin_unlock_bh(&qp_ctx->req_lock);
232 
233 	atomic64_inc(&req->ctx->sec->debug.dfx.send_cnt);
234 	return -EINPROGRESS;
235 }
236 
237 static void sec_alg_send_backlog_soft(struct sec_ctx *ctx, struct sec_qp_ctx *qp_ctx)
238 {
239 	struct sec_req *req, *tmp;
240 	int ret;
241 
242 	list_for_each_entry_safe(req, tmp, &qp_ctx->qp->backlog.list, list) {
243 		list_del(&req->list);
244 		ctx->req_op->buf_unmap(ctx, req);
245 		if (req->req_id >= 0)
246 			sec_free_req_id(req);
247 
248 		if (ctx->alg_type == SEC_AEAD)
249 			ret = sec_aead_soft_crypto(ctx, req->aead_req.aead_req,
250 						   req->c_req.encrypt);
251 		else
252 			ret = sec_skcipher_soft_crypto(ctx, req->c_req.sk_req,
253 						       req->c_req.encrypt);
254 
255 		/* Wake up the busy thread first, then return the errno. */
256 		crypto_request_complete(req->base, -EINPROGRESS);
257 		crypto_request_complete(req->base, ret);
258 	}
259 }
260 
261 static void sec_alg_send_backlog(struct sec_ctx *ctx, struct sec_qp_ctx *qp_ctx)
262 {
263 	struct hisi_qp *qp = qp_ctx->qp;
264 	struct sec_req *req, *tmp;
265 	int ret;
266 
267 	spin_lock_bh(&qp->backlog.lock);
268 	list_for_each_entry_safe(req, tmp, &qp->backlog.list, list) {
269 		ret = qp_send_message(req);
270 		switch (ret) {
271 		case -EINPROGRESS:
272 			list_del(&req->list);
273 			crypto_request_complete(req->base, -EINPROGRESS);
274 			break;
275 		case -EBUSY:
276 			/* Device is busy and stop send any request. */
277 			goto unlock;
278 		default:
279 			/* Release memory resources and send all requests through software. */
280 			sec_alg_send_backlog_soft(ctx, qp_ctx);
281 			goto unlock;
282 		}
283 	}
284 
285 unlock:
286 	spin_unlock_bh(&qp->backlog.lock);
287 }
288 
289 static void sec_req_cb(struct hisi_qp *qp, void *resp)
290 {
291 	const struct sec_sqe *sqe = qp->msg[qp->qp_status.cq_head];
292 	struct sec_req *req = container_of(sqe, struct sec_req, sec_sqe);
293 	struct sec_ctx *ctx = req->ctx;
294 	struct sec_dfx *dfx = &ctx->sec->debug.dfx;
295 	struct bd_status status;
296 	int err;
297 
298 	pre_parse_finished_bd(&status, resp);
299 
300 	req->err_type = status.err_type;
301 	err = sec_cb_status_check(req, &status);
302 	if (err)
303 		atomic64_inc(&dfx->done_flag_cnt);
304 
305 	atomic64_inc(&dfx->recv_cnt);
306 
307 	ctx->req_op->buf_unmap(ctx, req);
308 	ctx->req_op->callback(ctx, req, err);
309 }
310 
311 static void sec_req_cb3(struct hisi_qp *qp, void *resp)
312 {
313 	struct bd_status status;
314 	struct sec_ctx *ctx;
315 	struct sec_dfx *dfx;
316 	struct sec_req *req;
317 	int err;
318 
319 	pre_parse_finished_bd3(&status, resp);
320 
321 	req = (void *)(uintptr_t)status.tag;
322 	req->err_type = status.err_type;
323 	ctx = req->ctx;
324 	dfx = &ctx->sec->debug.dfx;
325 
326 	err = sec_cb_status_check(req, &status);
327 	if (err)
328 		atomic64_inc(&dfx->done_flag_cnt);
329 
330 	atomic64_inc(&dfx->recv_cnt);
331 
332 	ctx->req_op->buf_unmap(ctx, req);
333 	ctx->req_op->callback(ctx, req, err);
334 }
335 
336 static int sec_alg_send_message_retry(struct sec_req *req)
337 {
338 	int ctr = 0;
339 	int ret;
340 
341 	do {
342 		ret = qp_send_message(req);
343 	} while (ret == -EBUSY && ctr++ < SEC_RETRY_MAX_CNT);
344 
345 	return ret;
346 }
347 
348 static int sec_alg_try_enqueue(struct sec_req *req)
349 {
350 	struct hisi_qp *qp = req->qp_ctx->qp;
351 
352 	/* Check if any request is already backlogged */
353 	if (!list_empty(&qp->backlog.list))
354 		return -EBUSY;
355 
356 	/* Try to enqueue to HW ring */
357 	return qp_send_message(req);
358 }
359 
360 
361 static int sec_alg_send_message_maybacklog(struct sec_req *req)
362 {
363 	struct hisi_qp *qp = req->qp_ctx->qp;
364 	int ret;
365 
366 	ret = sec_alg_try_enqueue(req);
367 	if (ret != -EBUSY)
368 		return ret;
369 
370 	spin_lock_bh(&qp->backlog.lock);
371 	ret = sec_alg_try_enqueue(req);
372 	if (ret == -EBUSY)
373 		list_add_tail(&req->list, &qp->backlog.list);
374 	spin_unlock_bh(&qp->backlog.lock);
375 
376 	return ret;
377 }
378 
379 static int sec_bd_send(struct sec_ctx *ctx, struct sec_req *req)
380 {
381 	if (req->flag & CRYPTO_TFM_REQ_MAY_BACKLOG)
382 		return sec_alg_send_message_maybacklog(req);
383 
384 	return sec_alg_send_message_retry(req);
385 }
386 
387 static int sec_alloc_civ_resource(struct device *dev, struct sec_alg_res *res)
388 {
389 	u16 q_depth = res->depth;
390 	int i;
391 
392 	res->c_ivin = dma_alloc_coherent(dev, SEC_TOTAL_IV_SZ(q_depth),
393 					 &res->c_ivin_dma, GFP_KERNEL);
394 	if (!res->c_ivin)
395 		return -ENOMEM;
396 
397 	for (i = 1; i < q_depth; i++) {
398 		res[i].c_ivin_dma = res->c_ivin_dma + i * SEC_IV_SIZE;
399 		res[i].c_ivin = res->c_ivin + i * SEC_IV_SIZE;
400 	}
401 
402 	return 0;
403 }
404 
405 static void sec_free_civ_resource(struct device *dev, struct sec_alg_res *res)
406 {
407 	if (res->c_ivin)
408 		dma_free_coherent(dev, SEC_TOTAL_IV_SZ(res->depth),
409 				  res->c_ivin, res->c_ivin_dma);
410 }
411 
412 static int sec_alloc_aiv_resource(struct device *dev, struct sec_alg_res *res)
413 {
414 	u16 q_depth = res->depth;
415 	int i;
416 
417 	res->a_ivin = dma_alloc_coherent(dev, SEC_TOTAL_IV_SZ(q_depth),
418 					 &res->a_ivin_dma, GFP_KERNEL);
419 	if (!res->a_ivin)
420 		return -ENOMEM;
421 
422 	for (i = 1; i < q_depth; i++) {
423 		res[i].a_ivin_dma = res->a_ivin_dma + i * SEC_IV_SIZE;
424 		res[i].a_ivin = res->a_ivin + i * SEC_IV_SIZE;
425 	}
426 
427 	return 0;
428 }
429 
430 static void sec_free_aiv_resource(struct device *dev, struct sec_alg_res *res)
431 {
432 	if (res->a_ivin)
433 		dma_free_coherent(dev, SEC_TOTAL_IV_SZ(res->depth),
434 				  res->a_ivin, res->a_ivin_dma);
435 }
436 
437 static int sec_alloc_mac_resource(struct device *dev, struct sec_alg_res *res)
438 {
439 	u16 q_depth = res->depth;
440 	int i;
441 
442 	res->out_mac = dma_alloc_coherent(dev, SEC_TOTAL_MAC_SZ(q_depth) << 1,
443 					  &res->out_mac_dma, GFP_KERNEL);
444 	if (!res->out_mac)
445 		return -ENOMEM;
446 
447 	for (i = 1; i < q_depth; i++) {
448 		res[i].out_mac_dma = res->out_mac_dma +
449 				     i * (SEC_MAX_MAC_LEN << 1);
450 		res[i].out_mac = res->out_mac + i * (SEC_MAX_MAC_LEN << 1);
451 	}
452 
453 	return 0;
454 }
455 
456 static void sec_free_mac_resource(struct device *dev, struct sec_alg_res *res)
457 {
458 	if (res->out_mac)
459 		dma_free_coherent(dev, SEC_TOTAL_MAC_SZ(res->depth) << 1,
460 				  res->out_mac, res->out_mac_dma);
461 }
462 
463 static void sec_free_pbuf_resource(struct device *dev, struct sec_alg_res *res)
464 {
465 	if (res->pbuf)
466 		dma_free_coherent(dev, SEC_TOTAL_PBUF_SZ(res->depth),
467 				  res->pbuf, res->pbuf_dma);
468 }
469 
470 /*
471  * To improve performance, pbuffer is used for
472  * small packets (< 512Bytes) as IOMMU translation using.
473  */
474 static int sec_alloc_pbuf_resource(struct device *dev, struct sec_alg_res *res)
475 {
476 	u16 q_depth = res->depth;
477 	int size = SEC_PBUF_PAGE_NUM(q_depth);
478 	int pbuf_page_offset;
479 	int i, j, k;
480 
481 	res->pbuf = dma_alloc_coherent(dev, SEC_TOTAL_PBUF_SZ(q_depth),
482 				&res->pbuf_dma, GFP_KERNEL);
483 	if (!res->pbuf)
484 		return -ENOMEM;
485 
486 	/*
487 	 * SEC_PBUF_PKG contains data pbuf, iv and
488 	 * out_mac : <SEC_PBUF|SEC_IV|SEC_MAC>
489 	 * Every PAGE contains six SEC_PBUF_PKG
490 	 * The sec_qp_ctx contains QM_Q_DEPTH numbers of SEC_PBUF_PKG
491 	 * So we need SEC_PBUF_PAGE_NUM numbers of PAGE
492 	 * for the SEC_TOTAL_PBUF_SZ
493 	 */
494 	for (i = 0; i <= size; i++) {
495 		pbuf_page_offset = PAGE_SIZE * i;
496 		for (j = 0; j < SEC_PBUF_NUM; j++) {
497 			k = i * SEC_PBUF_NUM + j;
498 			if (k == q_depth)
499 				break;
500 			res[k].pbuf = res->pbuf +
501 				j * SEC_PBUF_PKG + pbuf_page_offset;
502 			res[k].pbuf_dma = res->pbuf_dma +
503 				j * SEC_PBUF_PKG + pbuf_page_offset;
504 		}
505 	}
506 
507 	return 0;
508 }
509 
510 static int sec_alg_resource_alloc(struct sec_ctx *ctx,
511 				  struct sec_qp_ctx *qp_ctx)
512 {
513 	struct sec_alg_res *res = qp_ctx->res;
514 	struct device *dev = ctx->dev;
515 	int ret;
516 
517 	ret = sec_alloc_civ_resource(dev, res);
518 	if (ret)
519 		return ret;
520 
521 	if (ctx->alg_type == SEC_AEAD) {
522 		ret = sec_alloc_aiv_resource(dev, res);
523 		if (ret)
524 			goto alloc_aiv_fail;
525 
526 		ret = sec_alloc_mac_resource(dev, res);
527 		if (ret)
528 			goto alloc_mac_fail;
529 	}
530 	if (ctx->pbuf_supported) {
531 		ret = sec_alloc_pbuf_resource(dev, res);
532 		if (ret) {
533 			dev_err(dev, "fail to alloc pbuf dma resource!\n");
534 			goto alloc_pbuf_fail;
535 		}
536 	}
537 
538 	return 0;
539 
540 alloc_pbuf_fail:
541 	if (ctx->alg_type == SEC_AEAD)
542 		sec_free_mac_resource(dev, qp_ctx->res);
543 alloc_mac_fail:
544 	if (ctx->alg_type == SEC_AEAD)
545 		sec_free_aiv_resource(dev, res);
546 alloc_aiv_fail:
547 	sec_free_civ_resource(dev, res);
548 	return ret;
549 }
550 
551 static void sec_alg_resource_free(struct sec_ctx *ctx,
552 				  struct sec_qp_ctx *qp_ctx)
553 {
554 	struct device *dev = ctx->dev;
555 
556 	sec_free_civ_resource(dev, qp_ctx->res);
557 
558 	if (ctx->pbuf_supported)
559 		sec_free_pbuf_resource(dev, qp_ctx->res);
560 	if (ctx->alg_type == SEC_AEAD) {
561 		sec_free_mac_resource(dev, qp_ctx->res);
562 		sec_free_aiv_resource(dev, qp_ctx->res);
563 	}
564 }
565 
566 static int sec_alloc_qp_ctx_resource(struct sec_ctx *ctx, struct sec_qp_ctx *qp_ctx)
567 {
568 	u16 q_depth = qp_ctx->qp->sq_depth;
569 	struct device *dev = ctx->dev;
570 	int ret = -ENOMEM;
571 
572 	qp_ctx->req_list = kcalloc(q_depth, sizeof(struct sec_req *), GFP_KERNEL);
573 	if (!qp_ctx->req_list)
574 		return ret;
575 
576 	qp_ctx->res = kcalloc(q_depth, sizeof(struct sec_alg_res), GFP_KERNEL);
577 	if (!qp_ctx->res)
578 		goto err_free_req_list;
579 	qp_ctx->res->depth = q_depth;
580 
581 	qp_ctx->c_in_pool = hisi_acc_create_sgl_pool(dev, q_depth, SEC_SGL_SGE_NR);
582 	if (IS_ERR(qp_ctx->c_in_pool)) {
583 		dev_err(dev, "fail to create sgl pool for input!\n");
584 		goto err_free_res;
585 	}
586 
587 	qp_ctx->c_out_pool = hisi_acc_create_sgl_pool(dev, q_depth, SEC_SGL_SGE_NR);
588 	if (IS_ERR(qp_ctx->c_out_pool)) {
589 		dev_err(dev, "fail to create sgl pool for output!\n");
590 		goto err_free_c_in_pool;
591 	}
592 
593 	ret = sec_alg_resource_alloc(ctx, qp_ctx);
594 	if (ret)
595 		goto err_free_c_out_pool;
596 
597 	return 0;
598 
599 err_free_c_out_pool:
600 	hisi_acc_free_sgl_pool(dev, qp_ctx->c_out_pool);
601 err_free_c_in_pool:
602 	hisi_acc_free_sgl_pool(dev, qp_ctx->c_in_pool);
603 err_free_res:
604 	kfree(qp_ctx->res);
605 err_free_req_list:
606 	kfree(qp_ctx->req_list);
607 	return ret;
608 }
609 
610 static void sec_free_qp_ctx_resource(struct sec_ctx *ctx, struct sec_qp_ctx *qp_ctx)
611 {
612 	struct device *dev = ctx->dev;
613 
614 	sec_alg_resource_free(ctx, qp_ctx);
615 	hisi_acc_free_sgl_pool(dev, qp_ctx->c_out_pool);
616 	hisi_acc_free_sgl_pool(dev, qp_ctx->c_in_pool);
617 	kfree(qp_ctx->res);
618 	kfree(qp_ctx->req_list);
619 }
620 
621 static int sec_create_qp_ctx(struct sec_ctx *ctx, int qp_ctx_id)
622 {
623 	struct sec_qp_ctx *qp_ctx;
624 	struct hisi_qp *qp;
625 	int ret;
626 
627 	qp_ctx = &ctx->qp_ctx[qp_ctx_id];
628 	qp = ctx->qps[qp_ctx_id];
629 	qp->qp_ctx = qp_ctx;
630 	qp_ctx->qp = qp;
631 	qp_ctx->ctx = ctx;
632 
633 	if (ctx->type_supported == SEC_BD_TYPE3)
634 		qp->req_cb = sec_req_cb3;
635 	else
636 		qp->req_cb = sec_req_cb;
637 
638 	spin_lock_init(&qp_ctx->req_lock);
639 	idr_init(&qp_ctx->req_idr);
640 	spin_lock_init(&qp_ctx->id_lock);
641 	qp_ctx->send_head = 0;
642 
643 	ret = sec_alloc_qp_ctx_resource(ctx, qp_ctx);
644 	if (ret)
645 		goto err_destroy_idr;
646 
647 	ret = hisi_qm_start_qp(qp, 0);
648 	if (ret < 0)
649 		goto err_resource_free;
650 
651 	return 0;
652 
653 err_resource_free:
654 	sec_free_qp_ctx_resource(ctx, qp_ctx);
655 err_destroy_idr:
656 	idr_destroy(&qp_ctx->req_idr);
657 	return ret;
658 }
659 
660 static void sec_release_qp_ctx(struct sec_ctx *ctx,
661 			       struct sec_qp_ctx *qp_ctx)
662 {
663 	hisi_qm_stop_qp(qp_ctx->qp);
664 	sec_free_qp_ctx_resource(ctx, qp_ctx);
665 	idr_destroy(&qp_ctx->req_idr);
666 }
667 
668 static int sec_ctx_base_init(struct sec_ctx *ctx)
669 {
670 	struct sec_dev *sec;
671 	int i, ret;
672 
673 	ctx->qps = sec_create_qps();
674 	if (!ctx->qps) {
675 		pr_err("Can not create sec qps!\n");
676 		return -ENODEV;
677 	}
678 
679 	sec = container_of(ctx->qps[0]->qm, struct sec_dev, qm);
680 	ctx->sec = sec;
681 	ctx->dev = &sec->qm.pdev->dev;
682 	ctx->hlf_q_num = sec->ctx_q_num >> 1;
683 
684 	ctx->pbuf_supported = ctx->sec->iommu_used;
685 	ctx->qp_ctx = kcalloc(sec->ctx_q_num, sizeof(struct sec_qp_ctx),
686 			      GFP_KERNEL);
687 	if (!ctx->qp_ctx) {
688 		ret = -ENOMEM;
689 		goto err_destroy_qps;
690 	}
691 
692 	for (i = 0; i < sec->ctx_q_num; i++) {
693 		ret = sec_create_qp_ctx(ctx, i);
694 		if (ret)
695 			goto err_sec_release_qp_ctx;
696 	}
697 
698 	return 0;
699 
700 err_sec_release_qp_ctx:
701 	for (i = i - 1; i >= 0; i--)
702 		sec_release_qp_ctx(ctx, &ctx->qp_ctx[i]);
703 	kfree(ctx->qp_ctx);
704 err_destroy_qps:
705 	sec_destroy_qps(ctx->qps, sec->ctx_q_num);
706 	return ret;
707 }
708 
709 static void sec_ctx_base_uninit(struct sec_ctx *ctx)
710 {
711 	int i;
712 
713 	for (i = 0; i < ctx->sec->ctx_q_num; i++)
714 		sec_release_qp_ctx(ctx, &ctx->qp_ctx[i]);
715 
716 	sec_destroy_qps(ctx->qps, ctx->sec->ctx_q_num);
717 	kfree(ctx->qp_ctx);
718 }
719 
720 static int sec_cipher_init(struct sec_ctx *ctx)
721 {
722 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
723 
724 	c_ctx->c_key = dma_alloc_coherent(ctx->dev, SEC_MAX_KEY_SIZE,
725 					  &c_ctx->c_key_dma, GFP_KERNEL);
726 	if (!c_ctx->c_key)
727 		return -ENOMEM;
728 
729 	return 0;
730 }
731 
732 static void sec_cipher_uninit(struct sec_ctx *ctx)
733 {
734 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
735 
736 	memzero_explicit(c_ctx->c_key, SEC_MAX_KEY_SIZE);
737 	dma_free_coherent(ctx->dev, SEC_MAX_KEY_SIZE,
738 			  c_ctx->c_key, c_ctx->c_key_dma);
739 }
740 
741 static int sec_auth_init(struct sec_ctx *ctx)
742 {
743 	struct sec_auth_ctx *a_ctx = &ctx->a_ctx;
744 
745 	a_ctx->a_key = dma_alloc_coherent(ctx->dev, SEC_MAX_AKEY_SIZE,
746 					  &a_ctx->a_key_dma, GFP_KERNEL);
747 	if (!a_ctx->a_key)
748 		return -ENOMEM;
749 
750 	return 0;
751 }
752 
753 static void sec_auth_uninit(struct sec_ctx *ctx)
754 {
755 	struct sec_auth_ctx *a_ctx = &ctx->a_ctx;
756 
757 	memzero_explicit(a_ctx->a_key, SEC_MAX_AKEY_SIZE);
758 	dma_free_coherent(ctx->dev, SEC_MAX_AKEY_SIZE,
759 			  a_ctx->a_key, a_ctx->a_key_dma);
760 }
761 
762 static int sec_skcipher_fbtfm_init(struct crypto_skcipher *tfm)
763 {
764 	const char *alg = crypto_tfm_alg_name(&tfm->base);
765 	struct sec_ctx *ctx = crypto_skcipher_ctx(tfm);
766 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
767 
768 	c_ctx->fallback = false;
769 
770 	c_ctx->fbtfm = crypto_alloc_sync_skcipher(alg, 0,
771 						  CRYPTO_ALG_NEED_FALLBACK);
772 	if (IS_ERR(c_ctx->fbtfm)) {
773 		pr_err("failed to alloc fallback tfm for %s!\n", alg);
774 		return PTR_ERR(c_ctx->fbtfm);
775 	}
776 
777 	return 0;
778 }
779 
780 static int sec_skcipher_init(struct crypto_skcipher *tfm)
781 {
782 	struct sec_ctx *ctx = crypto_skcipher_ctx(tfm);
783 	int ret;
784 
785 	ctx->alg_type = SEC_SKCIPHER;
786 	crypto_skcipher_set_reqsize_dma(tfm, sizeof(struct sec_req));
787 	ctx->c_ctx.ivsize = crypto_skcipher_ivsize(tfm);
788 	if (ctx->c_ctx.ivsize > SEC_IV_SIZE) {
789 		pr_err("get error skcipher iv size!\n");
790 		return -EINVAL;
791 	}
792 
793 	ret = sec_ctx_base_init(ctx);
794 	if (ret)
795 		return ret;
796 
797 	ret = sec_cipher_init(ctx);
798 	if (ret)
799 		goto err_cipher_init;
800 
801 	ret = sec_skcipher_fbtfm_init(tfm);
802 	if (ret)
803 		goto err_fbtfm_init;
804 
805 	return 0;
806 
807 err_fbtfm_init:
808 	sec_cipher_uninit(ctx);
809 err_cipher_init:
810 	sec_ctx_base_uninit(ctx);
811 	return ret;
812 }
813 
814 static void sec_skcipher_uninit(struct crypto_skcipher *tfm)
815 {
816 	struct sec_ctx *ctx = crypto_skcipher_ctx(tfm);
817 
818 	if (ctx->c_ctx.fbtfm)
819 		crypto_free_sync_skcipher(ctx->c_ctx.fbtfm);
820 
821 	sec_cipher_uninit(ctx);
822 	sec_ctx_base_uninit(ctx);
823 }
824 
825 static int sec_skcipher_3des_setkey(struct crypto_skcipher *tfm, const u8 *key, const u32 keylen)
826 {
827 	struct sec_ctx *ctx = crypto_skcipher_ctx(tfm);
828 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
829 	int ret;
830 
831 	ret = verify_skcipher_des3_key(tfm, key);
832 	if (ret)
833 		return ret;
834 
835 	switch (keylen) {
836 	case SEC_DES3_2KEY_SIZE:
837 		c_ctx->c_key_len = SEC_CKEY_3DES_2KEY;
838 		break;
839 	case SEC_DES3_3KEY_SIZE:
840 		c_ctx->c_key_len = SEC_CKEY_3DES_3KEY;
841 		break;
842 	default:
843 		return -EINVAL;
844 	}
845 
846 	return 0;
847 }
848 
849 static int sec_skcipher_aes_sm4_setkey(struct sec_cipher_ctx *c_ctx,
850 				       const u32 keylen,
851 				       const enum sec_cmode c_mode)
852 {
853 	if (c_mode == SEC_CMODE_XTS) {
854 		switch (keylen) {
855 		case SEC_XTS_MIN_KEY_SIZE:
856 			c_ctx->c_key_len = SEC_CKEY_128BIT;
857 			break;
858 		case SEC_XTS_MID_KEY_SIZE:
859 			c_ctx->fallback = true;
860 			break;
861 		case SEC_XTS_MAX_KEY_SIZE:
862 			c_ctx->c_key_len = SEC_CKEY_256BIT;
863 			break;
864 		default:
865 			pr_err("hisi_sec2: xts mode key error!\n");
866 			return -EINVAL;
867 		}
868 	} else {
869 		if (c_ctx->c_alg == SEC_CALG_SM4 &&
870 		    keylen != AES_KEYSIZE_128) {
871 			pr_err("hisi_sec2: sm4 key error!\n");
872 			return -EINVAL;
873 		} else {
874 			switch (keylen) {
875 			case AES_KEYSIZE_128:
876 				c_ctx->c_key_len = SEC_CKEY_128BIT;
877 				break;
878 			case AES_KEYSIZE_192:
879 				c_ctx->c_key_len = SEC_CKEY_192BIT;
880 				break;
881 			case AES_KEYSIZE_256:
882 				c_ctx->c_key_len = SEC_CKEY_256BIT;
883 				break;
884 			default:
885 				pr_err("hisi_sec2: aes key error!\n");
886 				return -EINVAL;
887 			}
888 		}
889 	}
890 
891 	return 0;
892 }
893 
894 static int sec_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key,
895 			       const u32 keylen, const enum sec_calg c_alg,
896 			       const enum sec_cmode c_mode)
897 {
898 	struct sec_ctx *ctx = crypto_skcipher_ctx(tfm);
899 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
900 	struct device *dev = ctx->dev;
901 	int ret;
902 
903 	if (c_mode == SEC_CMODE_XTS) {
904 		ret = xts_verify_key(tfm, key, keylen);
905 		if (ret) {
906 			dev_err(dev, "xts mode key err!\n");
907 			return ret;
908 		}
909 	}
910 
911 	c_ctx->c_alg  = c_alg;
912 	c_ctx->c_mode = c_mode;
913 
914 	switch (c_alg) {
915 	case SEC_CALG_3DES:
916 		ret = sec_skcipher_3des_setkey(tfm, key, keylen);
917 		break;
918 	case SEC_CALG_AES:
919 	case SEC_CALG_SM4:
920 		ret = sec_skcipher_aes_sm4_setkey(c_ctx, keylen, c_mode);
921 		break;
922 	default:
923 		dev_err(dev, "sec c_alg err!\n");
924 		return -EINVAL;
925 	}
926 
927 	if (ret) {
928 		dev_err(dev, "set sec key err!\n");
929 		return ret;
930 	}
931 
932 	memcpy(c_ctx->c_key, key, keylen);
933 	if (c_ctx->fbtfm) {
934 		ret = crypto_sync_skcipher_setkey(c_ctx->fbtfm, key, keylen);
935 		if (ret) {
936 			dev_err(dev, "failed to set fallback skcipher key!\n");
937 			return ret;
938 		}
939 	}
940 	return 0;
941 }
942 
943 #define GEN_SEC_SETKEY_FUNC(name, c_alg, c_mode)			\
944 static int sec_setkey_##name(struct crypto_skcipher *tfm, const u8 *key,\
945 	u32 keylen)							\
946 {									\
947 	return sec_skcipher_setkey(tfm, key, keylen, c_alg, c_mode);	\
948 }
949 
950 GEN_SEC_SETKEY_FUNC(aes_ecb, SEC_CALG_AES, SEC_CMODE_ECB)
951 GEN_SEC_SETKEY_FUNC(aes_cbc, SEC_CALG_AES, SEC_CMODE_CBC)
952 GEN_SEC_SETKEY_FUNC(aes_xts, SEC_CALG_AES, SEC_CMODE_XTS)
953 GEN_SEC_SETKEY_FUNC(aes_ctr, SEC_CALG_AES, SEC_CMODE_CTR)
954 GEN_SEC_SETKEY_FUNC(3des_ecb, SEC_CALG_3DES, SEC_CMODE_ECB)
955 GEN_SEC_SETKEY_FUNC(3des_cbc, SEC_CALG_3DES, SEC_CMODE_CBC)
956 GEN_SEC_SETKEY_FUNC(sm4_xts, SEC_CALG_SM4, SEC_CMODE_XTS)
957 GEN_SEC_SETKEY_FUNC(sm4_cbc, SEC_CALG_SM4, SEC_CMODE_CBC)
958 GEN_SEC_SETKEY_FUNC(sm4_ctr, SEC_CALG_SM4, SEC_CMODE_CTR)
959 
960 static int sec_cipher_pbuf_map(struct sec_ctx *ctx, struct sec_req *req,
961 			struct scatterlist *src)
962 {
963 	struct aead_request *aead_req = req->aead_req.aead_req;
964 	struct sec_cipher_req *c_req = &req->c_req;
965 	struct sec_qp_ctx *qp_ctx = req->qp_ctx;
966 	struct sec_request_buf *buf = &req->buf;
967 	struct device *dev = ctx->dev;
968 	int copy_size, pbuf_length;
969 	int req_id = req->req_id;
970 	struct crypto_aead *tfm;
971 	u8 *mac_offset, *pbuf;
972 	size_t authsize;
973 
974 	if (ctx->alg_type == SEC_AEAD)
975 		copy_size = aead_req->cryptlen + aead_req->assoclen;
976 	else
977 		copy_size = c_req->c_len;
978 
979 
980 	pbuf = req->req_id < 0 ? buf->pbuf : qp_ctx->res[req_id].pbuf;
981 	pbuf_length = sg_copy_to_buffer(src, sg_nents(src), pbuf, copy_size);
982 	if (unlikely(pbuf_length != copy_size)) {
983 		dev_err(dev, "copy src data to pbuf error!\n");
984 		return -EINVAL;
985 	}
986 	if (!c_req->encrypt && ctx->alg_type == SEC_AEAD) {
987 		tfm = crypto_aead_reqtfm(aead_req);
988 		authsize = crypto_aead_authsize(tfm);
989 		mac_offset = pbuf + copy_size - authsize;
990 		memcpy(req->aead_req.out_mac, mac_offset, authsize);
991 	}
992 
993 	if (req->req_id < 0) {
994 		buf->in_dma = dma_map_single(dev, buf->pbuf, SEC_PBUF_SZ, DMA_BIDIRECTIONAL);
995 		if (unlikely(dma_mapping_error(dev, buf->in_dma)))
996 			return -ENOMEM;
997 
998 		buf->out_dma = buf->in_dma;
999 		return 0;
1000 	}
1001 
1002 	req->in_dma = qp_ctx->res[req_id].pbuf_dma;
1003 	c_req->c_out_dma = req->in_dma;
1004 
1005 	return 0;
1006 }
1007 
1008 static void sec_cipher_pbuf_unmap(struct sec_ctx *ctx, struct sec_req *req,
1009 			struct scatterlist *dst)
1010 {
1011 	struct aead_request *aead_req = req->aead_req.aead_req;
1012 	struct sec_cipher_req *c_req = &req->c_req;
1013 	struct sec_qp_ctx *qp_ctx = req->qp_ctx;
1014 	struct sec_request_buf *buf = &req->buf;
1015 	int copy_size, pbuf_length;
1016 	int req_id = req->req_id;
1017 
1018 	if (ctx->alg_type == SEC_AEAD)
1019 		copy_size = c_req->c_len + aead_req->assoclen;
1020 	else
1021 		copy_size = c_req->c_len;
1022 
1023 	if (req->req_id < 0)
1024 		pbuf_length = sg_copy_from_buffer(dst, sg_nents(dst), buf->pbuf, copy_size);
1025 	else
1026 		pbuf_length = sg_copy_from_buffer(dst, sg_nents(dst), qp_ctx->res[req_id].pbuf,
1027 						  copy_size);
1028 	if (unlikely(pbuf_length != copy_size))
1029 		dev_err(ctx->dev, "copy pbuf data to dst error!\n");
1030 
1031 	if (req->req_id < 0)
1032 		dma_unmap_single(ctx->dev, buf->in_dma, SEC_PBUF_SZ, DMA_BIDIRECTIONAL);
1033 }
1034 
1035 static int sec_aead_mac_init(struct sec_aead_req *req)
1036 {
1037 	struct aead_request *aead_req = req->aead_req;
1038 	struct crypto_aead *tfm = crypto_aead_reqtfm(aead_req);
1039 	size_t authsize = crypto_aead_authsize(tfm);
1040 	struct scatterlist *sgl = aead_req->src;
1041 	u8 *mac_out = req->out_mac;
1042 	size_t copy_size;
1043 	off_t skip_size;
1044 
1045 	/* Copy input mac */
1046 	skip_size = aead_req->assoclen + aead_req->cryptlen - authsize;
1047 	copy_size = sg_pcopy_to_buffer(sgl, sg_nents(sgl), mac_out, authsize, skip_size);
1048 	if (unlikely(copy_size != authsize))
1049 		return -EINVAL;
1050 
1051 	return 0;
1052 }
1053 
1054 static void fill_sg_to_hw_sge(struct scatterlist *sgl, struct sec_hw_sge *hw_sge)
1055 {
1056 	hw_sge->buf = sg_dma_address(sgl);
1057 	hw_sge->len = cpu_to_le32(sg_dma_len(sgl));
1058 	hw_sge->page_ctrl = sg_virt(sgl);
1059 }
1060 
1061 static int sec_cipher_to_hw_sgl(struct device *dev, struct scatterlist *src,
1062 				struct sec_hw_sgl *src_in, dma_addr_t *hw_sgl_dma,
1063 				int dma_dir)
1064 {
1065 	struct sec_hw_sge *curr_hw_sge = src_in->sge_entries;
1066 	u32 i, sg_n, sg_n_mapped;
1067 	struct scatterlist *sg;
1068 	u32 sge_var = 0;
1069 
1070 	sg_n = sg_nents(src);
1071 	sg_n_mapped = dma_map_sg(dev, src, sg_n, dma_dir);
1072 	if (unlikely(!sg_n_mapped)) {
1073 		dev_err(dev, "dma mapping for SG error!\n");
1074 		return -EINVAL;
1075 	} else if (unlikely(sg_n_mapped > SEC_SGE_NR_NUM)) {
1076 		dev_err(dev, "the number of entries in input scatterlist error!\n");
1077 		dma_unmap_sg(dev, src, sg_n, dma_dir);
1078 		return -EINVAL;
1079 	}
1080 
1081 	for_each_sg(src, sg, sg_n_mapped, i) {
1082 		fill_sg_to_hw_sge(sg, curr_hw_sge);
1083 		curr_hw_sge++;
1084 		sge_var++;
1085 	}
1086 
1087 	src_in->entry_sum_in_sgl = cpu_to_le16(sge_var);
1088 	src_in->entry_sum_in_chain = cpu_to_le16(SEC_SGE_NR_NUM);
1089 	src_in->entry_length_in_sgl = cpu_to_le16(SEC_SGE_NR_NUM);
1090 	*hw_sgl_dma = dma_map_single(dev, src_in, sizeof(struct sec_hw_sgl), dma_dir);
1091 	if (unlikely(dma_mapping_error(dev, *hw_sgl_dma))) {
1092 		dma_unmap_sg(dev, src, sg_n, dma_dir);
1093 		return -ENOMEM;
1094 	}
1095 
1096 	return 0;
1097 }
1098 
1099 static void sec_cipher_put_hw_sgl(struct device *dev, struct scatterlist *src,
1100 				  dma_addr_t src_in, int dma_dir)
1101 {
1102 	dma_unmap_single(dev, src_in, sizeof(struct sec_hw_sgl), dma_dir);
1103 	dma_unmap_sg(dev, src, sg_nents(src), dma_dir);
1104 }
1105 
1106 static int sec_cipher_map_sgl(struct device *dev, struct sec_req *req,
1107 			      struct scatterlist *src, struct scatterlist *dst)
1108 {
1109 	struct sec_hw_sgl *src_in = &req->buf.data_buf.in;
1110 	struct sec_hw_sgl *dst_out = &req->buf.data_buf.out;
1111 	int ret;
1112 
1113 	if (dst == src) {
1114 		ret = sec_cipher_to_hw_sgl(dev, src, src_in, &req->buf.in_dma,
1115 					    DMA_BIDIRECTIONAL);
1116 		req->buf.out_dma = req->buf.in_dma;
1117 		return ret;
1118 	}
1119 
1120 	ret = sec_cipher_to_hw_sgl(dev, src, src_in, &req->buf.in_dma, DMA_TO_DEVICE);
1121 	if (unlikely(ret))
1122 		return ret;
1123 
1124 	ret = sec_cipher_to_hw_sgl(dev, dst, dst_out, &req->buf.out_dma,
1125 				   DMA_FROM_DEVICE);
1126 	if (unlikely(ret)) {
1127 		sec_cipher_put_hw_sgl(dev, src, req->buf.in_dma, DMA_TO_DEVICE);
1128 		return ret;
1129 	}
1130 
1131 	return 0;
1132 }
1133 
1134 static int sec_cipher_map_inner(struct sec_ctx *ctx, struct sec_req *req,
1135 				struct scatterlist *src, struct scatterlist *dst)
1136 {
1137 	struct sec_cipher_req *c_req = &req->c_req;
1138 	struct sec_aead_req *a_req = &req->aead_req;
1139 	struct sec_qp_ctx *qp_ctx = req->qp_ctx;
1140 	struct sec_alg_res *res = &qp_ctx->res[req->req_id];
1141 	struct device *dev = ctx->dev;
1142 	enum dma_data_direction src_direction;
1143 	int ret;
1144 
1145 	if (req->use_pbuf) {
1146 		c_req->c_ivin = res->pbuf + SEC_PBUF_IV_OFFSET;
1147 		c_req->c_ivin_dma = res->pbuf_dma + SEC_PBUF_IV_OFFSET;
1148 		if (ctx->alg_type == SEC_AEAD) {
1149 			a_req->a_ivin = res->a_ivin;
1150 			a_req->a_ivin_dma = res->a_ivin_dma;
1151 			a_req->out_mac = res->pbuf + SEC_PBUF_MAC_OFFSET;
1152 			a_req->out_mac_dma = res->pbuf_dma +
1153 					SEC_PBUF_MAC_OFFSET;
1154 		}
1155 		return sec_cipher_pbuf_map(ctx, req, src);
1156 	}
1157 
1158 	c_req->c_ivin = res->c_ivin;
1159 	c_req->c_ivin_dma = res->c_ivin_dma;
1160 	if (ctx->alg_type == SEC_AEAD) {
1161 		a_req->a_ivin = res->a_ivin;
1162 		a_req->a_ivin_dma = res->a_ivin_dma;
1163 		a_req->out_mac = res->out_mac;
1164 		a_req->out_mac_dma = res->out_mac_dma;
1165 	}
1166 
1167 	src_direction = dst == src ? DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
1168 	req->in = hisi_acc_sg_buf_map_to_hw_sgl(dev, src,
1169 						qp_ctx->c_in_pool,
1170 						req->req_id,
1171 						&req->in_dma, src_direction);
1172 	if (IS_ERR(req->in)) {
1173 		dev_err(dev, "fail to dma map input sgl buffers!\n");
1174 		return PTR_ERR(req->in);
1175 	}
1176 
1177 	if (!c_req->encrypt && ctx->alg_type == SEC_AEAD) {
1178 		ret = sec_aead_mac_init(a_req);
1179 		if (unlikely(ret)) {
1180 			dev_err(dev, "fail to init mac data for ICV!\n");
1181 			hisi_acc_sg_buf_unmap(dev, src, req->in, src_direction);
1182 			return ret;
1183 		}
1184 	}
1185 
1186 	if (dst == src) {
1187 		c_req->c_out = req->in;
1188 		c_req->c_out_dma = req->in_dma;
1189 	} else {
1190 		c_req->c_out = hisi_acc_sg_buf_map_to_hw_sgl(dev, dst,
1191 							     qp_ctx->c_out_pool,
1192 							     req->req_id,
1193 							     &c_req->c_out_dma,
1194 							     DMA_FROM_DEVICE);
1195 
1196 		if (IS_ERR(c_req->c_out)) {
1197 			dev_err(dev, "fail to dma map output sgl buffers!\n");
1198 			hisi_acc_sg_buf_unmap(dev, src, req->in, src_direction);
1199 			return PTR_ERR(c_req->c_out);
1200 		}
1201 	}
1202 
1203 	return 0;
1204 }
1205 
1206 static int sec_cipher_map(struct sec_ctx *ctx, struct sec_req *req,
1207 			  struct scatterlist *src, struct scatterlist *dst)
1208 {
1209 	struct sec_aead_req *a_req = &req->aead_req;
1210 	struct sec_cipher_req *c_req = &req->c_req;
1211 	bool is_aead = (ctx->alg_type == SEC_AEAD);
1212 	struct device *dev = ctx->dev;
1213 	int ret = -ENOMEM;
1214 
1215 	if (req->req_id >= 0)
1216 		return sec_cipher_map_inner(ctx, req, src, dst);
1217 
1218 	c_req->c_ivin = c_req->c_ivin_buf;
1219 	c_req->c_ivin_dma = dma_map_single(dev, c_req->c_ivin,
1220 					   SEC_IV_SIZE, DMA_TO_DEVICE);
1221 	if (unlikely(dma_mapping_error(dev, c_req->c_ivin_dma)))
1222 		return -ENOMEM;
1223 
1224 	if (is_aead) {
1225 		a_req->a_ivin = a_req->a_ivin_buf;
1226 		a_req->out_mac = a_req->out_mac_buf;
1227 		a_req->a_ivin_dma = dma_map_single(dev, a_req->a_ivin,
1228 						   SEC_IV_SIZE, DMA_TO_DEVICE);
1229 		if (unlikely(dma_mapping_error(dev, a_req->a_ivin_dma)))
1230 			goto free_c_ivin_dma;
1231 
1232 		a_req->out_mac_dma = dma_map_single(dev, a_req->out_mac,
1233 						    SEC_MAX_MAC_LEN, DMA_BIDIRECTIONAL);
1234 		if (unlikely(dma_mapping_error(dev, a_req->out_mac_dma)))
1235 			goto free_a_ivin_dma;
1236 	}
1237 	if (req->use_pbuf) {
1238 		ret = sec_cipher_pbuf_map(ctx, req, src);
1239 		if (unlikely(ret))
1240 			goto free_out_mac_dma;
1241 
1242 		return 0;
1243 	}
1244 
1245 	if (!c_req->encrypt && is_aead) {
1246 		ret = sec_aead_mac_init(a_req);
1247 		if (unlikely(ret)) {
1248 			dev_err(dev, "fail to init mac data for ICV!\n");
1249 			goto free_out_mac_dma;
1250 		}
1251 	}
1252 
1253 	ret = sec_cipher_map_sgl(dev, req, src, dst);
1254 	if (unlikely(ret)) {
1255 		dev_err(dev, "fail to dma map input sgl buffers!\n");
1256 		goto free_out_mac_dma;
1257 	}
1258 
1259 	return 0;
1260 
1261 free_out_mac_dma:
1262 	if (is_aead)
1263 		dma_unmap_single(dev, a_req->out_mac_dma, SEC_MAX_MAC_LEN, DMA_BIDIRECTIONAL);
1264 free_a_ivin_dma:
1265 	if (is_aead)
1266 		dma_unmap_single(dev, a_req->a_ivin_dma, SEC_IV_SIZE, DMA_TO_DEVICE);
1267 free_c_ivin_dma:
1268 	dma_unmap_single(dev, c_req->c_ivin_dma, SEC_IV_SIZE, DMA_TO_DEVICE);
1269 	return ret;
1270 }
1271 
1272 static void sec_cipher_unmap(struct sec_ctx *ctx, struct sec_req *req,
1273 			     struct scatterlist *src, struct scatterlist *dst)
1274 {
1275 	struct sec_aead_req *a_req = &req->aead_req;
1276 	struct sec_cipher_req *c_req = &req->c_req;
1277 	struct device *dev = ctx->dev;
1278 
1279 	if (req->req_id >= 0) {
1280 		if (req->use_pbuf) {
1281 			sec_cipher_pbuf_unmap(ctx, req, dst);
1282 		} else {
1283 			if (dst != src) {
1284 				hisi_acc_sg_buf_unmap(dev, dst, c_req->c_out, DMA_FROM_DEVICE);
1285 				hisi_acc_sg_buf_unmap(dev, src, req->in, DMA_TO_DEVICE);
1286 			} else {
1287 				hisi_acc_sg_buf_unmap(dev, src, req->in, DMA_BIDIRECTIONAL);
1288 			}
1289 		}
1290 		return;
1291 	}
1292 
1293 	if (req->use_pbuf) {
1294 		sec_cipher_pbuf_unmap(ctx, req, dst);
1295 	} else {
1296 		if (dst != src) {
1297 			sec_cipher_put_hw_sgl(dev, dst, req->buf.out_dma, DMA_FROM_DEVICE);
1298 			sec_cipher_put_hw_sgl(dev, src, req->buf.in_dma, DMA_TO_DEVICE);
1299 		} else {
1300 			sec_cipher_put_hw_sgl(dev, src, req->buf.in_dma, DMA_BIDIRECTIONAL);
1301 		}
1302 	}
1303 
1304 	dma_unmap_single(dev, c_req->c_ivin_dma, SEC_IV_SIZE, DMA_TO_DEVICE);
1305 	if (ctx->alg_type == SEC_AEAD) {
1306 		dma_unmap_single(dev, a_req->a_ivin_dma, SEC_IV_SIZE, DMA_TO_DEVICE);
1307 		dma_unmap_single(dev, a_req->out_mac_dma, SEC_MAX_MAC_LEN, DMA_BIDIRECTIONAL);
1308 	}
1309 }
1310 
1311 static int sec_skcipher_sgl_map(struct sec_ctx *ctx, struct sec_req *req)
1312 {
1313 	struct skcipher_request *sq = req->c_req.sk_req;
1314 
1315 	return sec_cipher_map(ctx, req, sq->src, sq->dst);
1316 }
1317 
1318 static void sec_skcipher_sgl_unmap(struct sec_ctx *ctx, struct sec_req *req)
1319 {
1320 	struct skcipher_request *sq = req->c_req.sk_req;
1321 
1322 	sec_cipher_unmap(ctx, req, sq->src, sq->dst);
1323 }
1324 
1325 static int sec_aead_aes_set_key(struct sec_cipher_ctx *c_ctx,
1326 				struct crypto_authenc_keys *keys)
1327 {
1328 	switch (keys->enckeylen) {
1329 	case AES_KEYSIZE_128:
1330 		c_ctx->c_key_len = SEC_CKEY_128BIT;
1331 		break;
1332 	case AES_KEYSIZE_192:
1333 		c_ctx->c_key_len = SEC_CKEY_192BIT;
1334 		break;
1335 	case AES_KEYSIZE_256:
1336 		c_ctx->c_key_len = SEC_CKEY_256BIT;
1337 		break;
1338 	default:
1339 		pr_err("hisi_sec2: aead aes key error!\n");
1340 		return -EINVAL;
1341 	}
1342 	memcpy(c_ctx->c_key, keys->enckey, keys->enckeylen);
1343 
1344 	return 0;
1345 }
1346 
1347 static int sec_aead_auth_set_key(struct sec_auth_ctx *ctx,
1348 				 struct crypto_authenc_keys *keys)
1349 {
1350 	struct crypto_shash *hash_tfm = ctx->hash_tfm;
1351 	int blocksize, digestsize, ret;
1352 
1353 	blocksize = crypto_shash_blocksize(hash_tfm);
1354 	digestsize = crypto_shash_digestsize(hash_tfm);
1355 	if (keys->authkeylen > blocksize) {
1356 		ret = crypto_shash_tfm_digest(hash_tfm, keys->authkey,
1357 					      keys->authkeylen, ctx->a_key);
1358 		if (ret) {
1359 			pr_err("hisi_sec2: aead auth digest error!\n");
1360 			return -EINVAL;
1361 		}
1362 		ctx->a_key_len = digestsize;
1363 	} else {
1364 		if (keys->authkeylen)
1365 			memcpy(ctx->a_key, keys->authkey, keys->authkeylen);
1366 		ctx->a_key_len = keys->authkeylen;
1367 	}
1368 
1369 	return 0;
1370 }
1371 
1372 static int sec_aead_setauthsize(struct crypto_aead *aead, unsigned int authsize)
1373 {
1374 	struct crypto_tfm *tfm = crypto_aead_tfm(aead);
1375 	struct sec_ctx *ctx = crypto_tfm_ctx(tfm);
1376 	struct sec_auth_ctx *a_ctx = &ctx->a_ctx;
1377 
1378 	return crypto_aead_setauthsize(a_ctx->fallback_aead_tfm, authsize);
1379 }
1380 
1381 static int sec_aead_fallback_setkey(struct sec_auth_ctx *a_ctx,
1382 				    struct crypto_aead *tfm, const u8 *key,
1383 				    unsigned int keylen)
1384 {
1385 	crypto_aead_clear_flags(a_ctx->fallback_aead_tfm, CRYPTO_TFM_REQ_MASK);
1386 	crypto_aead_set_flags(a_ctx->fallback_aead_tfm,
1387 			      crypto_aead_get_flags(tfm) & CRYPTO_TFM_REQ_MASK);
1388 	return crypto_aead_setkey(a_ctx->fallback_aead_tfm, key, keylen);
1389 }
1390 
1391 static int sec_aead_setkey(struct crypto_aead *tfm, const u8 *key,
1392 			   const u32 keylen, const enum sec_hash_alg a_alg,
1393 			   const enum sec_calg c_alg,
1394 			   const enum sec_cmode c_mode)
1395 {
1396 	struct sec_ctx *ctx = crypto_aead_ctx(tfm);
1397 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
1398 	struct sec_auth_ctx *a_ctx = &ctx->a_ctx;
1399 	struct device *dev = ctx->dev;
1400 	struct crypto_authenc_keys keys;
1401 	int ret;
1402 
1403 	ctx->a_ctx.a_alg = a_alg;
1404 	ctx->c_ctx.c_alg = c_alg;
1405 	c_ctx->c_mode = c_mode;
1406 
1407 	if (c_mode == SEC_CMODE_CCM || c_mode == SEC_CMODE_GCM) {
1408 		ret = sec_skcipher_aes_sm4_setkey(c_ctx, keylen, c_mode);
1409 		if (ret) {
1410 			dev_err(dev, "set sec aes ccm cipher key err!\n");
1411 			return ret;
1412 		}
1413 		memcpy(c_ctx->c_key, key, keylen);
1414 
1415 		return sec_aead_fallback_setkey(a_ctx, tfm, key, keylen);
1416 	}
1417 
1418 	ret = crypto_authenc_extractkeys(&keys, key, keylen);
1419 	if (ret) {
1420 		dev_err(dev, "sec extract aead keys err!\n");
1421 		goto bad_key;
1422 	}
1423 
1424 	ret = sec_aead_aes_set_key(c_ctx, &keys);
1425 	if (ret) {
1426 		dev_err(dev, "set sec cipher key err!\n");
1427 		goto bad_key;
1428 	}
1429 
1430 	ret = sec_aead_auth_set_key(&ctx->a_ctx, &keys);
1431 	if (ret) {
1432 		dev_err(dev, "set sec auth key err!\n");
1433 		goto bad_key;
1434 	}
1435 
1436 	ret = sec_aead_fallback_setkey(a_ctx, tfm, key, keylen);
1437 	if (ret) {
1438 		dev_err(dev, "set sec fallback key err!\n");
1439 		goto bad_key;
1440 	}
1441 
1442 	return 0;
1443 
1444 bad_key:
1445 	memzero_explicit(&keys, sizeof(struct crypto_authenc_keys));
1446 	return ret;
1447 }
1448 
1449 
1450 #define GEN_SEC_AEAD_SETKEY_FUNC(name, aalg, calg, cmode)				\
1451 static int sec_setkey_##name(struct crypto_aead *tfm, const u8 *key, u32 keylen)	\
1452 {											\
1453 	return sec_aead_setkey(tfm, key, keylen, aalg, calg, cmode);			\
1454 }
1455 
1456 GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha1, SEC_A_HMAC_SHA1, SEC_CALG_AES, SEC_CMODE_CBC)
1457 GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha256, SEC_A_HMAC_SHA256, SEC_CALG_AES, SEC_CMODE_CBC)
1458 GEN_SEC_AEAD_SETKEY_FUNC(aes_cbc_sha512, SEC_A_HMAC_SHA512, SEC_CALG_AES, SEC_CMODE_CBC)
1459 GEN_SEC_AEAD_SETKEY_FUNC(aes_ccm, 0, SEC_CALG_AES, SEC_CMODE_CCM)
1460 GEN_SEC_AEAD_SETKEY_FUNC(aes_gcm, 0, SEC_CALG_AES, SEC_CMODE_GCM)
1461 GEN_SEC_AEAD_SETKEY_FUNC(sm4_ccm, 0, SEC_CALG_SM4, SEC_CMODE_CCM)
1462 GEN_SEC_AEAD_SETKEY_FUNC(sm4_gcm, 0, SEC_CALG_SM4, SEC_CMODE_GCM)
1463 
1464 static int sec_aead_sgl_map(struct sec_ctx *ctx, struct sec_req *req)
1465 {
1466 	struct aead_request *aq = req->aead_req.aead_req;
1467 
1468 	return sec_cipher_map(ctx, req, aq->src, aq->dst);
1469 }
1470 
1471 static void sec_aead_sgl_unmap(struct sec_ctx *ctx, struct sec_req *req)
1472 {
1473 	struct aead_request *aq = req->aead_req.aead_req;
1474 
1475 	sec_cipher_unmap(ctx, req, aq->src, aq->dst);
1476 }
1477 
1478 static int sec_request_transfer(struct sec_ctx *ctx, struct sec_req *req)
1479 {
1480 	int ret;
1481 
1482 	ret = ctx->req_op->buf_map(ctx, req);
1483 	if (unlikely(ret))
1484 		return ret;
1485 
1486 	ctx->req_op->do_transfer(ctx, req);
1487 
1488 	ret = ctx->req_op->bd_fill(ctx, req);
1489 	if (unlikely(ret))
1490 		goto unmap_req_buf;
1491 
1492 	return ret;
1493 
1494 unmap_req_buf:
1495 	ctx->req_op->buf_unmap(ctx, req);
1496 	return ret;
1497 }
1498 
1499 static void sec_request_untransfer(struct sec_ctx *ctx, struct sec_req *req)
1500 {
1501 	ctx->req_op->buf_unmap(ctx, req);
1502 }
1503 
1504 static void sec_skcipher_copy_iv(struct sec_ctx *ctx, struct sec_req *req)
1505 {
1506 	struct skcipher_request *sk_req = req->c_req.sk_req;
1507 	struct sec_cipher_req *c_req = &req->c_req;
1508 
1509 	memcpy(c_req->c_ivin, sk_req->iv, ctx->c_ctx.ivsize);
1510 }
1511 
1512 static int sec_skcipher_bd_fill(struct sec_ctx *ctx, struct sec_req *req)
1513 {
1514 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
1515 	struct sec_cipher_req *c_req = &req->c_req;
1516 	struct sec_sqe *sec_sqe = &req->sec_sqe;
1517 	u8 scene, sa_type, da_type;
1518 	u8 bd_type, cipher;
1519 	u8 de = 0;
1520 
1521 	memset(sec_sqe, 0, sizeof(struct sec_sqe));
1522 
1523 	sec_sqe->type2.c_key_addr = cpu_to_le64(c_ctx->c_key_dma);
1524 	sec_sqe->type2.c_ivin_addr = cpu_to_le64(c_req->c_ivin_dma);
1525 	if (req->req_id < 0) {
1526 		sec_sqe->type2.data_src_addr = cpu_to_le64(req->buf.in_dma);
1527 		sec_sqe->type2.data_dst_addr = cpu_to_le64(req->buf.out_dma);
1528 	} else {
1529 		sec_sqe->type2.data_src_addr = cpu_to_le64(req->in_dma);
1530 		sec_sqe->type2.data_dst_addr = cpu_to_le64(c_req->c_out_dma);
1531 	}
1532 	if (sec_sqe->type2.data_src_addr != sec_sqe->type2.data_dst_addr)
1533 		de = 0x1 << SEC_DE_OFFSET;
1534 
1535 	sec_sqe->type2.icvw_kmode |= cpu_to_le16(((u16)c_ctx->c_mode) <<
1536 						SEC_CMODE_OFFSET);
1537 	sec_sqe->type2.c_alg = c_ctx->c_alg;
1538 	sec_sqe->type2.icvw_kmode |= cpu_to_le16(((u16)c_ctx->c_key_len) <<
1539 						SEC_CKEY_OFFSET);
1540 
1541 	bd_type = SEC_BD_TYPE2;
1542 	if (c_req->encrypt)
1543 		cipher = SEC_CIPHER_ENC << SEC_CIPHER_OFFSET;
1544 	else
1545 		cipher = SEC_CIPHER_DEC << SEC_CIPHER_OFFSET;
1546 	sec_sqe->type_cipher_auth = bd_type | cipher;
1547 
1548 	/* Set destination and source address type */
1549 	if (req->use_pbuf) {
1550 		sa_type = SEC_PBUF << SEC_SRC_SGL_OFFSET;
1551 		da_type = SEC_PBUF << SEC_DST_SGL_OFFSET;
1552 	} else {
1553 		sa_type = SEC_SGL << SEC_SRC_SGL_OFFSET;
1554 		da_type = SEC_SGL << SEC_DST_SGL_OFFSET;
1555 	}
1556 
1557 	sec_sqe->sdm_addr_type |= da_type;
1558 	scene = SEC_COMM_SCENE << SEC_SCENE_OFFSET;
1559 
1560 	sec_sqe->sds_sa_type = (de | scene | sa_type);
1561 
1562 	sec_sqe->type2.clen_ivhlen |= cpu_to_le32(c_req->c_len);
1563 
1564 	return 0;
1565 }
1566 
1567 static int sec_skcipher_bd_fill_v3(struct sec_ctx *ctx, struct sec_req *req)
1568 {
1569 	struct sec_sqe3 *sec_sqe3 = &req->sec_sqe3;
1570 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
1571 	struct sec_cipher_req *c_req = &req->c_req;
1572 	u32 bd_param = 0;
1573 	u16 cipher;
1574 
1575 	memset(sec_sqe3, 0, sizeof(struct sec_sqe3));
1576 
1577 	sec_sqe3->c_key_addr = cpu_to_le64(c_ctx->c_key_dma);
1578 	sec_sqe3->no_scene.c_ivin_addr = cpu_to_le64(c_req->c_ivin_dma);
1579 	if (req->req_id < 0) {
1580 		sec_sqe3->data_src_addr = cpu_to_le64(req->buf.in_dma);
1581 		sec_sqe3->data_dst_addr = cpu_to_le64(req->buf.out_dma);
1582 	} else {
1583 		sec_sqe3->data_src_addr = cpu_to_le64(req->in_dma);
1584 		sec_sqe3->data_dst_addr = cpu_to_le64(c_req->c_out_dma);
1585 	}
1586 	if (sec_sqe3->data_src_addr != sec_sqe3->data_dst_addr)
1587 		bd_param |= 0x1 << SEC_DE_OFFSET_V3;
1588 
1589 	sec_sqe3->c_mode_alg = ((u8)c_ctx->c_alg << SEC_CALG_OFFSET_V3) |
1590 						c_ctx->c_mode;
1591 	sec_sqe3->c_icv_key |= cpu_to_le16(((u16)c_ctx->c_key_len) <<
1592 						SEC_CKEY_OFFSET_V3);
1593 
1594 	if (c_req->encrypt)
1595 		cipher = SEC_CIPHER_ENC;
1596 	else
1597 		cipher = SEC_CIPHER_DEC;
1598 	sec_sqe3->c_icv_key |= cpu_to_le16(cipher);
1599 
1600 	/* Set the CTR counter mode is 128bit rollover */
1601 	sec_sqe3->auth_mac_key = cpu_to_le32((u32)SEC_CTR_CNT_ROLLOVER <<
1602 					SEC_CTR_CNT_OFFSET);
1603 
1604 	if (req->use_pbuf) {
1605 		bd_param |= SEC_PBUF << SEC_SRC_SGL_OFFSET_V3;
1606 		bd_param |= SEC_PBUF << SEC_DST_SGL_OFFSET_V3;
1607 	} else {
1608 		bd_param |= SEC_SGL << SEC_SRC_SGL_OFFSET_V3;
1609 		bd_param |= SEC_SGL << SEC_DST_SGL_OFFSET_V3;
1610 	}
1611 
1612 	bd_param |= SEC_COMM_SCENE << SEC_SCENE_OFFSET_V3;
1613 
1614 	bd_param |= SEC_BD_TYPE3;
1615 	sec_sqe3->bd_param = cpu_to_le32(bd_param);
1616 
1617 	sec_sqe3->c_len_ivin |= cpu_to_le32(c_req->c_len);
1618 	sec_sqe3->tag = cpu_to_le64((unsigned long)req);
1619 
1620 	return 0;
1621 }
1622 
1623 /* increment counter (128-bit int) */
1624 static void ctr_iv_inc(__u8 *counter, __u8 bits, __u32 nums)
1625 {
1626 	do {
1627 		--bits;
1628 		nums += counter[bits];
1629 		counter[bits] = nums & BITS_MASK;
1630 		nums >>= BYTE_BITS;
1631 	} while (bits && nums);
1632 }
1633 
1634 static void sec_update_iv(struct sec_req *req, enum sec_alg_type alg_type)
1635 {
1636 	struct aead_request *aead_req = req->aead_req.aead_req;
1637 	struct skcipher_request *sk_req = req->c_req.sk_req;
1638 	u32 iv_size = req->ctx->c_ctx.ivsize;
1639 	struct scatterlist *sgl;
1640 	unsigned int cryptlen;
1641 	size_t sz;
1642 	u8 *iv;
1643 
1644 	if (alg_type == SEC_SKCIPHER) {
1645 		sgl = req->c_req.encrypt ? sk_req->dst : sk_req->src;
1646 		iv = sk_req->iv;
1647 		cryptlen = sk_req->cryptlen;
1648 	} else {
1649 		sgl = req->c_req.encrypt ? aead_req->dst : aead_req->src;
1650 		iv = aead_req->iv;
1651 		cryptlen = aead_req->cryptlen;
1652 	}
1653 
1654 	if (req->ctx->c_ctx.c_mode == SEC_CMODE_CBC) {
1655 		sz = sg_pcopy_to_buffer(sgl, sg_nents(sgl), iv, iv_size,
1656 					cryptlen - iv_size);
1657 		if (unlikely(sz != iv_size))
1658 			dev_err(req->ctx->dev, "copy output iv error!\n");
1659 	} else {
1660 		sz = (cryptlen + iv_size - 1) / iv_size;
1661 		ctr_iv_inc(iv, iv_size, sz);
1662 	}
1663 }
1664 
1665 static void sec_skcipher_callback(struct sec_ctx *ctx, struct sec_req *req,
1666 				  int err)
1667 {
1668 	struct sec_qp_ctx *qp_ctx = req->qp_ctx;
1669 
1670 	if (req->req_id >= 0)
1671 		sec_free_req_id(req);
1672 
1673 	/* IV output at encrypto of CBC/CTR mode */
1674 	if (!err && (ctx->c_ctx.c_mode == SEC_CMODE_CBC ||
1675 	    ctx->c_ctx.c_mode == SEC_CMODE_CTR) && req->c_req.encrypt)
1676 		sec_update_iv(req, SEC_SKCIPHER);
1677 
1678 	crypto_request_complete(req->base, err);
1679 	sec_alg_send_backlog(ctx, qp_ctx);
1680 }
1681 
1682 static void set_aead_auth_iv(struct sec_ctx *ctx, struct sec_req *req)
1683 {
1684 	struct aead_request *aead_req = req->aead_req.aead_req;
1685 	struct crypto_aead *tfm = crypto_aead_reqtfm(aead_req);
1686 	size_t authsize = crypto_aead_authsize(tfm);
1687 	struct sec_aead_req *a_req = &req->aead_req;
1688 	struct sec_cipher_req *c_req = &req->c_req;
1689 	u32 data_size = aead_req->cryptlen;
1690 	u8 flage = 0;
1691 	u8 cm, cl;
1692 
1693 	/* the specification has been checked in aead_iv_demension_check() */
1694 	cl = c_req->c_ivin[0] + 1;
1695 	c_req->c_ivin[ctx->c_ctx.ivsize - cl] = 0x00;
1696 	memset(&c_req->c_ivin[ctx->c_ctx.ivsize - cl], 0, cl);
1697 	c_req->c_ivin[ctx->c_ctx.ivsize - IV_LAST_BYTE1] = IV_CTR_INIT;
1698 
1699 	/* the last 3bit is L' */
1700 	flage |= c_req->c_ivin[0] & IV_CL_MASK;
1701 
1702 	/* the M' is bit3~bit5, the Flags is bit6 */
1703 	cm = (authsize - IV_CM_CAL_NUM) / IV_CM_CAL_NUM;
1704 	flage |= cm << IV_CM_OFFSET;
1705 	if (aead_req->assoclen)
1706 		flage |= 0x01 << IV_FLAGS_OFFSET;
1707 
1708 	memcpy(a_req->a_ivin, c_req->c_ivin, ctx->c_ctx.ivsize);
1709 	a_req->a_ivin[0] = flage;
1710 
1711 	/*
1712 	 * the last 32bit is counter's initial number,
1713 	 * but the nonce uses the first 16bit
1714 	 * the tail 16bit fill with the cipher length
1715 	 */
1716 	if (!c_req->encrypt)
1717 		data_size = aead_req->cryptlen - authsize;
1718 
1719 	a_req->a_ivin[ctx->c_ctx.ivsize - IV_LAST_BYTE1] =
1720 			data_size & IV_LAST_BYTE_MASK;
1721 	data_size >>= IV_BYTE_OFFSET;
1722 	a_req->a_ivin[ctx->c_ctx.ivsize - IV_LAST_BYTE2] =
1723 			data_size & IV_LAST_BYTE_MASK;
1724 }
1725 
1726 static void sec_aead_set_iv(struct sec_ctx *ctx, struct sec_req *req)
1727 {
1728 	struct aead_request *aead_req = req->aead_req.aead_req;
1729 	struct sec_aead_req *a_req = &req->aead_req;
1730 	struct sec_cipher_req *c_req = &req->c_req;
1731 
1732 	memcpy(c_req->c_ivin, aead_req->iv, ctx->c_ctx.ivsize);
1733 
1734 	if (ctx->c_ctx.c_mode == SEC_CMODE_CCM) {
1735 		/*
1736 		 * CCM 16Byte Cipher_IV: {1B_Flage,13B_IV,2B_counter},
1737 		 * the  counter must set to 0x01
1738 		 * CCM 16Byte Auth_IV: {1B_AFlage,13B_IV,2B_Ptext_length}
1739 		 */
1740 		set_aead_auth_iv(ctx, req);
1741 	} else if (ctx->c_ctx.c_mode == SEC_CMODE_GCM) {
1742 		/* GCM 12Byte Cipher_IV == Auth_IV */
1743 		memcpy(a_req->a_ivin, c_req->c_ivin, SEC_AIV_SIZE);
1744 	}
1745 }
1746 
1747 static void sec_auth_bd_fill_xcm(struct sec_auth_ctx *ctx, int dir,
1748 				 struct sec_req *req, struct sec_sqe *sec_sqe)
1749 {
1750 	struct sec_aead_req *a_req = &req->aead_req;
1751 	struct aead_request *aq = a_req->aead_req;
1752 	struct crypto_aead *tfm = crypto_aead_reqtfm(aq);
1753 	size_t authsize = crypto_aead_authsize(tfm);
1754 
1755 	/* C_ICV_Len is MAC size, 0x4 ~ 0x10 */
1756 	sec_sqe->type2.icvw_kmode |= cpu_to_le16((u16)authsize);
1757 
1758 	/* mode set to CCM/GCM, don't set {A_Alg, AKey_Len, MAC_Len} */
1759 	sec_sqe->type2.a_key_addr = sec_sqe->type2.c_key_addr;
1760 	sec_sqe->type2.a_ivin_addr = cpu_to_le64(a_req->a_ivin_dma);
1761 	sec_sqe->type_cipher_auth |= SEC_NO_AUTH << SEC_AUTH_OFFSET;
1762 
1763 	if (dir)
1764 		sec_sqe->sds_sa_type &= SEC_CIPHER_AUTH;
1765 	else
1766 		sec_sqe->sds_sa_type |= SEC_AUTH_CIPHER;
1767 
1768 	sec_sqe->type2.alen_ivllen = cpu_to_le32(aq->assoclen);
1769 	sec_sqe->type2.auth_src_offset = cpu_to_le16(0x0);
1770 	sec_sqe->type2.cipher_src_offset = cpu_to_le16((u16)aq->assoclen);
1771 
1772 	sec_sqe->type2.mac_addr = cpu_to_le64(a_req->out_mac_dma);
1773 }
1774 
1775 static void sec_auth_bd_fill_xcm_v3(struct sec_auth_ctx *ctx, int dir,
1776 				    struct sec_req *req, struct sec_sqe3 *sqe3)
1777 {
1778 	struct sec_aead_req *a_req = &req->aead_req;
1779 	struct aead_request *aq = a_req->aead_req;
1780 	struct crypto_aead *tfm = crypto_aead_reqtfm(aq);
1781 	size_t authsize = crypto_aead_authsize(tfm);
1782 
1783 	/* C_ICV_Len is MAC size, 0x4 ~ 0x10 */
1784 	sqe3->c_icv_key |= cpu_to_le16((u16)authsize << SEC_MAC_OFFSET_V3);
1785 
1786 	/* mode set to CCM/GCM, don't set {A_Alg, AKey_Len, MAC_Len} */
1787 	sqe3->a_key_addr = sqe3->c_key_addr;
1788 	sqe3->auth_ivin.a_ivin_addr = cpu_to_le64(a_req->a_ivin_dma);
1789 	sqe3->auth_mac_key |= SEC_NO_AUTH;
1790 
1791 	if (dir)
1792 		sqe3->huk_iv_seq &= SEC_CIPHER_AUTH_V3;
1793 	else
1794 		sqe3->huk_iv_seq |= SEC_AUTH_CIPHER_V3;
1795 
1796 	sqe3->a_len_key = cpu_to_le32(aq->assoclen);
1797 	sqe3->auth_src_offset = cpu_to_le16(0x0);
1798 	sqe3->cipher_src_offset = cpu_to_le16((u16)aq->assoclen);
1799 	sqe3->mac_addr = cpu_to_le64(a_req->out_mac_dma);
1800 }
1801 
1802 static void sec_auth_bd_fill_ex(struct sec_auth_ctx *ctx, int dir,
1803 			       struct sec_req *req, struct sec_sqe *sec_sqe)
1804 {
1805 	struct sec_aead_req *a_req = &req->aead_req;
1806 	struct sec_cipher_req *c_req = &req->c_req;
1807 	struct aead_request *aq = a_req->aead_req;
1808 	struct crypto_aead *tfm = crypto_aead_reqtfm(aq);
1809 	size_t authsize = crypto_aead_authsize(tfm);
1810 
1811 	sec_sqe->type2.a_key_addr = cpu_to_le64(ctx->a_key_dma);
1812 
1813 	sec_sqe->type2.mac_key_alg = cpu_to_le32(BYTES_TO_WORDS(authsize));
1814 
1815 	sec_sqe->type2.mac_key_alg |=
1816 			cpu_to_le32((u32)BYTES_TO_WORDS(ctx->a_key_len) << SEC_AKEY_OFFSET);
1817 
1818 	sec_sqe->type2.mac_key_alg |=
1819 			cpu_to_le32((u32)(ctx->a_alg) << SEC_AEAD_ALG_OFFSET);
1820 
1821 	if (dir) {
1822 		sec_sqe->type_cipher_auth |= SEC_AUTH_TYPE1 << SEC_AUTH_OFFSET;
1823 		sec_sqe->sds_sa_type &= SEC_CIPHER_AUTH;
1824 	} else {
1825 		sec_sqe->type_cipher_auth |= SEC_AUTH_TYPE2 << SEC_AUTH_OFFSET;
1826 		sec_sqe->sds_sa_type |= SEC_AUTH_CIPHER;
1827 	}
1828 	sec_sqe->type2.alen_ivllen = cpu_to_le32(c_req->c_len + aq->assoclen);
1829 
1830 	sec_sqe->type2.cipher_src_offset = cpu_to_le16((u16)aq->assoclen);
1831 
1832 	sec_sqe->type2.mac_addr = cpu_to_le64(a_req->out_mac_dma);
1833 }
1834 
1835 static int sec_aead_bd_fill(struct sec_ctx *ctx, struct sec_req *req)
1836 {
1837 	struct sec_auth_ctx *auth_ctx = &ctx->a_ctx;
1838 	struct sec_sqe *sec_sqe = &req->sec_sqe;
1839 	int ret;
1840 
1841 	ret = sec_skcipher_bd_fill(ctx, req);
1842 	if (unlikely(ret)) {
1843 		dev_err(ctx->dev, "skcipher bd fill is error!\n");
1844 		return ret;
1845 	}
1846 
1847 	if (ctx->c_ctx.c_mode == SEC_CMODE_CCM ||
1848 	    ctx->c_ctx.c_mode == SEC_CMODE_GCM)
1849 		sec_auth_bd_fill_xcm(auth_ctx, req->c_req.encrypt, req, sec_sqe);
1850 	else
1851 		sec_auth_bd_fill_ex(auth_ctx, req->c_req.encrypt, req, sec_sqe);
1852 
1853 	return 0;
1854 }
1855 
1856 static void sec_auth_bd_fill_ex_v3(struct sec_auth_ctx *ctx, int dir,
1857 				   struct sec_req *req, struct sec_sqe3 *sqe3)
1858 {
1859 	struct sec_aead_req *a_req = &req->aead_req;
1860 	struct sec_cipher_req *c_req = &req->c_req;
1861 	struct aead_request *aq = a_req->aead_req;
1862 	struct crypto_aead *tfm = crypto_aead_reqtfm(aq);
1863 	size_t authsize = crypto_aead_authsize(tfm);
1864 
1865 	sqe3->a_key_addr = cpu_to_le64(ctx->a_key_dma);
1866 
1867 	sqe3->auth_mac_key |=
1868 			cpu_to_le32(BYTES_TO_WORDS(authsize) << SEC_MAC_OFFSET_V3);
1869 
1870 	sqe3->auth_mac_key |=
1871 			cpu_to_le32((u32)BYTES_TO_WORDS(ctx->a_key_len) << SEC_AKEY_OFFSET_V3);
1872 
1873 	sqe3->auth_mac_key |=
1874 			cpu_to_le32((u32)(ctx->a_alg) << SEC_AUTH_ALG_OFFSET_V3);
1875 
1876 	if (dir) {
1877 		sqe3->auth_mac_key |= cpu_to_le32((u32)SEC_AUTH_TYPE1);
1878 		sqe3->huk_iv_seq &= SEC_CIPHER_AUTH_V3;
1879 	} else {
1880 		sqe3->auth_mac_key |= cpu_to_le32((u32)SEC_AUTH_TYPE2);
1881 		sqe3->huk_iv_seq |= SEC_AUTH_CIPHER_V3;
1882 	}
1883 	sqe3->a_len_key = cpu_to_le32(c_req->c_len + aq->assoclen);
1884 
1885 	sqe3->cipher_src_offset = cpu_to_le16((u16)aq->assoclen);
1886 
1887 	sqe3->mac_addr = cpu_to_le64(a_req->out_mac_dma);
1888 }
1889 
1890 static int sec_aead_bd_fill_v3(struct sec_ctx *ctx, struct sec_req *req)
1891 {
1892 	struct sec_auth_ctx *auth_ctx = &ctx->a_ctx;
1893 	struct sec_sqe3 *sec_sqe3 = &req->sec_sqe3;
1894 	int ret;
1895 
1896 	ret = sec_skcipher_bd_fill_v3(ctx, req);
1897 	if (unlikely(ret)) {
1898 		dev_err(ctx->dev, "skcipher bd3 fill is error!\n");
1899 		return ret;
1900 	}
1901 
1902 	if (ctx->c_ctx.c_mode == SEC_CMODE_CCM ||
1903 	    ctx->c_ctx.c_mode == SEC_CMODE_GCM)
1904 		sec_auth_bd_fill_xcm_v3(auth_ctx, req->c_req.encrypt,
1905 					req, sec_sqe3);
1906 	else
1907 		sec_auth_bd_fill_ex_v3(auth_ctx, req->c_req.encrypt,
1908 				       req, sec_sqe3);
1909 
1910 	return 0;
1911 }
1912 
1913 static void sec_aead_callback(struct sec_ctx *c, struct sec_req *req, int err)
1914 {
1915 	struct aead_request *a_req = req->aead_req.aead_req;
1916 	struct crypto_aead *tfm = crypto_aead_reqtfm(a_req);
1917 	size_t authsize = crypto_aead_authsize(tfm);
1918 	struct sec_qp_ctx *qp_ctx = req->qp_ctx;
1919 	size_t sz;
1920 
1921 	if (!err && req->c_req.encrypt) {
1922 		if (c->c_ctx.c_mode == SEC_CMODE_CBC)
1923 			sec_update_iv(req, SEC_AEAD);
1924 
1925 		sz = sg_pcopy_from_buffer(a_req->dst, sg_nents(a_req->dst), req->aead_req.out_mac,
1926 					  authsize, a_req->cryptlen + a_req->assoclen);
1927 		if (unlikely(sz != authsize)) {
1928 			dev_err(c->dev, "copy out mac err!\n");
1929 			err = -EINVAL;
1930 		}
1931 	}
1932 
1933 	if (req->req_id >= 0)
1934 		sec_free_req_id(req);
1935 
1936 	crypto_request_complete(req->base, err);
1937 	sec_alg_send_backlog(c, qp_ctx);
1938 }
1939 
1940 static void sec_request_uninit(struct sec_req *req)
1941 {
1942 	if (req->req_id >= 0)
1943 		sec_free_req_id(req);
1944 }
1945 
1946 static int sec_request_init(struct sec_ctx *ctx, struct sec_req *req)
1947 {
1948 	struct sec_qp_ctx *qp_ctx;
1949 	int i = 0;
1950 
1951 	do {
1952 		qp_ctx = &ctx->qp_ctx[i];
1953 		req->req_id = sec_alloc_req_id(req, qp_ctx);
1954 	} while (req->req_id < 0 && ++i < ctx->sec->ctx_q_num);
1955 
1956 	req->qp_ctx = qp_ctx;
1957 
1958 	return 0;
1959 }
1960 
1961 static int sec_process(struct sec_ctx *ctx, struct sec_req *req)
1962 {
1963 	int ret;
1964 
1965 	ret = sec_request_init(ctx, req);
1966 	if (unlikely(ret))
1967 		return ret;
1968 
1969 	ret = sec_request_transfer(ctx, req);
1970 	if (unlikely(ret))
1971 		goto err_uninit_req;
1972 
1973 	/* Output IV as decrypto */
1974 	if (!req->c_req.encrypt && (ctx->c_ctx.c_mode == SEC_CMODE_CBC ||
1975 	    ctx->c_ctx.c_mode == SEC_CMODE_CTR))
1976 		sec_update_iv(req, ctx->alg_type);
1977 
1978 	ret = ctx->req_op->bd_send(ctx, req);
1979 	if (unlikely((ret != -EBUSY && ret != -EINPROGRESS))) {
1980 		dev_err_ratelimited(ctx->dev, "send sec request failed!\n");
1981 		goto err_send_req;
1982 	}
1983 
1984 	return ret;
1985 
1986 err_send_req:
1987 	/* As failing, restore the IV from user */
1988 	if (ctx->c_ctx.c_mode == SEC_CMODE_CBC && !req->c_req.encrypt) {
1989 		if (ctx->alg_type == SEC_SKCIPHER)
1990 			memcpy(req->c_req.sk_req->iv, req->c_req.c_ivin,
1991 			       ctx->c_ctx.ivsize);
1992 		else
1993 			memcpy(req->aead_req.aead_req->iv, req->c_req.c_ivin,
1994 			       ctx->c_ctx.ivsize);
1995 	}
1996 
1997 	sec_request_untransfer(ctx, req);
1998 
1999 err_uninit_req:
2000 	sec_request_uninit(req);
2001 	if (ctx->alg_type == SEC_AEAD)
2002 		ret = sec_aead_soft_crypto(ctx, req->aead_req.aead_req,
2003 					   req->c_req.encrypt);
2004 	else
2005 		ret = sec_skcipher_soft_crypto(ctx, req->c_req.sk_req,
2006 					       req->c_req.encrypt);
2007 	return ret;
2008 }
2009 
2010 static const struct sec_req_op sec_skcipher_req_ops = {
2011 	.buf_map	= sec_skcipher_sgl_map,
2012 	.buf_unmap	= sec_skcipher_sgl_unmap,
2013 	.do_transfer	= sec_skcipher_copy_iv,
2014 	.bd_fill	= sec_skcipher_bd_fill,
2015 	.bd_send	= sec_bd_send,
2016 	.callback	= sec_skcipher_callback,
2017 	.process	= sec_process,
2018 };
2019 
2020 static const struct sec_req_op sec_aead_req_ops = {
2021 	.buf_map	= sec_aead_sgl_map,
2022 	.buf_unmap	= sec_aead_sgl_unmap,
2023 	.do_transfer	= sec_aead_set_iv,
2024 	.bd_fill	= sec_aead_bd_fill,
2025 	.bd_send	= sec_bd_send,
2026 	.callback	= sec_aead_callback,
2027 	.process	= sec_process,
2028 };
2029 
2030 static const struct sec_req_op sec_skcipher_req_ops_v3 = {
2031 	.buf_map	= sec_skcipher_sgl_map,
2032 	.buf_unmap	= sec_skcipher_sgl_unmap,
2033 	.do_transfer	= sec_skcipher_copy_iv,
2034 	.bd_fill	= sec_skcipher_bd_fill_v3,
2035 	.bd_send	= sec_bd_send,
2036 	.callback	= sec_skcipher_callback,
2037 	.process	= sec_process,
2038 };
2039 
2040 static const struct sec_req_op sec_aead_req_ops_v3 = {
2041 	.buf_map	= sec_aead_sgl_map,
2042 	.buf_unmap	= sec_aead_sgl_unmap,
2043 	.do_transfer	= sec_aead_set_iv,
2044 	.bd_fill	= sec_aead_bd_fill_v3,
2045 	.bd_send	= sec_bd_send,
2046 	.callback	= sec_aead_callback,
2047 	.process	= sec_process,
2048 };
2049 
2050 static int sec_skcipher_ctx_init(struct crypto_skcipher *tfm)
2051 {
2052 	struct sec_ctx *ctx = crypto_skcipher_ctx(tfm);
2053 	int ret;
2054 
2055 	ret = sec_skcipher_init(tfm);
2056 	if (ret)
2057 		return ret;
2058 
2059 	if (ctx->sec->qm.ver < QM_HW_V3) {
2060 		ctx->type_supported = SEC_BD_TYPE2;
2061 		ctx->req_op = &sec_skcipher_req_ops;
2062 	} else {
2063 		ctx->type_supported = SEC_BD_TYPE3;
2064 		ctx->req_op = &sec_skcipher_req_ops_v3;
2065 	}
2066 
2067 	return ret;
2068 }
2069 
2070 static void sec_skcipher_ctx_exit(struct crypto_skcipher *tfm)
2071 {
2072 	sec_skcipher_uninit(tfm);
2073 }
2074 
2075 static int sec_aead_init(struct crypto_aead *tfm)
2076 {
2077 	struct sec_ctx *ctx = crypto_aead_ctx(tfm);
2078 	int ret;
2079 
2080 	crypto_aead_set_reqsize_dma(tfm, sizeof(struct sec_req));
2081 	ctx->alg_type = SEC_AEAD;
2082 	ctx->c_ctx.ivsize = crypto_aead_ivsize(tfm);
2083 	if (ctx->c_ctx.ivsize < SEC_AIV_SIZE ||
2084 	    ctx->c_ctx.ivsize > SEC_IV_SIZE) {
2085 		pr_err("get error aead iv size!\n");
2086 		return -EINVAL;
2087 	}
2088 
2089 	ret = sec_ctx_base_init(ctx);
2090 	if (ret)
2091 		return ret;
2092 	if (ctx->sec->qm.ver < QM_HW_V3) {
2093 		ctx->type_supported = SEC_BD_TYPE2;
2094 		ctx->req_op = &sec_aead_req_ops;
2095 	} else {
2096 		ctx->type_supported = SEC_BD_TYPE3;
2097 		ctx->req_op = &sec_aead_req_ops_v3;
2098 	}
2099 
2100 	ret = sec_auth_init(ctx);
2101 	if (ret)
2102 		goto err_auth_init;
2103 
2104 	ret = sec_cipher_init(ctx);
2105 	if (ret)
2106 		goto err_cipher_init;
2107 
2108 	return ret;
2109 
2110 err_cipher_init:
2111 	sec_auth_uninit(ctx);
2112 err_auth_init:
2113 	sec_ctx_base_uninit(ctx);
2114 	return ret;
2115 }
2116 
2117 static void sec_aead_exit(struct crypto_aead *tfm)
2118 {
2119 	struct sec_ctx *ctx = crypto_aead_ctx(tfm);
2120 
2121 	sec_cipher_uninit(ctx);
2122 	sec_auth_uninit(ctx);
2123 	sec_ctx_base_uninit(ctx);
2124 }
2125 
2126 static int sec_aead_ctx_init(struct crypto_aead *tfm, const char *hash_name)
2127 {
2128 	struct aead_alg *alg = crypto_aead_alg(tfm);
2129 	struct sec_ctx *ctx = crypto_aead_ctx(tfm);
2130 	struct sec_auth_ctx *a_ctx = &ctx->a_ctx;
2131 	const char *aead_name = alg->base.cra_name;
2132 	int ret;
2133 
2134 	ret = sec_aead_init(tfm);
2135 	if (ret) {
2136 		pr_err("hisi_sec2: aead init error!\n");
2137 		return ret;
2138 	}
2139 
2140 	a_ctx->hash_tfm = crypto_alloc_shash(hash_name, 0, 0);
2141 	if (IS_ERR(a_ctx->hash_tfm)) {
2142 		dev_err(ctx->dev, "aead alloc shash error!\n");
2143 		sec_aead_exit(tfm);
2144 		return PTR_ERR(a_ctx->hash_tfm);
2145 	}
2146 
2147 	a_ctx->fallback_aead_tfm = crypto_alloc_aead(aead_name, 0,
2148 						     CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_ASYNC);
2149 	if (IS_ERR(a_ctx->fallback_aead_tfm)) {
2150 		dev_err(ctx->dev, "aead driver alloc fallback tfm error!\n");
2151 		crypto_free_shash(ctx->a_ctx.hash_tfm);
2152 		sec_aead_exit(tfm);
2153 		return PTR_ERR(a_ctx->fallback_aead_tfm);
2154 	}
2155 
2156 	return 0;
2157 }
2158 
2159 static void sec_aead_ctx_exit(struct crypto_aead *tfm)
2160 {
2161 	struct sec_ctx *ctx = crypto_aead_ctx(tfm);
2162 
2163 	crypto_free_aead(ctx->a_ctx.fallback_aead_tfm);
2164 	crypto_free_shash(ctx->a_ctx.hash_tfm);
2165 	sec_aead_exit(tfm);
2166 }
2167 
2168 static int sec_aead_xcm_ctx_init(struct crypto_aead *tfm)
2169 {
2170 	struct aead_alg *alg = crypto_aead_alg(tfm);
2171 	struct sec_ctx *ctx = crypto_aead_ctx(tfm);
2172 	struct sec_auth_ctx *a_ctx = &ctx->a_ctx;
2173 	const char *aead_name = alg->base.cra_name;
2174 	int ret;
2175 
2176 	ret = sec_aead_init(tfm);
2177 	if (ret) {
2178 		dev_err(ctx->dev, "hisi_sec2: aead xcm init error!\n");
2179 		return ret;
2180 	}
2181 
2182 	a_ctx->fallback_aead_tfm = crypto_alloc_aead(aead_name, 0,
2183 						     CRYPTO_ALG_NEED_FALLBACK |
2184 						     CRYPTO_ALG_ASYNC);
2185 	if (IS_ERR(a_ctx->fallback_aead_tfm)) {
2186 		dev_err(ctx->dev, "aead driver alloc fallback tfm error!\n");
2187 		sec_aead_exit(tfm);
2188 		return PTR_ERR(a_ctx->fallback_aead_tfm);
2189 	}
2190 
2191 	return 0;
2192 }
2193 
2194 static void sec_aead_xcm_ctx_exit(struct crypto_aead *tfm)
2195 {
2196 	struct sec_ctx *ctx = crypto_aead_ctx(tfm);
2197 
2198 	crypto_free_aead(ctx->a_ctx.fallback_aead_tfm);
2199 	sec_aead_exit(tfm);
2200 }
2201 
2202 static int sec_aead_sha1_ctx_init(struct crypto_aead *tfm)
2203 {
2204 	return sec_aead_ctx_init(tfm, "sha1");
2205 }
2206 
2207 static int sec_aead_sha256_ctx_init(struct crypto_aead *tfm)
2208 {
2209 	return sec_aead_ctx_init(tfm, "sha256");
2210 }
2211 
2212 static int sec_aead_sha512_ctx_init(struct crypto_aead *tfm)
2213 {
2214 	return sec_aead_ctx_init(tfm, "sha512");
2215 }
2216 
2217 static int sec_skcipher_cryptlen_check(struct sec_ctx *ctx, struct sec_req *sreq)
2218 {
2219 	u32 cryptlen = sreq->c_req.sk_req->cryptlen;
2220 	struct device *dev = ctx->dev;
2221 	u8 c_mode = ctx->c_ctx.c_mode;
2222 	int ret = 0;
2223 
2224 	switch (c_mode) {
2225 	case SEC_CMODE_XTS:
2226 		if (unlikely(cryptlen < AES_BLOCK_SIZE)) {
2227 			dev_err(dev, "skcipher XTS mode input length error!\n");
2228 			ret = -EINVAL;
2229 		}
2230 		break;
2231 	case SEC_CMODE_ECB:
2232 	case SEC_CMODE_CBC:
2233 		if (unlikely(cryptlen & (AES_BLOCK_SIZE - 1))) {
2234 			dev_err(dev, "skcipher AES input length error!\n");
2235 			ret = -EINVAL;
2236 		}
2237 		break;
2238 	case SEC_CMODE_CTR:
2239 		break;
2240 	default:
2241 		ret = -EINVAL;
2242 	}
2243 
2244 	return ret;
2245 }
2246 
2247 static int sec_skcipher_param_check(struct sec_ctx *ctx,
2248 				    struct sec_req *sreq, bool *need_fallback)
2249 {
2250 	struct skcipher_request *sk_req = sreq->c_req.sk_req;
2251 	struct device *dev = ctx->dev;
2252 	u8 c_alg = ctx->c_ctx.c_alg;
2253 
2254 	if (unlikely(!sk_req->src || !sk_req->dst)) {
2255 		dev_err(dev, "skcipher input param error!\n");
2256 		return -EINVAL;
2257 	}
2258 
2259 	if (sk_req->cryptlen > MAX_INPUT_DATA_LEN)
2260 		*need_fallback = true;
2261 
2262 	sreq->c_req.c_len = sk_req->cryptlen;
2263 
2264 	if (ctx->pbuf_supported && sk_req->cryptlen <= SEC_PBUF_SZ)
2265 		sreq->use_pbuf = true;
2266 	else
2267 		sreq->use_pbuf = false;
2268 
2269 	if (c_alg == SEC_CALG_3DES) {
2270 		if (unlikely(sk_req->cryptlen & (DES3_EDE_BLOCK_SIZE - 1))) {
2271 			dev_err(dev, "skcipher 3des input length error!\n");
2272 			return -EINVAL;
2273 		}
2274 		return 0;
2275 	} else if (c_alg == SEC_CALG_AES || c_alg == SEC_CALG_SM4) {
2276 		return sec_skcipher_cryptlen_check(ctx, sreq);
2277 	}
2278 
2279 	dev_err(dev, "skcipher algorithm error!\n");
2280 
2281 	return -EINVAL;
2282 }
2283 
2284 static int sec_skcipher_soft_crypto(struct sec_ctx *ctx,
2285 				    struct skcipher_request *sreq, bool encrypt)
2286 {
2287 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
2288 	SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, c_ctx->fbtfm);
2289 	struct device *dev = ctx->dev;
2290 	int ret;
2291 
2292 	if (!c_ctx->fbtfm) {
2293 		dev_err_ratelimited(dev, "the soft tfm isn't supported in the current system.\n");
2294 		return -EINVAL;
2295 	}
2296 
2297 	skcipher_request_set_sync_tfm(subreq, c_ctx->fbtfm);
2298 
2299 	/* software need sync mode to do crypto */
2300 	skcipher_request_set_callback(subreq, sreq->base.flags,
2301 				      NULL, NULL);
2302 	skcipher_request_set_crypt(subreq, sreq->src, sreq->dst,
2303 				   sreq->cryptlen, sreq->iv);
2304 	if (encrypt)
2305 		ret = crypto_skcipher_encrypt(subreq);
2306 	else
2307 		ret = crypto_skcipher_decrypt(subreq);
2308 
2309 	skcipher_request_zero(subreq);
2310 
2311 	return ret;
2312 }
2313 
2314 static int sec_skcipher_crypto(struct skcipher_request *sk_req, bool encrypt)
2315 {
2316 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(sk_req);
2317 	struct sec_req *req = skcipher_request_ctx_dma(sk_req);
2318 	struct sec_ctx *ctx = crypto_skcipher_ctx(tfm);
2319 	bool need_fallback = false;
2320 	int ret;
2321 
2322 	if (!sk_req->cryptlen) {
2323 		if (ctx->c_ctx.c_mode == SEC_CMODE_XTS)
2324 			return -EINVAL;
2325 		return 0;
2326 	}
2327 
2328 	req->flag = sk_req->base.flags;
2329 	req->c_req.sk_req = sk_req;
2330 	req->c_req.encrypt = encrypt;
2331 	req->ctx = ctx;
2332 	req->base = &sk_req->base;
2333 
2334 	ret = sec_skcipher_param_check(ctx, req, &need_fallback);
2335 	if (unlikely(ret))
2336 		return -EINVAL;
2337 
2338 	if (unlikely(ctx->c_ctx.fallback || need_fallback))
2339 		return sec_skcipher_soft_crypto(ctx, sk_req, encrypt);
2340 
2341 	return ctx->req_op->process(ctx, req);
2342 }
2343 
2344 static int sec_skcipher_encrypt(struct skcipher_request *sk_req)
2345 {
2346 	return sec_skcipher_crypto(sk_req, true);
2347 }
2348 
2349 static int sec_skcipher_decrypt(struct skcipher_request *sk_req)
2350 {
2351 	return sec_skcipher_crypto(sk_req, false);
2352 }
2353 
2354 #define SEC_SKCIPHER_ALG(sec_cra_name, sec_set_key, \
2355 	sec_min_key_size, sec_max_key_size, blk_size, iv_size)\
2356 {\
2357 	.base = {\
2358 		.cra_name = sec_cra_name,\
2359 		.cra_driver_name = "hisi_sec_"sec_cra_name,\
2360 		.cra_priority = SEC_PRIORITY,\
2361 		.cra_flags = CRYPTO_ALG_ASYNC |\
2362 		 CRYPTO_ALG_NEED_FALLBACK,\
2363 		.cra_blocksize = blk_size,\
2364 		.cra_ctxsize = sizeof(struct sec_ctx),\
2365 		.cra_module = THIS_MODULE,\
2366 	},\
2367 	.init = sec_skcipher_ctx_init,\
2368 	.exit = sec_skcipher_ctx_exit,\
2369 	.setkey = sec_set_key,\
2370 	.decrypt = sec_skcipher_decrypt,\
2371 	.encrypt = sec_skcipher_encrypt,\
2372 	.min_keysize = sec_min_key_size,\
2373 	.max_keysize = sec_max_key_size,\
2374 	.ivsize = iv_size,\
2375 }
2376 
2377 static struct sec_skcipher sec_skciphers[] = {
2378 	{
2379 		.alg_msk = BIT(0),
2380 		.alg = SEC_SKCIPHER_ALG("ecb(aes)", sec_setkey_aes_ecb, AES_MIN_KEY_SIZE,
2381 					AES_MAX_KEY_SIZE, AES_BLOCK_SIZE, 0),
2382 	},
2383 	{
2384 		.alg_msk = BIT(1),
2385 		.alg = SEC_SKCIPHER_ALG("cbc(aes)", sec_setkey_aes_cbc, AES_MIN_KEY_SIZE,
2386 					AES_MAX_KEY_SIZE, AES_BLOCK_SIZE, AES_BLOCK_SIZE),
2387 	},
2388 	{
2389 		.alg_msk = BIT(2),
2390 		.alg = SEC_SKCIPHER_ALG("ctr(aes)", sec_setkey_aes_ctr,	AES_MIN_KEY_SIZE,
2391 					AES_MAX_KEY_SIZE, SEC_MIN_BLOCK_SZ, AES_BLOCK_SIZE),
2392 	},
2393 	{
2394 		.alg_msk = BIT(3),
2395 		.alg = SEC_SKCIPHER_ALG("xts(aes)", sec_setkey_aes_xts,	SEC_XTS_MIN_KEY_SIZE,
2396 					SEC_XTS_MAX_KEY_SIZE, AES_BLOCK_SIZE, AES_BLOCK_SIZE),
2397 	},
2398 	{
2399 		.alg_msk = BIT(12),
2400 		.alg = SEC_SKCIPHER_ALG("cbc(sm4)", sec_setkey_sm4_cbc,	AES_MIN_KEY_SIZE,
2401 					AES_MIN_KEY_SIZE, AES_BLOCK_SIZE, AES_BLOCK_SIZE),
2402 	},
2403 	{
2404 		.alg_msk = BIT(13),
2405 		.alg = SEC_SKCIPHER_ALG("ctr(sm4)", sec_setkey_sm4_ctr, AES_MIN_KEY_SIZE,
2406 					AES_MIN_KEY_SIZE, SEC_MIN_BLOCK_SZ, AES_BLOCK_SIZE),
2407 	},
2408 	{
2409 		.alg_msk = BIT(14),
2410 		.alg = SEC_SKCIPHER_ALG("xts(sm4)", sec_setkey_sm4_xts,	SEC_XTS_MIN_KEY_SIZE,
2411 					SEC_XTS_MIN_KEY_SIZE, AES_BLOCK_SIZE, AES_BLOCK_SIZE),
2412 	},
2413 	{
2414 		.alg_msk = BIT(23),
2415 		.alg = SEC_SKCIPHER_ALG("ecb(des3_ede)", sec_setkey_3des_ecb, SEC_DES3_3KEY_SIZE,
2416 					SEC_DES3_3KEY_SIZE, DES3_EDE_BLOCK_SIZE, 0),
2417 	},
2418 	{
2419 		.alg_msk = BIT(24),
2420 		.alg = SEC_SKCIPHER_ALG("cbc(des3_ede)", sec_setkey_3des_cbc, SEC_DES3_3KEY_SIZE,
2421 					SEC_DES3_3KEY_SIZE, DES3_EDE_BLOCK_SIZE,
2422 					DES3_EDE_BLOCK_SIZE),
2423 	},
2424 };
2425 
2426 static int aead_iv_demension_check(struct aead_request *aead_req)
2427 {
2428 	u8 cl;
2429 
2430 	cl = aead_req->iv[0] + 1;
2431 	if (cl < IV_CL_MIN || cl > IV_CL_MAX)
2432 		return -EINVAL;
2433 
2434 	if (cl < IV_CL_MID && aead_req->cryptlen >> (BYTE_BITS * cl))
2435 		return -EOVERFLOW;
2436 
2437 	return 0;
2438 }
2439 
2440 static int sec_aead_spec_check(struct sec_ctx *ctx, struct sec_req *sreq)
2441 {
2442 	struct aead_request *req = sreq->aead_req.aead_req;
2443 	struct crypto_aead *tfm = crypto_aead_reqtfm(req);
2444 	size_t sz = crypto_aead_authsize(tfm);
2445 	u8 c_mode = ctx->c_ctx.c_mode;
2446 	int ret;
2447 
2448 	if (unlikely(ctx->sec->qm.ver == QM_HW_V2 && !sreq->c_req.c_len))
2449 		return -EINVAL;
2450 
2451 	if (unlikely(req->cryptlen + req->assoclen > MAX_INPUT_DATA_LEN ||
2452 		     req->assoclen > SEC_MAX_AAD_LEN))
2453 		return -EINVAL;
2454 
2455 	if (c_mode == SEC_CMODE_CCM) {
2456 		if (unlikely(req->assoclen > SEC_MAX_CCM_AAD_LEN))
2457 			return -EINVAL;
2458 
2459 		ret = aead_iv_demension_check(req);
2460 		if (unlikely(ret))
2461 			return -EINVAL;
2462 	} else if (c_mode == SEC_CMODE_CBC) {
2463 		if (unlikely(sz & WORD_MASK))
2464 			return -EINVAL;
2465 		if (unlikely(ctx->a_ctx.a_key_len & WORD_MASK))
2466 			return -EINVAL;
2467 	} else if (c_mode == SEC_CMODE_GCM) {
2468 		if (unlikely(sz < SEC_GCM_MIN_AUTH_SZ))
2469 			return -EINVAL;
2470 	}
2471 
2472 	return 0;
2473 }
2474 
2475 static int sec_aead_param_check(struct sec_ctx *ctx, struct sec_req *sreq, bool *need_fallback)
2476 {
2477 	struct aead_request *req = sreq->aead_req.aead_req;
2478 	struct device *dev = ctx->dev;
2479 	u8 c_alg = ctx->c_ctx.c_alg;
2480 
2481 	if (unlikely(!req->src || !req->dst)) {
2482 		dev_err(dev, "aead input param error!\n");
2483 		return -EINVAL;
2484 	}
2485 
2486 	if (unlikely(ctx->c_ctx.c_mode == SEC_CMODE_CBC &&
2487 		     sreq->c_req.c_len & (AES_BLOCK_SIZE - 1))) {
2488 		dev_err(dev, "aead cbc mode input data length error!\n");
2489 		return -EINVAL;
2490 	}
2491 
2492 	/* Support AES or SM4 */
2493 	if (unlikely(c_alg != SEC_CALG_AES && c_alg != SEC_CALG_SM4)) {
2494 		dev_err(dev, "aead crypto alg error!\n");
2495 		return -EINVAL;
2496 	}
2497 
2498 	if (unlikely(sec_aead_spec_check(ctx, sreq))) {
2499 		*need_fallback = true;
2500 		return -EINVAL;
2501 	}
2502 
2503 	if (ctx->pbuf_supported && (req->cryptlen + req->assoclen) <=
2504 		SEC_PBUF_SZ)
2505 		sreq->use_pbuf = true;
2506 	else
2507 		sreq->use_pbuf = false;
2508 
2509 	return 0;
2510 }
2511 
2512 static int sec_aead_soft_crypto(struct sec_ctx *ctx,
2513 				struct aead_request *aead_req,
2514 				bool encrypt)
2515 {
2516 	struct sec_auth_ctx *a_ctx = &ctx->a_ctx;
2517 	struct aead_request *subreq;
2518 	int ret;
2519 
2520 	subreq = aead_request_alloc(a_ctx->fallback_aead_tfm, GFP_KERNEL);
2521 	if (!subreq)
2522 		return -ENOMEM;
2523 
2524 	aead_request_set_tfm(subreq, a_ctx->fallback_aead_tfm);
2525 	aead_request_set_callback(subreq, aead_req->base.flags,
2526 				  aead_req->base.complete, aead_req->base.data);
2527 	aead_request_set_crypt(subreq, aead_req->src, aead_req->dst,
2528 			       aead_req->cryptlen, aead_req->iv);
2529 	aead_request_set_ad(subreq, aead_req->assoclen);
2530 
2531 	if (encrypt)
2532 		ret = crypto_aead_encrypt(subreq);
2533 	else
2534 		ret = crypto_aead_decrypt(subreq);
2535 	aead_request_free(subreq);
2536 
2537 	return ret;
2538 }
2539 
2540 static int sec_aead_crypto(struct aead_request *a_req, bool encrypt)
2541 {
2542 	struct crypto_aead *tfm = crypto_aead_reqtfm(a_req);
2543 	struct sec_req *req = aead_request_ctx_dma(a_req);
2544 	struct sec_ctx *ctx = crypto_aead_ctx(tfm);
2545 	size_t sz = crypto_aead_authsize(tfm);
2546 	bool need_fallback = false;
2547 	int ret;
2548 
2549 	req->flag = a_req->base.flags;
2550 	req->aead_req.aead_req = a_req;
2551 	req->c_req.encrypt = encrypt;
2552 	req->ctx = ctx;
2553 	req->base = &a_req->base;
2554 	req->c_req.c_len = a_req->cryptlen - (req->c_req.encrypt ? 0 : sz);
2555 
2556 	ret = sec_aead_param_check(ctx, req, &need_fallback);
2557 	if (unlikely(ret)) {
2558 		if (need_fallback)
2559 			return sec_aead_soft_crypto(ctx, a_req, encrypt);
2560 		return -EINVAL;
2561 	}
2562 
2563 	return ctx->req_op->process(ctx, req);
2564 }
2565 
2566 static int sec_aead_encrypt(struct aead_request *a_req)
2567 {
2568 	return sec_aead_crypto(a_req, true);
2569 }
2570 
2571 static int sec_aead_decrypt(struct aead_request *a_req)
2572 {
2573 	return sec_aead_crypto(a_req, false);
2574 }
2575 
2576 #define SEC_AEAD_ALG(sec_cra_name, sec_set_key, ctx_init,\
2577 			 ctx_exit, blk_size, iv_size, max_authsize)\
2578 {\
2579 	.base = {\
2580 		.cra_name = sec_cra_name,\
2581 		.cra_driver_name = "hisi_sec_"sec_cra_name,\
2582 		.cra_priority = SEC_PRIORITY,\
2583 		.cra_flags = CRYPTO_ALG_ASYNC |\
2584 		 CRYPTO_ALG_NEED_FALLBACK,\
2585 		.cra_blocksize = blk_size,\
2586 		.cra_ctxsize = sizeof(struct sec_ctx),\
2587 		.cra_module = THIS_MODULE,\
2588 	},\
2589 	.init = ctx_init,\
2590 	.exit = ctx_exit,\
2591 	.setkey = sec_set_key,\
2592 	.setauthsize = sec_aead_setauthsize,\
2593 	.decrypt = sec_aead_decrypt,\
2594 	.encrypt = sec_aead_encrypt,\
2595 	.ivsize = iv_size,\
2596 	.maxauthsize = max_authsize,\
2597 }
2598 
2599 static struct sec_aead sec_aeads[] = {
2600 	{
2601 		.alg_msk = BIT(6),
2602 		.alg = SEC_AEAD_ALG("ccm(aes)", sec_setkey_aes_ccm, sec_aead_xcm_ctx_init,
2603 				    sec_aead_xcm_ctx_exit, SEC_MIN_BLOCK_SZ, AES_BLOCK_SIZE,
2604 				    AES_BLOCK_SIZE),
2605 	},
2606 	{
2607 		.alg_msk = BIT(7),
2608 		.alg = SEC_AEAD_ALG("gcm(aes)", sec_setkey_aes_gcm, sec_aead_xcm_ctx_init,
2609 				    sec_aead_xcm_ctx_exit, SEC_MIN_BLOCK_SZ, SEC_AIV_SIZE,
2610 				    AES_BLOCK_SIZE),
2611 	},
2612 	{
2613 		.alg_msk = BIT(17),
2614 		.alg = SEC_AEAD_ALG("ccm(sm4)", sec_setkey_sm4_ccm, sec_aead_xcm_ctx_init,
2615 				    sec_aead_xcm_ctx_exit, SEC_MIN_BLOCK_SZ, AES_BLOCK_SIZE,
2616 				    AES_BLOCK_SIZE),
2617 	},
2618 	{
2619 		.alg_msk = BIT(18),
2620 		.alg = SEC_AEAD_ALG("gcm(sm4)", sec_setkey_sm4_gcm, sec_aead_xcm_ctx_init,
2621 				    sec_aead_xcm_ctx_exit, SEC_MIN_BLOCK_SZ, SEC_AIV_SIZE,
2622 				    AES_BLOCK_SIZE),
2623 	},
2624 	{
2625 		.alg_msk = BIT(43),
2626 		.alg = SEC_AEAD_ALG("authenc(hmac(sha1),cbc(aes))", sec_setkey_aes_cbc_sha1,
2627 				    sec_aead_sha1_ctx_init, sec_aead_ctx_exit, AES_BLOCK_SIZE,
2628 				    AES_BLOCK_SIZE, SHA1_DIGEST_SIZE),
2629 	},
2630 	{
2631 		.alg_msk = BIT(44),
2632 		.alg = SEC_AEAD_ALG("authenc(hmac(sha256),cbc(aes))", sec_setkey_aes_cbc_sha256,
2633 				    sec_aead_sha256_ctx_init, sec_aead_ctx_exit, AES_BLOCK_SIZE,
2634 				    AES_BLOCK_SIZE, SHA256_DIGEST_SIZE),
2635 	},
2636 	{
2637 		.alg_msk = BIT(45),
2638 		.alg = SEC_AEAD_ALG("authenc(hmac(sha512),cbc(aes))", sec_setkey_aes_cbc_sha512,
2639 				    sec_aead_sha512_ctx_init, sec_aead_ctx_exit, AES_BLOCK_SIZE,
2640 				    AES_BLOCK_SIZE, SHA512_DIGEST_SIZE),
2641 	},
2642 };
2643 
2644 static void sec_unregister_skcipher(u64 alg_mask, int end)
2645 {
2646 	int i;
2647 
2648 	for (i = 0; i < end; i++)
2649 		if (sec_skciphers[i].alg_msk & alg_mask)
2650 			crypto_unregister_skcipher(&sec_skciphers[i].alg);
2651 }
2652 
2653 static int sec_register_skcipher(u64 alg_mask)
2654 {
2655 	int i, ret, count;
2656 
2657 	count = ARRAY_SIZE(sec_skciphers);
2658 
2659 	for (i = 0; i < count; i++) {
2660 		if (!(sec_skciphers[i].alg_msk & alg_mask))
2661 			continue;
2662 
2663 		ret = crypto_register_skcipher(&sec_skciphers[i].alg);
2664 		if (ret)
2665 			goto err;
2666 	}
2667 
2668 	return 0;
2669 
2670 err:
2671 	sec_unregister_skcipher(alg_mask, i);
2672 
2673 	return ret;
2674 }
2675 
2676 static void sec_unregister_aead(u64 alg_mask, int end)
2677 {
2678 	int i;
2679 
2680 	for (i = 0; i < end; i++)
2681 		if (sec_aeads[i].alg_msk & alg_mask)
2682 			crypto_unregister_aead(&sec_aeads[i].alg);
2683 }
2684 
2685 static int sec_register_aead(u64 alg_mask)
2686 {
2687 	int i, ret, count;
2688 
2689 	count = ARRAY_SIZE(sec_aeads);
2690 
2691 	for (i = 0; i < count; i++) {
2692 		if (!(sec_aeads[i].alg_msk & alg_mask))
2693 			continue;
2694 
2695 		ret = crypto_register_aead(&sec_aeads[i].alg);
2696 		if (ret)
2697 			goto err;
2698 	}
2699 
2700 	return 0;
2701 
2702 err:
2703 	sec_unregister_aead(alg_mask, i);
2704 
2705 	return ret;
2706 }
2707 
2708 int sec_register_to_crypto(struct hisi_qm *qm)
2709 {
2710 	u64 alg_mask;
2711 	int ret = 0;
2712 
2713 	alg_mask = sec_get_alg_bitmap(qm, SEC_DRV_ALG_BITMAP_HIGH_TB,
2714 				      SEC_DRV_ALG_BITMAP_LOW_TB);
2715 
2716 	mutex_lock(&sec_algs_lock);
2717 	if (sec_available_devs) {
2718 		sec_available_devs++;
2719 		goto unlock;
2720 	}
2721 
2722 	ret = sec_register_skcipher(alg_mask);
2723 	if (ret)
2724 		goto unlock;
2725 
2726 	ret = sec_register_aead(alg_mask);
2727 	if (ret)
2728 		goto unreg_skcipher;
2729 
2730 	sec_available_devs++;
2731 	mutex_unlock(&sec_algs_lock);
2732 
2733 	return 0;
2734 
2735 unreg_skcipher:
2736 	sec_unregister_skcipher(alg_mask, ARRAY_SIZE(sec_skciphers));
2737 unlock:
2738 	mutex_unlock(&sec_algs_lock);
2739 	return ret;
2740 }
2741 
2742 void sec_unregister_from_crypto(struct hisi_qm *qm)
2743 {
2744 	u64 alg_mask;
2745 
2746 	alg_mask = sec_get_alg_bitmap(qm, SEC_DRV_ALG_BITMAP_HIGH_TB,
2747 				      SEC_DRV_ALG_BITMAP_LOW_TB);
2748 
2749 	mutex_lock(&sec_algs_lock);
2750 	if (--sec_available_devs)
2751 		goto unlock;
2752 
2753 	sec_unregister_aead(alg_mask, ARRAY_SIZE(sec_aeads));
2754 	sec_unregister_skcipher(alg_mask, ARRAY_SIZE(sec_skciphers));
2755 
2756 unlock:
2757 	mutex_unlock(&sec_algs_lock);
2758 }
2759