1 /* 2 * This file is part of the Chelsio T6 Crypto driver for Linux. 3 * 4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 * 34 */ 35 36 #ifndef __CHCR_CRYPTO_H__ 37 #define __CHCR_CRYPTO_H__ 38 39 #define GHASH_BLOCK_SIZE 16 40 #define GHASH_DIGEST_SIZE 16 41 42 #define CCM_B0_SIZE 16 43 #define CCM_AAD_FIELD_SIZE 2 44 #define T6_MAX_AAD_SIZE 511 45 46 47 /* Define following if h/w is not dropping the AAD and IV data before 48 * giving the processed data 49 */ 50 51 #define CHCR_CRA_PRIORITY 500 52 #define CHCR_AEAD_PRIORITY 6000 53 #define CHCR_AES_MAX_KEY_LEN (2 * (AES_MAX_KEY_SIZE)) /* consider xts */ 54 #define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */ 55 56 #define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/ 57 #define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/ 58 59 #define CHCR_GIVENCRYPT_OP 2 60 /* CPL/SCMD parameters */ 61 62 #define CHCR_ENCRYPT_OP 0 63 #define CHCR_DECRYPT_OP 1 64 65 #define CHCR_SCMD_SEQ_NO_CTRL_32BIT 1 66 #define CHCR_SCMD_SEQ_NO_CTRL_48BIT 2 67 #define CHCR_SCMD_SEQ_NO_CTRL_64BIT 3 68 69 #define CHCR_SCMD_PROTO_VERSION_GENERIC 4 70 71 #define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 0 72 #define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 1 73 74 #define CHCR_SCMD_CIPHER_MODE_NOP 0 75 #define CHCR_SCMD_CIPHER_MODE_AES_CBC 1 76 #define CHCR_SCMD_CIPHER_MODE_AES_GCM 2 77 #define CHCR_SCMD_CIPHER_MODE_AES_CTR 3 78 #define CHCR_SCMD_CIPHER_MODE_GENERIC_AES 4 79 #define CHCR_SCMD_CIPHER_MODE_AES_XTS 6 80 #define CHCR_SCMD_CIPHER_MODE_AES_CCM 7 81 82 #define CHCR_SCMD_AUTH_MODE_NOP 0 83 #define CHCR_SCMD_AUTH_MODE_SHA1 1 84 #define CHCR_SCMD_AUTH_MODE_SHA224 2 85 #define CHCR_SCMD_AUTH_MODE_SHA256 3 86 #define CHCR_SCMD_AUTH_MODE_GHASH 4 87 #define CHCR_SCMD_AUTH_MODE_SHA512_224 5 88 #define CHCR_SCMD_AUTH_MODE_SHA512_256 6 89 #define CHCR_SCMD_AUTH_MODE_SHA512_384 7 90 #define CHCR_SCMD_AUTH_MODE_SHA512_512 8 91 #define CHCR_SCMD_AUTH_MODE_CBCMAC 9 92 #define CHCR_SCMD_AUTH_MODE_CMAC 10 93 94 #define CHCR_SCMD_HMAC_CTRL_NOP 0 95 #define CHCR_SCMD_HMAC_CTRL_NO_TRUNC 1 96 #define CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366 2 97 #define CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT 3 98 #define CHCR_SCMD_HMAC_CTRL_PL1 4 99 #define CHCR_SCMD_HMAC_CTRL_PL2 5 100 #define CHCR_SCMD_HMAC_CTRL_PL3 6 101 #define CHCR_SCMD_HMAC_CTRL_DIV2 7 102 #define VERIFY_HW 0 103 #define VERIFY_SW 1 104 105 #define CHCR_SCMD_IVGEN_CTRL_HW 0 106 #define CHCR_SCMD_IVGEN_CTRL_SW 1 107 /* This are not really mac key size. They are intermediate values 108 * of sha engine and its size 109 */ 110 #define CHCR_KEYCTX_MAC_KEY_SIZE_128 0 111 #define CHCR_KEYCTX_MAC_KEY_SIZE_160 1 112 #define CHCR_KEYCTX_MAC_KEY_SIZE_192 2 113 #define CHCR_KEYCTX_MAC_KEY_SIZE_256 3 114 #define CHCR_KEYCTX_MAC_KEY_SIZE_512 4 115 #define CHCR_KEYCTX_CIPHER_KEY_SIZE_128 0 116 #define CHCR_KEYCTX_CIPHER_KEY_SIZE_192 1 117 #define CHCR_KEYCTX_CIPHER_KEY_SIZE_256 2 118 #define CHCR_KEYCTX_NO_KEY 15 119 120 #define CHCR_CPL_FW4_PLD_IV_OFFSET (5 * 64) /* bytes. flt #5 and #6 */ 121 #define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */ 122 #define CHCR_CPL_FW4_PLD_DATA_SIZE (4 * 64) /* bytes. flt #4 to #7 */ 123 124 #define KEY_CONTEXT_HDR_SALT_AND_PAD 16 125 #define flits_to_bytes(x) (x * 8) 126 127 #define IV_NOP 0 128 #define IV_IMMEDIATE 1 129 #define IV_DSGL 2 130 131 #define AEAD_H_SIZE 16 132 133 #define CRYPTO_ALG_SUB_TYPE_MASK 0x0f000000 134 #define CRYPTO_ALG_SUB_TYPE_HASH_HMAC 0x01000000 135 #define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106 0x02000000 136 #define CRYPTO_ALG_SUB_TYPE_AEAD_GCM 0x03000000 137 #define CRYPTO_ALG_SUB_TYPE_AEAD_AUTHENC 0x04000000 138 #define CRYPTO_ALG_SUB_TYPE_AEAD_CCM 0x05000000 139 #define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309 0x06000000 140 #define CRYPTO_ALG_SUB_TYPE_AEAD_NULL 0x07000000 141 #define CRYPTO_ALG_SUB_TYPE_CTR 0x08000000 142 #define CRYPTO_ALG_SUB_TYPE_CTR_RFC3686 0x09000000 143 #define CRYPTO_ALG_SUB_TYPE_XTS 0x0a000000 144 #define CRYPTO_ALG_SUB_TYPE_CBC 0x0b000000 145 #define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH |\ 146 CRYPTO_ALG_SUB_TYPE_HASH_HMAC) 147 148 #define MAX_SCRATCH_PAD_SIZE 32 149 150 #define CHCR_HASH_MAX_BLOCK_SIZE_64 64 151 #define CHCR_HASH_MAX_BLOCK_SIZE_128 128 152 #define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int)) 153 #define CHCR_DST_SG_SIZE 2048 154 155 static inline struct chcr_context *a_ctx(struct crypto_aead *tfm) 156 { 157 return crypto_aead_ctx(tfm); 158 } 159 160 static inline struct chcr_context *c_ctx(struct crypto_ablkcipher *tfm) 161 { 162 return crypto_ablkcipher_ctx(tfm); 163 } 164 165 static inline struct chcr_context *h_ctx(struct crypto_ahash *tfm) 166 { 167 return crypto_tfm_ctx(crypto_ahash_tfm(tfm)); 168 } 169 170 struct ablk_ctx { 171 struct crypto_skcipher *sw_cipher; 172 struct crypto_cipher *aes_generic; 173 __be32 key_ctx_hdr; 174 unsigned int enckey_len; 175 unsigned char ciph_mode; 176 u8 key[CHCR_AES_MAX_KEY_LEN]; 177 u8 nonce[4]; 178 u8 rrkey[AES_MAX_KEY_SIZE]; 179 }; 180 struct chcr_aead_reqctx { 181 struct sk_buff *skb; 182 dma_addr_t iv_dma; 183 dma_addr_t b0_dma; 184 unsigned int b0_len; 185 unsigned int op; 186 short int aad_nents; 187 short int src_nents; 188 short int dst_nents; 189 u16 imm; 190 u16 verify; 191 u8 iv[CHCR_MAX_CRYPTO_IV_LEN]; 192 unsigned char scratch_pad[MAX_SCRATCH_PAD_SIZE]; 193 }; 194 195 struct ulptx_walk { 196 struct ulptx_sgl *sgl; 197 unsigned int nents; 198 unsigned int pair_idx; 199 unsigned int last_sg_len; 200 struct scatterlist *last_sg; 201 struct ulptx_sge_pair *pair; 202 203 }; 204 205 struct dsgl_walk { 206 unsigned int nents; 207 unsigned int last_sg_len; 208 struct scatterlist *last_sg; 209 struct cpl_rx_phys_dsgl *dsgl; 210 struct phys_sge_pairs *to; 211 }; 212 213 214 215 struct chcr_gcm_ctx { 216 u8 ghash_h[AEAD_H_SIZE]; 217 }; 218 219 struct chcr_authenc_ctx { 220 u8 dec_rrkey[AES_MAX_KEY_SIZE]; 221 u8 h_iopad[2 * CHCR_HASH_MAX_DIGEST_SIZE]; 222 unsigned char auth_mode; 223 }; 224 225 struct __aead_ctx { 226 struct chcr_gcm_ctx gcm[0]; 227 struct chcr_authenc_ctx authenc[0]; 228 }; 229 230 231 232 struct chcr_aead_ctx { 233 __be32 key_ctx_hdr; 234 unsigned int enckey_len; 235 struct crypto_aead *sw_cipher; 236 u8 salt[MAX_SALT]; 237 u8 key[CHCR_AES_MAX_KEY_LEN]; 238 u16 hmac_ctrl; 239 u16 mayverify; 240 struct __aead_ctx ctx[0]; 241 }; 242 243 244 245 struct hmac_ctx { 246 struct crypto_shash *base_hash; 247 u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128]; 248 u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128]; 249 }; 250 251 struct __crypto_ctx { 252 struct hmac_ctx hmacctx[0]; 253 struct ablk_ctx ablkctx[0]; 254 struct chcr_aead_ctx aeadctx[0]; 255 }; 256 257 struct chcr_context { 258 struct chcr_dev *dev; 259 unsigned char tx_qidx; 260 unsigned char rx_qidx; 261 struct __crypto_ctx crypto_ctx[0]; 262 }; 263 264 struct chcr_ahash_req_ctx { 265 u32 result; 266 u8 bfr1[CHCR_HASH_MAX_BLOCK_SIZE_128]; 267 u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128]; 268 u8 *reqbfr; 269 u8 *skbfr; 270 dma_addr_t dma_addr; 271 u32 dma_len; 272 u8 reqlen; 273 u8 imm; 274 u8 is_sg_map; 275 u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE]; 276 u64 data_len; /* Data len till time */ 277 /* SKB which is being sent to the hardware for processing */ 278 struct sk_buff *skb; 279 }; 280 281 struct chcr_blkcipher_req_ctx { 282 struct sk_buff *skb; 283 struct scatterlist *dstsg; 284 unsigned int processed; 285 unsigned int last_req_len; 286 struct scatterlist *srcsg; 287 unsigned int src_ofst; 288 unsigned int dst_ofst; 289 unsigned int op; 290 dma_addr_t iv_dma; 291 u16 imm; 292 u8 iv[CHCR_MAX_CRYPTO_IV_LEN]; 293 }; 294 295 struct chcr_alg_template { 296 u32 type; 297 u32 is_registered; 298 union { 299 struct crypto_alg crypto; 300 struct ahash_alg hash; 301 struct aead_alg aead; 302 } alg; 303 }; 304 305 typedef struct sk_buff *(*create_wr_t)(struct aead_request *req, 306 unsigned short qid, 307 int size, 308 unsigned short op_type); 309 310 static int chcr_aead_op(struct aead_request *req_base, 311 unsigned short op_type, 312 int size, 313 create_wr_t create_wr_fn); 314 static inline int get_aead_subtype(struct crypto_aead *aead); 315 static int chcr_handle_cipher_resp(struct ablkcipher_request *req, 316 unsigned char *input, int err); 317 static void chcr_verify_tag(struct aead_request *req, u8 *input, int *err); 318 static int chcr_aead_dma_map(struct device *dev, struct aead_request *req, 319 unsigned short op_type); 320 static void chcr_aead_dma_unmap(struct device *dev, struct aead_request 321 *req, unsigned short op_type); 322 static inline void chcr_add_aead_dst_ent(struct aead_request *req, 323 struct cpl_rx_phys_dsgl *phys_cpl, 324 unsigned int assoclen, 325 unsigned short op_type, 326 unsigned short qid); 327 static inline void chcr_add_aead_src_ent(struct aead_request *req, 328 struct ulptx_sgl *ulptx, 329 unsigned int assoclen, 330 unsigned short op_type); 331 static inline void chcr_add_cipher_src_ent(struct ablkcipher_request *req, 332 struct ulptx_sgl *ulptx, 333 struct cipher_wr_param *wrparam); 334 static int chcr_cipher_dma_map(struct device *dev, 335 struct ablkcipher_request *req); 336 static void chcr_cipher_dma_unmap(struct device *dev, 337 struct ablkcipher_request *req); 338 static inline void chcr_add_cipher_dst_ent(struct ablkcipher_request *req, 339 struct cpl_rx_phys_dsgl *phys_cpl, 340 struct cipher_wr_param *wrparam, 341 unsigned short qid); 342 int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip); 343 static inline void chcr_add_hash_src_ent(struct ahash_request *req, 344 struct ulptx_sgl *ulptx, 345 struct hash_wr_param *param); 346 static inline int chcr_hash_dma_map(struct device *dev, 347 struct ahash_request *req); 348 static inline void chcr_hash_dma_unmap(struct device *dev, 349 struct ahash_request *req); 350 #endif /* __CHCR_CRYPTO_H__ */ 351