14c3f9727SGilad Ben-Yossef /* SPDX-License-Identifier: GPL-2.0 */ 203963caeSGilad Ben-Yossef /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */ 34c3f9727SGilad Ben-Yossef 44c3f9727SGilad Ben-Yossef #ifndef __CC_SRAM_MGR_H__ 54c3f9727SGilad Ben-Yossef #define __CC_SRAM_MGR_H__ 64c3f9727SGilad Ben-Yossef 74c3f9727SGilad Ben-Yossef #ifndef CC_CC_SRAM_SIZE 84c3f9727SGilad Ben-Yossef #define CC_CC_SRAM_SIZE 4096 94c3f9727SGilad Ben-Yossef #endif 104c3f9727SGilad Ben-Yossef 114c3f9727SGilad Ben-Yossef struct cc_drvdata; 124c3f9727SGilad Ben-Yossef 131a895f1dSGeert Uytterhoeven #define NULL_SRAM_ADDR ((u32)-1) 144c3f9727SGilad Ben-Yossef 15*31568ab8SGeert Uytterhoeven /** 16*31568ab8SGeert Uytterhoeven * cc_sram_mgr_init() - Initializes SRAM pool. 174c3f9727SGilad Ben-Yossef * The first X bytes of SRAM are reserved for ROM usage, hence, pool 184c3f9727SGilad Ben-Yossef * starts right after X bytes. 194c3f9727SGilad Ben-Yossef * 20*31568ab8SGeert Uytterhoeven * @drvdata: Associated device driver context 214c3f9727SGilad Ben-Yossef * 22*31568ab8SGeert Uytterhoeven * Return: 23*31568ab8SGeert Uytterhoeven * Zero for success, negative value otherwise. 244c3f9727SGilad Ben-Yossef */ 254c3f9727SGilad Ben-Yossef int cc_sram_mgr_init(struct cc_drvdata *drvdata); 264c3f9727SGilad Ben-Yossef 27*31568ab8SGeert Uytterhoeven /** 28*31568ab8SGeert Uytterhoeven * cc_sram_alloc() - Allocate buffer from SRAM pool. 294c3f9727SGilad Ben-Yossef * 30*31568ab8SGeert Uytterhoeven * @drvdata: Associated device driver context 31*31568ab8SGeert Uytterhoeven * @size: The requested bytes to allocate 32*31568ab8SGeert Uytterhoeven * 33*31568ab8SGeert Uytterhoeven * Return: 34*31568ab8SGeert Uytterhoeven * Address offset in SRAM or NULL_SRAM_ADDR for failure. 354c3f9727SGilad Ben-Yossef */ 361a895f1dSGeert Uytterhoeven u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size); 374c3f9727SGilad Ben-Yossef 384c3f9727SGilad Ben-Yossef /** 394c3f9727SGilad Ben-Yossef * cc_set_sram_desc() - Create const descriptors sequence to 404c3f9727SGilad Ben-Yossef * set values in given array into SRAM. 414c3f9727SGilad Ben-Yossef * Note: each const value can't exceed word size. 424c3f9727SGilad Ben-Yossef * 434c3f9727SGilad Ben-Yossef * @src: A pointer to array of words to set as consts. 444c3f9727SGilad Ben-Yossef * @dst: The target SRAM buffer to set into 45*31568ab8SGeert Uytterhoeven * @nelement: The number of words in "src" array 464c3f9727SGilad Ben-Yossef * @seq: A pointer to the given IN/OUT descriptor sequence 474c3f9727SGilad Ben-Yossef * @seq_len: A pointer to the given IN/OUT sequence length 484c3f9727SGilad Ben-Yossef */ 491a895f1dSGeert Uytterhoeven void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement, 501a895f1dSGeert Uytterhoeven struct cc_hw_desc *seq, unsigned int *seq_len); 514c3f9727SGilad Ben-Yossef 524c3f9727SGilad Ben-Yossef #endif /*__CC_SRAM_MGR_H__*/ 53