1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AMD Secure Processor device driver 4 * 5 * Copyright (C) 2013,2019 Advanced Micro Devices, Inc. 6 * 7 * Author: Tom Lendacky <thomas.lendacky@amd.com> 8 * Author: Gary R Hook <gary.hook@amd.com> 9 */ 10 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/device.h> 14 #include <linux/pci.h> 15 #include <linux/pci_ids.h> 16 #include <linux/dma-mapping.h> 17 #include <linux/kthread.h> 18 #include <linux/sched.h> 19 #include <linux/interrupt.h> 20 #include <linux/spinlock.h> 21 #include <linux/delay.h> 22 #include <linux/ccp.h> 23 24 #include "ccp-dev.h" 25 #include "psp-dev.h" 26 27 #define MSIX_VECTORS 2 28 29 struct sp_pci { 30 int msix_count; 31 struct msix_entry msix_entry[MSIX_VECTORS]; 32 }; 33 static struct sp_device *sp_dev_master; 34 35 static int sp_get_msix_irqs(struct sp_device *sp) 36 { 37 struct sp_pci *sp_pci = sp->dev_specific; 38 struct device *dev = sp->dev; 39 struct pci_dev *pdev = to_pci_dev(dev); 40 int v, ret; 41 42 for (v = 0; v < ARRAY_SIZE(sp_pci->msix_entry); v++) 43 sp_pci->msix_entry[v].entry = v; 44 45 ret = pci_enable_msix_range(pdev, sp_pci->msix_entry, 1, v); 46 if (ret < 0) 47 return ret; 48 49 sp_pci->msix_count = ret; 50 sp->use_tasklet = true; 51 52 sp->psp_irq = sp_pci->msix_entry[0].vector; 53 sp->ccp_irq = (sp_pci->msix_count > 1) ? sp_pci->msix_entry[1].vector 54 : sp_pci->msix_entry[0].vector; 55 return 0; 56 } 57 58 static int sp_get_msi_irq(struct sp_device *sp) 59 { 60 struct device *dev = sp->dev; 61 struct pci_dev *pdev = to_pci_dev(dev); 62 int ret; 63 64 ret = pci_enable_msi(pdev); 65 if (ret) 66 return ret; 67 68 sp->ccp_irq = pdev->irq; 69 sp->psp_irq = pdev->irq; 70 71 return 0; 72 } 73 74 static int sp_get_irqs(struct sp_device *sp) 75 { 76 struct device *dev = sp->dev; 77 int ret; 78 79 ret = sp_get_msix_irqs(sp); 80 if (!ret) 81 return 0; 82 83 /* Couldn't get MSI-X vectors, try MSI */ 84 dev_notice(dev, "could not enable MSI-X (%d), trying MSI\n", ret); 85 ret = sp_get_msi_irq(sp); 86 if (!ret) 87 return 0; 88 89 /* Couldn't get MSI interrupt */ 90 dev_notice(dev, "could not enable MSI (%d)\n", ret); 91 92 return ret; 93 } 94 95 static void sp_free_irqs(struct sp_device *sp) 96 { 97 struct sp_pci *sp_pci = sp->dev_specific; 98 struct device *dev = sp->dev; 99 struct pci_dev *pdev = to_pci_dev(dev); 100 101 if (sp_pci->msix_count) 102 pci_disable_msix(pdev); 103 else if (sp->psp_irq) 104 pci_disable_msi(pdev); 105 106 sp->ccp_irq = 0; 107 sp->psp_irq = 0; 108 } 109 110 static bool sp_pci_is_master(struct sp_device *sp) 111 { 112 struct device *dev_cur, *dev_new; 113 struct pci_dev *pdev_cur, *pdev_new; 114 115 dev_new = sp->dev; 116 dev_cur = sp_dev_master->dev; 117 118 pdev_new = to_pci_dev(dev_new); 119 pdev_cur = to_pci_dev(dev_cur); 120 121 if (pdev_new->bus->number < pdev_cur->bus->number) 122 return true; 123 124 if (PCI_SLOT(pdev_new->devfn) < PCI_SLOT(pdev_cur->devfn)) 125 return true; 126 127 if (PCI_FUNC(pdev_new->devfn) < PCI_FUNC(pdev_cur->devfn)) 128 return true; 129 130 return false; 131 } 132 133 static void psp_set_master(struct sp_device *sp) 134 { 135 if (!sp_dev_master) { 136 sp_dev_master = sp; 137 return; 138 } 139 140 if (sp_pci_is_master(sp)) 141 sp_dev_master = sp; 142 } 143 144 static struct sp_device *psp_get_master(void) 145 { 146 return sp_dev_master; 147 } 148 149 static void psp_clear_master(struct sp_device *sp) 150 { 151 if (sp == sp_dev_master) { 152 sp_dev_master = NULL; 153 dev_dbg(sp->dev, "Cleared sp_dev_master\n"); 154 } 155 } 156 157 static int sp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 158 { 159 struct sp_device *sp; 160 struct sp_pci *sp_pci; 161 struct device *dev = &pdev->dev; 162 void __iomem * const *iomap_table; 163 int bar_mask; 164 int ret; 165 166 ret = -ENOMEM; 167 sp = sp_alloc_struct(dev); 168 if (!sp) 169 goto e_err; 170 171 sp_pci = devm_kzalloc(dev, sizeof(*sp_pci), GFP_KERNEL); 172 if (!sp_pci) 173 goto e_err; 174 175 sp->dev_specific = sp_pci; 176 sp->dev_vdata = (struct sp_dev_vdata *)id->driver_data; 177 if (!sp->dev_vdata) { 178 ret = -ENODEV; 179 dev_err(dev, "missing driver data\n"); 180 goto e_err; 181 } 182 183 ret = pcim_enable_device(pdev); 184 if (ret) { 185 dev_err(dev, "pcim_enable_device failed (%d)\n", ret); 186 goto e_err; 187 } 188 189 bar_mask = pci_select_bars(pdev, IORESOURCE_MEM); 190 ret = pcim_iomap_regions(pdev, bar_mask, "ccp"); 191 if (ret) { 192 dev_err(dev, "pcim_iomap_regions failed (%d)\n", ret); 193 goto e_err; 194 } 195 196 iomap_table = pcim_iomap_table(pdev); 197 if (!iomap_table) { 198 dev_err(dev, "pcim_iomap_table failed\n"); 199 ret = -ENOMEM; 200 goto e_err; 201 } 202 203 sp->io_map = iomap_table[sp->dev_vdata->bar]; 204 if (!sp->io_map) { 205 dev_err(dev, "ioremap failed\n"); 206 ret = -ENOMEM; 207 goto e_err; 208 } 209 210 ret = sp_get_irqs(sp); 211 if (ret) 212 goto e_err; 213 214 pci_set_master(pdev); 215 sp->set_psp_master_device = psp_set_master; 216 sp->get_psp_master_device = psp_get_master; 217 sp->clear_psp_master_device = psp_clear_master; 218 219 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48)); 220 if (ret) { 221 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); 222 if (ret) { 223 dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n", 224 ret); 225 goto e_err; 226 } 227 } 228 229 dev_set_drvdata(dev, sp); 230 231 ret = sp_init(sp); 232 if (ret) 233 goto e_err; 234 235 return 0; 236 237 e_err: 238 dev_notice(dev, "initialization failed\n"); 239 return ret; 240 } 241 242 static void sp_pci_remove(struct pci_dev *pdev) 243 { 244 struct device *dev = &pdev->dev; 245 struct sp_device *sp = dev_get_drvdata(dev); 246 247 if (!sp) 248 return; 249 250 sp_destroy(sp); 251 252 sp_free_irqs(sp); 253 } 254 255 static int __maybe_unused sp_pci_suspend(struct device *dev) 256 { 257 struct sp_device *sp = dev_get_drvdata(dev); 258 259 return sp_suspend(sp); 260 } 261 262 static int __maybe_unused sp_pci_resume(struct device *dev) 263 { 264 struct sp_device *sp = dev_get_drvdata(dev); 265 266 return sp_resume(sp); 267 } 268 269 #ifdef CONFIG_CRYPTO_DEV_SP_PSP 270 static const struct sev_vdata sevv1 = { 271 .cmdresp_reg = 0x10580, 272 .cmdbuff_addr_lo_reg = 0x105e0, 273 .cmdbuff_addr_hi_reg = 0x105e4, 274 }; 275 276 static const struct sev_vdata sevv2 = { 277 .cmdresp_reg = 0x10980, 278 .cmdbuff_addr_lo_reg = 0x109e0, 279 .cmdbuff_addr_hi_reg = 0x109e4, 280 }; 281 282 static const struct tee_vdata teev1 = { 283 .cmdresp_reg = 0x10544, 284 .cmdbuff_addr_lo_reg = 0x10548, 285 .cmdbuff_addr_hi_reg = 0x1054c, 286 .ring_wptr_reg = 0x10550, 287 .ring_rptr_reg = 0x10554, 288 }; 289 290 static const struct psp_vdata pspv1 = { 291 .sev = &sevv1, 292 .feature_reg = 0x105fc, 293 .inten_reg = 0x10610, 294 .intsts_reg = 0x10614, 295 }; 296 297 static const struct psp_vdata pspv2 = { 298 .sev = &sevv2, 299 .feature_reg = 0x109fc, 300 .inten_reg = 0x10690, 301 .intsts_reg = 0x10694, 302 }; 303 304 static const struct psp_vdata pspv3 = { 305 .tee = &teev1, 306 .feature_reg = 0x109fc, 307 .inten_reg = 0x10690, 308 .intsts_reg = 0x10694, 309 }; 310 #endif 311 312 static const struct sp_dev_vdata dev_vdata[] = { 313 { /* 0 */ 314 .bar = 2, 315 #ifdef CONFIG_CRYPTO_DEV_SP_CCP 316 .ccp_vdata = &ccpv3, 317 #endif 318 }, 319 { /* 1 */ 320 .bar = 2, 321 #ifdef CONFIG_CRYPTO_DEV_SP_CCP 322 .ccp_vdata = &ccpv5a, 323 #endif 324 #ifdef CONFIG_CRYPTO_DEV_SP_PSP 325 .psp_vdata = &pspv1, 326 #endif 327 }, 328 { /* 2 */ 329 .bar = 2, 330 #ifdef CONFIG_CRYPTO_DEV_SP_CCP 331 .ccp_vdata = &ccpv5b, 332 #endif 333 }, 334 { /* 3 */ 335 .bar = 2, 336 #ifdef CONFIG_CRYPTO_DEV_SP_CCP 337 .ccp_vdata = &ccpv5a, 338 #endif 339 #ifdef CONFIG_CRYPTO_DEV_SP_PSP 340 .psp_vdata = &pspv2, 341 #endif 342 }, 343 { /* 4 */ 344 .bar = 2, 345 #ifdef CONFIG_CRYPTO_DEV_SP_CCP 346 .ccp_vdata = &ccpv5a, 347 #endif 348 #ifdef CONFIG_CRYPTO_DEV_SP_PSP 349 .psp_vdata = &pspv3, 350 #endif 351 }, 352 }; 353 static const struct pci_device_id sp_pci_table[] = { 354 { PCI_VDEVICE(AMD, 0x1537), (kernel_ulong_t)&dev_vdata[0] }, 355 { PCI_VDEVICE(AMD, 0x1456), (kernel_ulong_t)&dev_vdata[1] }, 356 { PCI_VDEVICE(AMD, 0x1468), (kernel_ulong_t)&dev_vdata[2] }, 357 { PCI_VDEVICE(AMD, 0x1486), (kernel_ulong_t)&dev_vdata[3] }, 358 { PCI_VDEVICE(AMD, 0x15DF), (kernel_ulong_t)&dev_vdata[4] }, 359 { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[4] }, 360 /* Last entry must be zero */ 361 { 0, } 362 }; 363 MODULE_DEVICE_TABLE(pci, sp_pci_table); 364 365 static SIMPLE_DEV_PM_OPS(sp_pci_pm_ops, sp_pci_suspend, sp_pci_resume); 366 367 static struct pci_driver sp_pci_driver = { 368 .name = "ccp", 369 .id_table = sp_pci_table, 370 .probe = sp_pci_probe, 371 .remove = sp_pci_remove, 372 .driver.pm = &sp_pci_pm_ops, 373 }; 374 375 int sp_pci_init(void) 376 { 377 return pci_register_driver(&sp_pci_driver); 378 } 379 380 void sp_pci_exit(void) 381 { 382 pci_unregister_driver(&sp_pci_driver); 383 } 384