1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * AMD Platform Security Processor (PSP) interface driver 4 * 5 * Copyright (C) 2017-2019 Advanced Micro Devices, Inc. 6 * 7 * Author: Brijesh Singh <brijesh.singh@amd.com> 8 */ 9 10 #ifndef __PSP_DEV_H__ 11 #define __PSP_DEV_H__ 12 13 #include <linux/device.h> 14 #include <linux/list.h> 15 #include <linux/bits.h> 16 #include <linux/interrupt.h> 17 18 #include "sp-dev.h" 19 20 #define PSP_CMDRESP_RESP BIT(31) 21 #define PSP_CMDRESP_ERR_MASK 0xffff 22 23 #define MAX_PSP_NAME_LEN 16 24 25 extern struct psp_device *psp_master; 26 27 typedef void (*psp_irq_handler_t)(int, void *, unsigned int); 28 29 struct psp_device { 30 struct list_head entry; 31 32 struct psp_vdata *vdata; 33 char name[MAX_PSP_NAME_LEN]; 34 35 struct device *dev; 36 struct sp_device *sp; 37 38 void __iomem *io_regs; 39 40 psp_irq_handler_t sev_irq_handler; 41 void *sev_irq_data; 42 43 void *sev_data; 44 void *tee_data; 45 46 unsigned int capability; 47 }; 48 49 void psp_set_sev_irq_handler(struct psp_device *psp, psp_irq_handler_t handler, 50 void *data); 51 void psp_clear_sev_irq_handler(struct psp_device *psp); 52 53 struct psp_device *psp_get_master_device(void); 54 55 #define PSP_CAPABILITY_SEV BIT(0) 56 #define PSP_CAPABILITY_TEE BIT(1) 57 #define PSP_CAPABILITY_PSP_SECURITY_REPORTING BIT(7) 58 59 #define PSP_CAPABILITY_PSP_SECURITY_OFFSET 8 60 /* 61 * The PSP doesn't directly store these bits in the capability register 62 * but instead copies them from the results of query command. 63 * 64 * The offsets from the query command are below, and shifted when used. 65 */ 66 #define PSP_SECURITY_FUSED_PART BIT(0) 67 #define PSP_SECURITY_DEBUG_LOCK_ON BIT(2) 68 #define PSP_SECURITY_TSME_STATUS BIT(5) 69 #define PSP_SECURITY_ANTI_ROLLBACK_STATUS BIT(7) 70 #define PSP_SECURITY_RPMC_PRODUCTION_ENABLED BIT(8) 71 #define PSP_SECURITY_RPMC_SPIROM_AVAILABLE BIT(9) 72 #define PSP_SECURITY_HSP_TPM_AVAILABLE BIT(10) 73 #define PSP_SECURITY_ROM_ARMOR_ENFORCED BIT(11) 74 75 #endif /* __PSP_DEV_H */ 76