1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * CAAM Error Reporting 4 * 5 * Copyright 2009-2011 Freescale Semiconductor, Inc. 6 */ 7 8 #include "compat.h" 9 #include "regs.h" 10 #include "desc.h" 11 #include "error.h" 12 13 #ifdef DEBUG 14 #include <linux/highmem.h> 15 16 void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type, 17 int rowsize, int groupsize, struct scatterlist *sg, 18 size_t tlen, bool ascii) 19 { 20 struct scatterlist *it; 21 void *it_page; 22 size_t len; 23 void *buf; 24 25 for (it = sg; it && tlen > 0 ; it = sg_next(sg)) { 26 /* 27 * make sure the scatterlist's page 28 * has a valid virtual memory mapping 29 */ 30 it_page = kmap_atomic(sg_page(it)); 31 if (unlikely(!it_page)) { 32 pr_err("caam_dump_sg: kmap failed\n"); 33 return; 34 } 35 36 buf = it_page + it->offset; 37 len = min_t(size_t, tlen, it->length); 38 print_hex_dump(level, prefix_str, prefix_type, rowsize, 39 groupsize, buf, len, ascii); 40 tlen -= len; 41 42 kunmap_atomic(it_page); 43 } 44 } 45 #else 46 void caam_dump_sg(const char *level, const char *prefix_str, int prefix_type, 47 int rowsize, int groupsize, struct scatterlist *sg, 48 size_t tlen, bool ascii) 49 {} 50 #endif /* DEBUG */ 51 EXPORT_SYMBOL(caam_dump_sg); 52 53 static const struct { 54 u8 value; 55 const char *error_text; 56 } desc_error_list[] = { 57 { 0x00, "No error." }, 58 { 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." }, 59 { 0x02, "SGT Null Entry Error." }, 60 { 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." }, 61 { 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." }, 62 { 0x05, "Reserved." }, 63 { 0x06, "Invalid KEY Command" }, 64 { 0x07, "Invalid LOAD Command" }, 65 { 0x08, "Invalid STORE Command" }, 66 { 0x09, "Invalid OPERATION Command" }, 67 { 0x0A, "Invalid FIFO LOAD Command" }, 68 { 0x0B, "Invalid FIFO STORE Command" }, 69 { 0x0C, "Invalid MOVE/MOVE_LEN Command" }, 70 { 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." }, 71 { 0x0E, "Invalid MATH Command" }, 72 { 0x0F, "Invalid SIGNATURE Command" }, 73 { 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." }, 74 { 0x11, "Skip data type invalid. The type must be 0xE or 0xF."}, 75 { 0x12, "Shared Descriptor Header Error" }, 76 { 0x13, "Header Error. Invalid length or parity, or certain other problems." }, 77 { 0x14, "Burster Error. Burster has gotten to an illegal state" }, 78 { 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." }, 79 { 0x16, "DMA Error" }, 80 { 0x17, "Reserved." }, 81 { 0x1A, "Job failed due to JR reset" }, 82 { 0x1B, "Job failed due to Fail Mode" }, 83 { 0x1C, "DECO Watchdog timer timeout error" }, 84 { 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" }, 85 { 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" }, 86 { 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." }, 87 { 0x20, "DECO has completed a reset initiated via the DRR register" }, 88 { 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." }, 89 { 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." }, 90 { 0x23, "Read Input Frame error" }, 91 { 0x24, "JDKEK, TDKEK or TDSK not loaded error" }, 92 { 0x80, "DNR (do not run) error" }, 93 { 0x81, "undefined protocol command" }, 94 { 0x82, "invalid setting in PDB" }, 95 { 0x83, "Anti-replay LATE error" }, 96 { 0x84, "Anti-replay REPLAY error" }, 97 { 0x85, "Sequence number overflow" }, 98 { 0x86, "Sigver invalid signature" }, 99 { 0x87, "DSA Sign Illegal test descriptor" }, 100 { 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." }, 101 { 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." }, 102 { 0xC1, "Blob Command error: Undefined mode" }, 103 { 0xC2, "Blob Command error: Secure Memory Blob mode error" }, 104 { 0xC4, "Blob Command error: Black Blob key or input size error" }, 105 { 0xC5, "Blob Command error: Invalid key destination" }, 106 { 0xC8, "Blob Command error: Trusted/Secure mode error" }, 107 { 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" }, 108 { 0xF1, "3GPP HFN matches or exceeds the Threshold" }, 109 }; 110 111 static const struct { 112 u8 value; 113 const char *error_text; 114 } qi_error_list[] = { 115 { 0x1F, "Job terminated by FQ or ICID flush" }, 116 { 0x20, "FD format error"}, 117 { 0x21, "FD command format error"}, 118 { 0x23, "FL format error"}, 119 { 0x25, "CRJD specified in FD, but not enabled in FLC"}, 120 { 0x30, "Max. buffer size too small"}, 121 { 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"}, 122 { 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"}, 123 { 0x33, "Size over/underflow (allocate mode)"}, 124 { 0x34, "Size over/underflow (reuse mode)"}, 125 { 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"}, 126 { 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"}, 127 { 0x41, "SBC frame format not supported (allocate mode)"}, 128 { 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"}, 129 { 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"}, 130 { 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"}, 131 { 0x45, "DHR correction underflow (reuse mode, single buffer format)"}, 132 { 0x46, "Annotation length exceeds offset (reuse mode)"}, 133 { 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"}, 134 { 0x49, "Data offset correction exceeds input frame data length (reuse mode)"}, 135 { 0x4B, "Annotation output enabled but ASA cannote be expanded (frame list)"}, 136 { 0x51, "Unsupported IF reuse mode"}, 137 { 0x52, "Unsupported FL use mode"}, 138 { 0x53, "Unsupported RJD use mode"}, 139 { 0x54, "Unsupported inline descriptor use mode"}, 140 { 0xC0, "Table buffer pool 0 depletion"}, 141 { 0xC1, "Table buffer pool 1 depletion"}, 142 { 0xC2, "Data buffer pool 0 depletion, no OF allocated"}, 143 { 0xC3, "Data buffer pool 1 depletion, no OF allocated"}, 144 { 0xC4, "Data buffer pool 0 depletion, partial OF allocated"}, 145 { 0xC5, "Data buffer pool 1 depletion, partial OF allocated"}, 146 { 0xD0, "FLC read error"}, 147 { 0xD1, "FL read error"}, 148 { 0xD2, "FL write error"}, 149 { 0xD3, "OF SGT write error"}, 150 { 0xD4, "PTA read error"}, 151 { 0xD5, "PTA write error"}, 152 { 0xD6, "OF SGT F-bit write error"}, 153 { 0xD7, "ASA write error"}, 154 { 0xE1, "FLC[ICR]=0 ICID error"}, 155 { 0xE2, "FLC[ICR]=1 ICID error"}, 156 { 0xE4, "source of ICID flush not trusted (BDI = 0)"}, 157 }; 158 159 static const char * const cha_id_list[] = { 160 "", 161 "AES", 162 "DES", 163 "ARC4", 164 "MDHA", 165 "RNG", 166 "SNOW f8", 167 "Kasumi f8/9", 168 "PKHA", 169 "CRCA", 170 "SNOW f9", 171 "ZUCE", 172 "ZUCA", 173 }; 174 175 static const char * const err_id_list[] = { 176 "No error.", 177 "Mode error.", 178 "Data size error.", 179 "Key size error.", 180 "PKHA A memory size error.", 181 "PKHA B memory size error.", 182 "Data arrived out of sequence error.", 183 "PKHA divide-by-zero error.", 184 "PKHA modulus even error.", 185 "DES key parity error.", 186 "ICV check failed.", 187 "Hardware error.", 188 "Unsupported CCM AAD size.", 189 "Class 1 CHA is not reset", 190 "Invalid CHA combination was selected", 191 "Invalid CHA selected.", 192 }; 193 194 static const char * const rng_err_id_list[] = { 195 "", 196 "", 197 "", 198 "Instantiate", 199 "Not instantiated", 200 "Test instantiate", 201 "Prediction resistance", 202 "Prediction resistance and test request", 203 "Uninstantiate", 204 "Secure key generation", 205 }; 206 207 static void report_ccb_status(struct device *jrdev, const u32 status, 208 const char *error) 209 { 210 u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >> 211 JRSTA_CCBERR_CHAID_SHIFT; 212 u8 err_id = status & JRSTA_CCBERR_ERRID_MASK; 213 u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >> 214 JRSTA_DECOERR_INDEX_SHIFT; 215 char *idx_str; 216 const char *cha_str = "unidentified cha_id value 0x"; 217 char cha_err_code[3] = { 0 }; 218 const char *err_str = "unidentified err_id value 0x"; 219 char err_err_code[3] = { 0 }; 220 221 if (status & JRSTA_DECOERR_JUMP) 222 idx_str = "jump tgt desc idx"; 223 else 224 idx_str = "desc idx"; 225 226 if (cha_id < ARRAY_SIZE(cha_id_list)) 227 cha_str = cha_id_list[cha_id]; 228 else 229 snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id); 230 231 if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG && 232 err_id < ARRAY_SIZE(rng_err_id_list) && 233 strlen(rng_err_id_list[err_id])) { 234 /* RNG-only error */ 235 err_str = rng_err_id_list[err_id]; 236 } else { 237 err_str = err_id_list[err_id]; 238 } 239 240 /* 241 * CCB ICV check failures are part of normal operation life; 242 * we leave the upper layers to do what they want with them. 243 */ 244 if (err_id != JRSTA_CCBERR_ERRID_ICVCHK) 245 dev_err(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n", 246 status, error, idx_str, idx, 247 cha_str, cha_err_code, 248 err_str, err_err_code); 249 } 250 251 static void report_jump_status(struct device *jrdev, const u32 status, 252 const char *error) 253 { 254 dev_err(jrdev, "%08x: %s: %s() not implemented\n", 255 status, error, __func__); 256 } 257 258 static void report_deco_status(struct device *jrdev, const u32 status, 259 const char *error) 260 { 261 u8 err_id = status & JRSTA_DECOERR_ERROR_MASK; 262 u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >> 263 JRSTA_DECOERR_INDEX_SHIFT; 264 char *idx_str; 265 const char *err_str = "unidentified error value 0x"; 266 char err_err_code[3] = { 0 }; 267 int i; 268 269 if (status & JRSTA_DECOERR_JUMP) 270 idx_str = "jump tgt desc idx"; 271 else 272 idx_str = "desc idx"; 273 274 for (i = 0; i < ARRAY_SIZE(desc_error_list); i++) 275 if (desc_error_list[i].value == err_id) 276 break; 277 278 if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text) 279 err_str = desc_error_list[i].error_text; 280 else 281 snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id); 282 283 dev_err(jrdev, "%08x: %s: %s %d: %s%s\n", 284 status, error, idx_str, idx, err_str, err_err_code); 285 } 286 287 static void report_qi_status(struct device *qidev, const u32 status, 288 const char *error) 289 { 290 u8 err_id = status & JRSTA_QIERR_ERROR_MASK; 291 const char *err_str = "unidentified error value 0x"; 292 char err_err_code[3] = { 0 }; 293 int i; 294 295 for (i = 0; i < ARRAY_SIZE(qi_error_list); i++) 296 if (qi_error_list[i].value == err_id) 297 break; 298 299 if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text) 300 err_str = qi_error_list[i].error_text; 301 else 302 snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id); 303 304 dev_err(qidev, "%08x: %s: %s%s\n", 305 status, error, err_str, err_err_code); 306 } 307 308 static void report_jr_status(struct device *jrdev, const u32 status, 309 const char *error) 310 { 311 dev_err(jrdev, "%08x: %s: %s() not implemented\n", 312 status, error, __func__); 313 } 314 315 static void report_cond_code_status(struct device *jrdev, const u32 status, 316 const char *error) 317 { 318 dev_err(jrdev, "%08x: %s: %s() not implemented\n", 319 status, error, __func__); 320 } 321 322 void caam_strstatus(struct device *jrdev, u32 status, bool qi_v2) 323 { 324 static const struct stat_src { 325 void (*report_ssed)(struct device *jrdev, const u32 status, 326 const char *error); 327 const char *error; 328 } status_src[16] = { 329 { NULL, "No error" }, 330 { NULL, NULL }, 331 { report_ccb_status, "CCB" }, 332 { report_jump_status, "Jump" }, 333 { report_deco_status, "DECO" }, 334 { report_qi_status, "Queue Manager Interface" }, 335 { report_jr_status, "Job Ring" }, 336 { report_cond_code_status, "Condition Code" }, 337 { NULL, NULL }, 338 { NULL, NULL }, 339 { NULL, NULL }, 340 { NULL, NULL }, 341 { NULL, NULL }, 342 { NULL, NULL }, 343 { NULL, NULL }, 344 { NULL, NULL }, 345 }; 346 u32 ssrc = status >> JRSTA_SSRC_SHIFT; 347 const char *error = status_src[ssrc].error; 348 349 /* 350 * If there is an error handling function, call it to report the error. 351 * Otherwise print the error source name. 352 */ 353 if (status_src[ssrc].report_ssed) 354 status_src[ssrc].report_ssed(jrdev, status, error); 355 else if (error) 356 dev_err(jrdev, "%d: %s\n", ssrc, error); 357 else 358 dev_err(jrdev, "%d: unknown error source\n", ssrc); 359 } 360 EXPORT_SYMBOL(caam_strstatus); 361 362 MODULE_LICENSE("GPL"); 363 MODULE_DESCRIPTION("FSL CAAM error reporting"); 364 MODULE_AUTHOR("Freescale Semiconductor"); 365