xref: /linux/drivers/crypto/caam/error.c (revision 0866ba23b7efcc6837d6b4231bf91b79647b81ea)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * CAAM Error Reporting
4  *
5  * Copyright 2009-2011 Freescale Semiconductor, Inc.
6  */
7 
8 #include "compat.h"
9 #include "regs.h"
10 #include "desc.h"
11 #include "error.h"
12 
13 #ifdef DEBUG
14 #include <linux/highmem.h>
15 
16 void caam_dump_sg(const char *prefix_str, int prefix_type,
17 		  int rowsize, int groupsize, struct scatterlist *sg,
18 		  size_t tlen, bool ascii)
19 {
20 	struct scatterlist *it;
21 	void *it_page;
22 	size_t len;
23 	void *buf;
24 
25 	for (it = sg; it && tlen > 0 ; it = sg_next(it)) {
26 		/*
27 		 * make sure the scatterlist's page
28 		 * has a valid virtual memory mapping
29 		 */
30 		it_page = kmap_atomic(sg_page(it));
31 		if (unlikely(!it_page)) {
32 			pr_err("caam_dump_sg: kmap failed\n");
33 			return;
34 		}
35 
36 		buf = it_page + it->offset;
37 		len = min_t(size_t, tlen, it->length);
38 		print_hex_dump_debug(prefix_str, prefix_type, rowsize,
39 				     groupsize, buf, len, ascii);
40 		tlen -= len;
41 
42 		kunmap_atomic(it_page);
43 	}
44 }
45 #else
46 void caam_dump_sg(const char *prefix_str, int prefix_type,
47 		  int rowsize, int groupsize, struct scatterlist *sg,
48 		  size_t tlen, bool ascii)
49 {}
50 #endif /* DEBUG */
51 EXPORT_SYMBOL(caam_dump_sg);
52 
53 bool caam_little_end;
54 EXPORT_SYMBOL(caam_little_end);
55 
56 bool caam_imx;
57 EXPORT_SYMBOL(caam_imx);
58 
59 static const struct {
60 	u8 value;
61 	const char *error_text;
62 } desc_error_list[] = {
63 	{ 0x00, "No error." },
64 	{ 0x01, "SGT Length Error. The descriptor is trying to read more data than is contained in the SGT table." },
65 	{ 0x02, "SGT Null Entry Error." },
66 	{ 0x03, "Job Ring Control Error. There is a bad value in the Job Ring Control register." },
67 	{ 0x04, "Invalid Descriptor Command. The Descriptor Command field is invalid." },
68 	{ 0x05, "Reserved." },
69 	{ 0x06, "Invalid KEY Command" },
70 	{ 0x07, "Invalid LOAD Command" },
71 	{ 0x08, "Invalid STORE Command" },
72 	{ 0x09, "Invalid OPERATION Command" },
73 	{ 0x0A, "Invalid FIFO LOAD Command" },
74 	{ 0x0B, "Invalid FIFO STORE Command" },
75 	{ 0x0C, "Invalid MOVE/MOVE_LEN Command" },
76 	{ 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is invalid because the target is not a Job Header Command, or the jump is from a Trusted Descriptor to a Job Descriptor, or because the target Descriptor contains a Shared Descriptor." },
77 	{ 0x0E, "Invalid MATH Command" },
78 	{ 0x0F, "Invalid SIGNATURE Command" },
79 	{ 0x10, "Invalid Sequence Command. A SEQ IN PTR OR SEQ OUT PTR Command is invalid or a SEQ KEY, SEQ LOAD, SEQ FIFO LOAD, or SEQ FIFO STORE decremented the input or output sequence length below 0. This error may result if a built-in PROTOCOL Command has encountered a malformed PDU." },
80 	{ 0x11, "Skip data type invalid. The type must be 0xE or 0xF."},
81 	{ 0x12, "Shared Descriptor Header Error" },
82 	{ 0x13, "Header Error. Invalid length or parity, or certain other problems." },
83 	{ 0x14, "Burster Error. Burster has gotten to an illegal state" },
84 	{ 0x15, "Context Register Length Error. The descriptor is trying to read or write past the end of the Context Register. A SEQ LOAD or SEQ STORE with the VLF bit set was executed with too large a length in the variable length register (VSOL for SEQ STORE or VSIL for SEQ LOAD)." },
85 	{ 0x16, "DMA Error" },
86 	{ 0x17, "Reserved." },
87 	{ 0x1A, "Job failed due to JR reset" },
88 	{ 0x1B, "Job failed due to Fail Mode" },
89 	{ 0x1C, "DECO Watchdog timer timeout error" },
90 	{ 0x1D, "DECO tried to copy a key from another DECO but the other DECO's Key Registers were locked" },
91 	{ 0x1E, "DECO attempted to copy data from a DECO that had an unmasked Descriptor error" },
92 	{ 0x1F, "LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the 'shared from' DECO's Descriptor required that the SEQ LIODNs be the same and they aren't." },
93 	{ 0x20, "DECO has completed a reset initiated via the DRR register" },
94 	{ 0x21, "Nonce error. When using EKT (CCM) key encryption option in the FIFO STORE Command, the Nonce counter reached its maximum value and this encryption mode can no longer be used." },
95 	{ 0x22, "Meta data is too large (> 511 bytes) for TLS decap (input frame; block ciphers) and IPsec decap (output frame, when doing the next header byte update) and DCRC (output frame)." },
96 	{ 0x23, "Read Input Frame error" },
97 	{ 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
98 	{ 0x80, "DNR (do not run) error" },
99 	{ 0x81, "undefined protocol command" },
100 	{ 0x82, "invalid setting in PDB" },
101 	{ 0x83, "Anti-replay LATE error" },
102 	{ 0x84, "Anti-replay REPLAY error" },
103 	{ 0x85, "Sequence number overflow" },
104 	{ 0x86, "Sigver invalid signature" },
105 	{ 0x87, "DSA Sign Illegal test descriptor" },
106 	{ 0x88, "Protocol Format Error - A protocol has seen an error in the format of data received. When running RSA, this means that formatting with random padding was used, and did not follow the form: 0x00, 0x02, 8-to-N bytes of non-zero pad, 0x00, F data." },
107 	{ 0x89, "Protocol Size Error - A protocol has seen an error in size. When running RSA, pdb size N < (size of F) when no formatting is used; or pdb size N < (F + 11) when formatting is used." },
108 	{ 0xC1, "Blob Command error: Undefined mode" },
109 	{ 0xC2, "Blob Command error: Secure Memory Blob mode error" },
110 	{ 0xC4, "Blob Command error: Black Blob key or input size error" },
111 	{ 0xC5, "Blob Command error: Invalid key destination" },
112 	{ 0xC8, "Blob Command error: Trusted/Secure mode error" },
113 	{ 0xF0, "IPsec TTL or hop limit field either came in as 0, or was decremented to 0" },
114 	{ 0xF1, "3GPP HFN matches or exceeds the Threshold" },
115 };
116 
117 static const struct {
118 	u8 value;
119 	const char *error_text;
120 } qi_error_list[] = {
121 	{ 0x00, "No error" },
122 	{ 0x1F, "Job terminated by FQ or ICID flush" },
123 	{ 0x20, "FD format error"},
124 	{ 0x21, "FD command format error"},
125 	{ 0x23, "FL format error"},
126 	{ 0x25, "CRJD specified in FD, but not enabled in FLC"},
127 	{ 0x30, "Max. buffer size too small"},
128 	{ 0x31, "DHR exceeds max. buffer size (allocate mode, S/G format)"},
129 	{ 0x32, "SGT exceeds max. buffer size (allocate mode, S/G format"},
130 	{ 0x33, "Size over/underflow (allocate mode)"},
131 	{ 0x34, "Size over/underflow (reuse mode)"},
132 	{ 0x35, "Length exceeds max. short length (allocate mode, S/G/ format)"},
133 	{ 0x36, "Memory footprint exceeds max. value (allocate mode, S/G/ format)"},
134 	{ 0x41, "SBC frame format not supported (allocate mode)"},
135 	{ 0x42, "Pool 0 invalid / pool 1 size < pool 0 size (allocate mode)"},
136 	{ 0x43, "Annotation output enabled but ASAR = 0 (allocate mode)"},
137 	{ 0x44, "Unsupported or reserved frame format or SGHR = 1 (reuse mode)"},
138 	{ 0x45, "DHR correction underflow (reuse mode, single buffer format)"},
139 	{ 0x46, "Annotation length exceeds offset (reuse mode)"},
140 	{ 0x48, "Annotation output enabled but ASA limited by ASAR (reuse mode)"},
141 	{ 0x49, "Data offset correction exceeds input frame data length (reuse mode)"},
142 	{ 0x4B, "Annotation output enabled but ASA cannot be expanded (frame list)"},
143 	{ 0x51, "Unsupported IF reuse mode"},
144 	{ 0x52, "Unsupported FL use mode"},
145 	{ 0x53, "Unsupported RJD use mode"},
146 	{ 0x54, "Unsupported inline descriptor use mode"},
147 	{ 0xC0, "Table buffer pool 0 depletion"},
148 	{ 0xC1, "Table buffer pool 1 depletion"},
149 	{ 0xC2, "Data buffer pool 0 depletion, no OF allocated"},
150 	{ 0xC3, "Data buffer pool 1 depletion, no OF allocated"},
151 	{ 0xC4, "Data buffer pool 0 depletion, partial OF allocated"},
152 	{ 0xC5, "Data buffer pool 1 depletion, partial OF allocated"},
153 	{ 0xD0, "FLC read error"},
154 	{ 0xD1, "FL read error"},
155 	{ 0xD2, "FL write error"},
156 	{ 0xD3, "OF SGT write error"},
157 	{ 0xD4, "PTA read error"},
158 	{ 0xD5, "PTA write error"},
159 	{ 0xD6, "OF SGT F-bit write error"},
160 	{ 0xD7, "ASA write error"},
161 	{ 0xE1, "FLC[ICR]=0 ICID error"},
162 	{ 0xE2, "FLC[ICR]=1 ICID error"},
163 	{ 0xE4, "source of ICID flush not trusted (BDI = 0)"},
164 };
165 
166 static const char * const cha_id_list[] = {
167 	"",
168 	"AES",
169 	"DES",
170 	"ARC4",
171 	"MDHA",
172 	"RNG",
173 	"SNOW f8",
174 	"Kasumi f8/9",
175 	"PKHA",
176 	"CRCA",
177 	"SNOW f9",
178 	"ZUCE",
179 	"ZUCA",
180 };
181 
182 static const char * const err_id_list[] = {
183 	"No error.",
184 	"Mode error.",
185 	"Data size error.",
186 	"Key size error.",
187 	"PKHA A memory size error.",
188 	"PKHA B memory size error.",
189 	"Data arrived out of sequence error.",
190 	"PKHA divide-by-zero error.",
191 	"PKHA modulus even error.",
192 	"DES key parity error.",
193 	"ICV check failed.",
194 	"Hardware error.",
195 	"Unsupported CCM AAD size.",
196 	"Class 1 CHA is not reset",
197 	"Invalid CHA combination was selected",
198 	"Invalid CHA selected.",
199 };
200 
201 static const char * const rng_err_id_list[] = {
202 	"",
203 	"",
204 	"",
205 	"Instantiate",
206 	"Not instantiated",
207 	"Test instantiate",
208 	"Prediction resistance",
209 	"Prediction resistance and test request",
210 	"Uninstantiate",
211 	"Secure key generation",
212 };
213 
214 static int report_ccb_status(struct device *jrdev, const u32 status,
215 			     const char *error)
216 {
217 	u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
218 		    JRSTA_CCBERR_CHAID_SHIFT;
219 	u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
220 	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
221 		  JRSTA_DECOERR_INDEX_SHIFT;
222 	char *idx_str;
223 	const char *cha_str = "unidentified cha_id value 0x";
224 	char cha_err_code[3] = { 0 };
225 	const char *err_str = "unidentified err_id value 0x";
226 	char err_err_code[3] = { 0 };
227 
228 	if (status & JRSTA_DECOERR_JUMP)
229 		idx_str = "jump tgt desc idx";
230 	else
231 		idx_str = "desc idx";
232 
233 	if (cha_id < ARRAY_SIZE(cha_id_list))
234 		cha_str = cha_id_list[cha_id];
235 	else
236 		snprintf(cha_err_code, sizeof(cha_err_code), "%02x", cha_id);
237 
238 	if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
239 	    err_id < ARRAY_SIZE(rng_err_id_list) &&
240 	    strlen(rng_err_id_list[err_id])) {
241 		/* RNG-only error */
242 		err_str = rng_err_id_list[err_id];
243 	} else {
244 		err_str = err_id_list[err_id];
245 	}
246 
247 	/*
248 	 * CCB ICV check failures are part of normal operation life;
249 	 * we leave the upper layers to do what they want with them.
250 	 */
251 	if (err_id == JRSTA_CCBERR_ERRID_ICVCHK)
252 		return -EBADMSG;
253 
254 	dev_err_ratelimited(jrdev, "%08x: %s: %s %d: %s%s: %s%s\n", status,
255 			    error, idx_str, idx, cha_str, cha_err_code,
256 			    err_str, err_err_code);
257 
258 	return -EINVAL;
259 }
260 
261 static int report_jump_status(struct device *jrdev, const u32 status,
262 			      const char *error)
263 {
264 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
265 		status, error, __func__);
266 
267 	return -EINVAL;
268 }
269 
270 static int report_deco_status(struct device *jrdev, const u32 status,
271 			      const char *error)
272 {
273 	u8 err_id = status & JRSTA_DECOERR_ERROR_MASK;
274 	u8 idx = (status & JRSTA_DECOERR_INDEX_MASK) >>
275 		  JRSTA_DECOERR_INDEX_SHIFT;
276 	char *idx_str;
277 	const char *err_str = "unidentified error value 0x";
278 	char err_err_code[3] = { 0 };
279 	int i;
280 
281 	if (status & JRSTA_DECOERR_JUMP)
282 		idx_str = "jump tgt desc idx";
283 	else
284 		idx_str = "desc idx";
285 
286 	for (i = 0; i < ARRAY_SIZE(desc_error_list); i++)
287 		if (desc_error_list[i].value == err_id)
288 			break;
289 
290 	if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text)
291 		err_str = desc_error_list[i].error_text;
292 	else
293 		snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
294 
295 	dev_err(jrdev, "%08x: %s: %s %d: %s%s\n",
296 		status, error, idx_str, idx, err_str, err_err_code);
297 
298 	return -EINVAL;
299 }
300 
301 static int report_qi_status(struct device *qidev, const u32 status,
302 			    const char *error)
303 {
304 	u8 err_id = status & JRSTA_QIERR_ERROR_MASK;
305 	const char *err_str = "unidentified error value 0x";
306 	char err_err_code[3] = { 0 };
307 	int i;
308 
309 	for (i = 0; i < ARRAY_SIZE(qi_error_list); i++)
310 		if (qi_error_list[i].value == err_id)
311 			break;
312 
313 	if (i != ARRAY_SIZE(qi_error_list) && qi_error_list[i].error_text)
314 		err_str = qi_error_list[i].error_text;
315 	else
316 		snprintf(err_err_code, sizeof(err_err_code), "%02x", err_id);
317 
318 	dev_err(qidev, "%08x: %s: %s%s\n",
319 		status, error, err_str, err_err_code);
320 
321 	return -EINVAL;
322 }
323 
324 static int report_jr_status(struct device *jrdev, const u32 status,
325 			    const char *error)
326 {
327 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
328 		status, error, __func__);
329 
330 	return -EINVAL;
331 }
332 
333 static int report_cond_code_status(struct device *jrdev, const u32 status,
334 				   const char *error)
335 {
336 	dev_err(jrdev, "%08x: %s: %s() not implemented\n",
337 		status, error, __func__);
338 
339 	return -EINVAL;
340 }
341 
342 int caam_strstatus(struct device *jrdev, u32 status, bool qi_v2)
343 {
344 	static const struct stat_src {
345 		int (*report_ssed)(struct device *jrdev, const u32 status,
346 				   const char *error);
347 		const char *error;
348 	} status_src[16] = {
349 		{ NULL, "No error" },
350 		{ NULL, NULL },
351 		{ report_ccb_status, "CCB" },
352 		{ report_jump_status, "Jump" },
353 		{ report_deco_status, "DECO" },
354 		{ report_qi_status, "Queue Manager Interface" },
355 		{ report_jr_status, "Job Ring" },
356 		{ report_cond_code_status, "Condition Code" },
357 		{ NULL, NULL },
358 		{ NULL, NULL },
359 		{ NULL, NULL },
360 		{ NULL, NULL },
361 		{ NULL, NULL },
362 		{ NULL, NULL },
363 		{ NULL, NULL },
364 		{ NULL, NULL },
365 	};
366 	u32 ssrc = status >> JRSTA_SSRC_SHIFT;
367 	const char *error = status_src[ssrc].error;
368 
369 	/*
370 	 * If there is an error handling function, call it to report the error.
371 	 * Otherwise print the error source name.
372 	 */
373 	if (status_src[ssrc].report_ssed)
374 		return status_src[ssrc].report_ssed(jrdev, status, error);
375 
376 	if (error)
377 		dev_err(jrdev, "%d: %s\n", ssrc, error);
378 	else
379 		dev_err(jrdev, "%d: unknown error source\n", ssrc);
380 
381 	return -EINVAL;
382 }
383 EXPORT_SYMBOL(caam_strstatus);
384 
385 MODULE_LICENSE("GPL");
386 MODULE_DESCRIPTION("FSL CAAM error reporting");
387 MODULE_AUTHOR("Freescale Semiconductor");
388