1 /* 2 * CAAM control-plane driver backend 3 * Controller-level driver, kernel property detection, initialization 4 * 5 * Copyright 2008-2011 Freescale Semiconductor, Inc. 6 */ 7 8 #include "compat.h" 9 #include "regs.h" 10 #include "intern.h" 11 #include "jr.h" 12 13 static int caam_remove(struct platform_device *pdev) 14 { 15 struct device *ctrldev; 16 struct caam_drv_private *ctrlpriv; 17 struct caam_drv_private_jr *jrpriv; 18 struct caam_full __iomem *topregs; 19 int ring, ret = 0; 20 21 ctrldev = &pdev->dev; 22 ctrlpriv = dev_get_drvdata(ctrldev); 23 topregs = (struct caam_full __iomem *)ctrlpriv->ctrl; 24 25 /* shut down JobRs */ 26 for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) { 27 ret |= caam_jr_shutdown(ctrlpriv->jrdev[ring]); 28 jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]); 29 irq_dispose_mapping(jrpriv->irq); 30 } 31 32 /* Shut down debug views */ 33 #ifdef CONFIG_DEBUG_FS 34 debugfs_remove_recursive(ctrlpriv->dfs_root); 35 #endif 36 37 /* Unmap controller region */ 38 iounmap(&topregs->ctrl); 39 40 kfree(ctrlpriv->jrdev); 41 kfree(ctrlpriv); 42 43 return ret; 44 } 45 46 /* Probe routine for CAAM top (controller) level */ 47 static int caam_probe(struct platform_device *pdev) 48 { 49 int d, ring, rspec; 50 struct device *dev; 51 struct device_node *nprop, *np; 52 struct caam_ctrl __iomem *ctrl; 53 struct caam_full __iomem *topregs; 54 struct caam_drv_private *ctrlpriv; 55 struct caam_perfmon *perfmon; 56 struct caam_deco **deco; 57 u32 deconum; 58 59 ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL); 60 if (!ctrlpriv) 61 return -ENOMEM; 62 63 dev = &pdev->dev; 64 dev_set_drvdata(dev, ctrlpriv); 65 ctrlpriv->pdev = pdev; 66 nprop = pdev->dev.of_node; 67 68 /* Get configuration properties from device tree */ 69 /* First, get register page */ 70 ctrl = of_iomap(nprop, 0); 71 if (ctrl == NULL) { 72 dev_err(dev, "caam: of_iomap() failed\n"); 73 return -ENOMEM; 74 } 75 ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl; 76 77 /* topregs used to derive pointers to CAAM sub-blocks only */ 78 topregs = (struct caam_full __iomem *)ctrl; 79 80 /* Get the IRQ of the controller (for security violations only) */ 81 ctrlpriv->secvio_irq = of_irq_to_resource(nprop, 0, NULL); 82 83 /* 84 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel, 85 * 36-bit pointers in master configuration register 86 */ 87 setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE | 88 (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0)); 89 90 if (sizeof(dma_addr_t) == sizeof(u64)) 91 dma_set_mask(dev, DMA_BIT_MASK(36)); 92 93 /* Find out how many DECOs are present */ 94 deconum = (rd_reg64(&topregs->ctrl.perfmon.cha_num) & 95 CHA_NUM_DECONUM_MASK) >> CHA_NUM_DECONUM_SHIFT; 96 97 ctrlpriv->deco = kmalloc(deconum * sizeof(struct caam_deco *), 98 GFP_KERNEL); 99 100 deco = (struct caam_deco __force **)&topregs->deco; 101 for (d = 0; d < deconum; d++) 102 ctrlpriv->deco[d] = deco[d]; 103 104 /* 105 * Detect and enable JobRs 106 * First, find out how many ring spec'ed, allocate references 107 * for all, then go probe each one. 108 */ 109 rspec = 0; 110 for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") 111 rspec++; 112 ctrlpriv->jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL); 113 if (ctrlpriv->jrdev == NULL) { 114 iounmap(&topregs->ctrl); 115 return -ENOMEM; 116 } 117 118 ring = 0; 119 ctrlpriv->total_jobrs = 0; 120 for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") { 121 caam_jr_probe(pdev, np, ring); 122 ctrlpriv->total_jobrs++; 123 ring++; 124 } 125 126 /* Check to see if QI present. If so, enable */ 127 ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) & 128 CTPR_QI_MASK); 129 if (ctrlpriv->qi_present) { 130 ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi; 131 /* This is all that's required to physically enable QI */ 132 wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN); 133 } 134 135 /* If no QI and no rings specified, quit and go home */ 136 if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) { 137 dev_err(dev, "no queues configured, terminating\n"); 138 caam_remove(pdev); 139 return -ENOMEM; 140 } 141 142 /* NOTE: RTIC detection ought to go here, around Si time */ 143 144 /* Initialize queue allocator lock */ 145 spin_lock_init(&ctrlpriv->jr_alloc_lock); 146 147 /* Report "alive" for developer to see */ 148 dev_info(dev, "device ID = 0x%016llx\n", 149 rd_reg64(&topregs->ctrl.perfmon.caam_id)); 150 dev_info(dev, "job rings = %d, qi = %d\n", 151 ctrlpriv->total_jobrs, ctrlpriv->qi_present); 152 153 #ifdef CONFIG_DEBUG_FS 154 /* 155 * FIXME: needs better naming distinction, as some amalgamation of 156 * "caam" and nprop->full_name. The OF name isn't distinctive, 157 * but does separate instances 158 */ 159 perfmon = (struct caam_perfmon __force *)&ctrl->perfmon; 160 161 ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL); 162 ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root); 163 164 /* Controller-level - performance monitor counters */ 165 ctrlpriv->ctl_rq_dequeued = 166 debugfs_create_u64("rq_dequeued", 167 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 168 ctrlpriv->ctl, &perfmon->req_dequeued); 169 ctrlpriv->ctl_ob_enc_req = 170 debugfs_create_u64("ob_rq_encrypted", 171 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 172 ctrlpriv->ctl, &perfmon->ob_enc_req); 173 ctrlpriv->ctl_ib_dec_req = 174 debugfs_create_u64("ib_rq_decrypted", 175 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 176 ctrlpriv->ctl, &perfmon->ib_dec_req); 177 ctrlpriv->ctl_ob_enc_bytes = 178 debugfs_create_u64("ob_bytes_encrypted", 179 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 180 ctrlpriv->ctl, &perfmon->ob_enc_bytes); 181 ctrlpriv->ctl_ob_prot_bytes = 182 debugfs_create_u64("ob_bytes_protected", 183 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 184 ctrlpriv->ctl, &perfmon->ob_prot_bytes); 185 ctrlpriv->ctl_ib_dec_bytes = 186 debugfs_create_u64("ib_bytes_decrypted", 187 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 188 ctrlpriv->ctl, &perfmon->ib_dec_bytes); 189 ctrlpriv->ctl_ib_valid_bytes = 190 debugfs_create_u64("ib_bytes_validated", 191 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 192 ctrlpriv->ctl, &perfmon->ib_valid_bytes); 193 194 /* Controller level - global status values */ 195 ctrlpriv->ctl_faultaddr = 196 debugfs_create_u64("fault_addr", 197 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 198 ctrlpriv->ctl, &perfmon->faultaddr); 199 ctrlpriv->ctl_faultdetail = 200 debugfs_create_u32("fault_detail", 201 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 202 ctrlpriv->ctl, &perfmon->faultdetail); 203 ctrlpriv->ctl_faultstatus = 204 debugfs_create_u32("fault_status", 205 S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, 206 ctrlpriv->ctl, &perfmon->status); 207 208 /* Internal covering keys (useful in non-secure mode only) */ 209 ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0]; 210 ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32); 211 ctrlpriv->ctl_kek = debugfs_create_blob("kek", 212 S_IFCHR | S_IRUSR | 213 S_IRGRP | S_IROTH, 214 ctrlpriv->ctl, 215 &ctrlpriv->ctl_kek_wrap); 216 217 ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0]; 218 ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32); 219 ctrlpriv->ctl_tkek = debugfs_create_blob("tkek", 220 S_IFCHR | S_IRUSR | 221 S_IRGRP | S_IROTH, 222 ctrlpriv->ctl, 223 &ctrlpriv->ctl_tkek_wrap); 224 225 ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0]; 226 ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32); 227 ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk", 228 S_IFCHR | S_IRUSR | 229 S_IRGRP | S_IROTH, 230 ctrlpriv->ctl, 231 &ctrlpriv->ctl_tdsk_wrap); 232 #endif 233 return 0; 234 } 235 236 static struct of_device_id caam_match[] = { 237 { 238 .compatible = "fsl,sec-v4.0", 239 }, 240 {}, 241 }; 242 MODULE_DEVICE_TABLE(of, caam_match); 243 244 static struct platform_driver caam_driver = { 245 .driver = { 246 .name = "caam", 247 .owner = THIS_MODULE, 248 .of_match_table = caam_match, 249 }, 250 .probe = caam_probe, 251 .remove = __devexit_p(caam_remove), 252 }; 253 254 static int __init caam_base_init(void) 255 { 256 return platform_driver_register(&caam_driver); 257 } 258 259 static void __exit caam_base_exit(void) 260 { 261 return platform_driver_unregister(&caam_driver); 262 } 263 264 module_init(caam_base_init); 265 module_exit(caam_base_exit); 266 267 MODULE_LICENSE("GPL"); 268 MODULE_DESCRIPTION("FSL CAAM request backend"); 269 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC"); 270