1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /* 3 * caam - Freescale FSL CAAM support for Public Key Cryptography 4 * 5 * Copyright 2016 Freescale Semiconductor, Inc. 6 * Copyright 2018-2019, 2023 NXP 7 * 8 * There is no Shared Descriptor for PKC so that the Job Descriptor must carry 9 * all the desired key parameters, input and output pointers. 10 */ 11 #include "compat.h" 12 #include "regs.h" 13 #include "intern.h" 14 #include "jr.h" 15 #include "error.h" 16 #include "desc_constr.h" 17 #include "sg_sw_sec4.h" 18 #include "caampkc.h" 19 #include <linux/dma-mapping.h> 20 #include <linux/kernel.h> 21 22 #define DESC_RSA_PUB_LEN (2 * CAAM_CMD_SZ + SIZEOF_RSA_PUB_PDB) 23 #define DESC_RSA_PRIV_F1_LEN (2 * CAAM_CMD_SZ + \ 24 SIZEOF_RSA_PRIV_F1_PDB) 25 #define DESC_RSA_PRIV_F2_LEN (2 * CAAM_CMD_SZ + \ 26 SIZEOF_RSA_PRIV_F2_PDB) 27 #define DESC_RSA_PRIV_F3_LEN (2 * CAAM_CMD_SZ + \ 28 SIZEOF_RSA_PRIV_F3_PDB) 29 #define CAAM_RSA_MAX_INPUT_SIZE 512 /* for a 4096-bit modulus */ 30 31 /* buffer filled with zeros, used for padding */ 32 static u8 *zero_buffer; 33 34 /* 35 * variable used to avoid double free of resources in case 36 * algorithm registration was unsuccessful 37 */ 38 static bool init_done; 39 40 struct caam_akcipher_alg { 41 struct akcipher_alg akcipher; 42 bool registered; 43 }; 44 45 static void rsa_io_unmap(struct device *dev, struct rsa_edesc *edesc, 46 struct akcipher_request *req) 47 { 48 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 49 50 dma_unmap_sg(dev, req->dst, edesc->dst_nents, DMA_FROM_DEVICE); 51 dma_unmap_sg(dev, req_ctx->fixup_src, edesc->src_nents, DMA_TO_DEVICE); 52 53 if (edesc->sec4_sg_bytes) 54 dma_unmap_single(dev, edesc->sec4_sg_dma, edesc->sec4_sg_bytes, 55 DMA_TO_DEVICE); 56 } 57 58 static void rsa_pub_unmap(struct device *dev, struct rsa_edesc *edesc, 59 struct akcipher_request *req) 60 { 61 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 62 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 63 struct caam_rsa_key *key = &ctx->key; 64 struct rsa_pub_pdb *pdb = &edesc->pdb.pub; 65 66 dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE); 67 dma_unmap_single(dev, pdb->e_dma, key->e_sz, DMA_TO_DEVICE); 68 } 69 70 static void rsa_priv_f1_unmap(struct device *dev, struct rsa_edesc *edesc, 71 struct akcipher_request *req) 72 { 73 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 74 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 75 struct caam_rsa_key *key = &ctx->key; 76 struct rsa_priv_f1_pdb *pdb = &edesc->pdb.priv_f1; 77 78 dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE); 79 dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE); 80 } 81 82 static void rsa_priv_f2_unmap(struct device *dev, struct rsa_edesc *edesc, 83 struct akcipher_request *req) 84 { 85 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 86 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 87 struct caam_rsa_key *key = &ctx->key; 88 struct rsa_priv_f2_pdb *pdb = &edesc->pdb.priv_f2; 89 size_t p_sz = key->p_sz; 90 size_t q_sz = key->q_sz; 91 92 dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE); 93 dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE); 94 dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE); 95 dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL); 96 dma_unmap_single(dev, pdb->tmp2_dma, q_sz, DMA_BIDIRECTIONAL); 97 } 98 99 static void rsa_priv_f3_unmap(struct device *dev, struct rsa_edesc *edesc, 100 struct akcipher_request *req) 101 { 102 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 103 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 104 struct caam_rsa_key *key = &ctx->key; 105 struct rsa_priv_f3_pdb *pdb = &edesc->pdb.priv_f3; 106 size_t p_sz = key->p_sz; 107 size_t q_sz = key->q_sz; 108 109 dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE); 110 dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE); 111 dma_unmap_single(dev, pdb->dp_dma, p_sz, DMA_TO_DEVICE); 112 dma_unmap_single(dev, pdb->dq_dma, q_sz, DMA_TO_DEVICE); 113 dma_unmap_single(dev, pdb->c_dma, p_sz, DMA_TO_DEVICE); 114 dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL); 115 dma_unmap_single(dev, pdb->tmp2_dma, q_sz, DMA_BIDIRECTIONAL); 116 } 117 118 /* RSA Job Completion handler */ 119 static void rsa_pub_done(struct device *dev, u32 *desc, u32 err, void *context) 120 { 121 struct akcipher_request *req = context; 122 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 123 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 124 struct rsa_edesc *edesc; 125 int ecode = 0; 126 bool has_bklog; 127 128 if (err) 129 ecode = caam_jr_strstatus(dev, err); 130 131 edesc = req_ctx->edesc; 132 has_bklog = edesc->bklog; 133 134 rsa_pub_unmap(dev, edesc, req); 135 rsa_io_unmap(dev, edesc, req); 136 kfree(edesc); 137 138 /* 139 * If no backlog flag, the completion of the request is done 140 * by CAAM, not crypto engine. 141 */ 142 if (!has_bklog) 143 akcipher_request_complete(req, ecode); 144 else 145 crypto_finalize_akcipher_request(jrp->engine, req, ecode); 146 } 147 148 static void rsa_priv_f_done(struct device *dev, u32 *desc, u32 err, 149 void *context) 150 { 151 struct akcipher_request *req = context; 152 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 153 struct caam_drv_private_jr *jrp = dev_get_drvdata(dev); 154 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 155 struct caam_rsa_key *key = &ctx->key; 156 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 157 struct rsa_edesc *edesc; 158 int ecode = 0; 159 bool has_bklog; 160 161 if (err) 162 ecode = caam_jr_strstatus(dev, err); 163 164 edesc = req_ctx->edesc; 165 has_bklog = edesc->bklog; 166 167 switch (key->priv_form) { 168 case FORM1: 169 rsa_priv_f1_unmap(dev, edesc, req); 170 break; 171 case FORM2: 172 rsa_priv_f2_unmap(dev, edesc, req); 173 break; 174 case FORM3: 175 rsa_priv_f3_unmap(dev, edesc, req); 176 } 177 178 rsa_io_unmap(dev, edesc, req); 179 kfree(edesc); 180 181 /* 182 * If no backlog flag, the completion of the request is done 183 * by CAAM, not crypto engine. 184 */ 185 if (!has_bklog) 186 akcipher_request_complete(req, ecode); 187 else 188 crypto_finalize_akcipher_request(jrp->engine, req, ecode); 189 } 190 191 /** 192 * caam_rsa_count_leading_zeros - Count leading zeros, need it to strip, 193 * from a given scatterlist 194 * 195 * @sgl : scatterlist to count zeros from 196 * @nbytes: number of zeros, in bytes, to strip 197 * @flags : operation flags 198 */ 199 static int caam_rsa_count_leading_zeros(struct scatterlist *sgl, 200 unsigned int nbytes, 201 unsigned int flags) 202 { 203 struct sg_mapping_iter miter; 204 int lzeros, ents; 205 unsigned int len; 206 unsigned int tbytes = nbytes; 207 const u8 *buff; 208 209 ents = sg_nents_for_len(sgl, nbytes); 210 if (ents < 0) 211 return ents; 212 213 sg_miter_start(&miter, sgl, ents, SG_MITER_FROM_SG | flags); 214 215 lzeros = 0; 216 len = 0; 217 while (nbytes > 0) { 218 /* do not strip more than given bytes */ 219 while (len && !*buff && lzeros < nbytes) { 220 lzeros++; 221 len--; 222 buff++; 223 } 224 225 if (len && *buff) 226 break; 227 228 if (!sg_miter_next(&miter)) 229 break; 230 231 buff = miter.addr; 232 len = miter.length; 233 234 nbytes -= lzeros; 235 lzeros = 0; 236 } 237 238 miter.consumed = lzeros; 239 sg_miter_stop(&miter); 240 nbytes -= lzeros; 241 242 return tbytes - nbytes; 243 } 244 245 static struct rsa_edesc *rsa_edesc_alloc(struct akcipher_request *req, 246 size_t desclen) 247 { 248 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 249 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 250 struct device *dev = ctx->dev; 251 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 252 struct caam_rsa_key *key = &ctx->key; 253 struct rsa_edesc *edesc; 254 gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? 255 GFP_KERNEL : GFP_ATOMIC; 256 int sg_flags = (flags == GFP_ATOMIC) ? SG_MITER_ATOMIC : 0; 257 int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes; 258 int src_nents, dst_nents; 259 int mapped_src_nents, mapped_dst_nents; 260 unsigned int diff_size = 0; 261 int lzeros; 262 263 if (req->src_len > key->n_sz) { 264 /* 265 * strip leading zeros and 266 * return the number of zeros to skip 267 */ 268 lzeros = caam_rsa_count_leading_zeros(req->src, req->src_len - 269 key->n_sz, sg_flags); 270 if (lzeros < 0) 271 return ERR_PTR(lzeros); 272 273 req_ctx->fixup_src = scatterwalk_ffwd(req_ctx->src, req->src, 274 lzeros); 275 req_ctx->fixup_src_len = req->src_len - lzeros; 276 } else { 277 /* 278 * input src is less then n key modulus, 279 * so there will be zero padding 280 */ 281 diff_size = key->n_sz - req->src_len; 282 req_ctx->fixup_src = req->src; 283 req_ctx->fixup_src_len = req->src_len; 284 } 285 286 src_nents = sg_nents_for_len(req_ctx->fixup_src, 287 req_ctx->fixup_src_len); 288 dst_nents = sg_nents_for_len(req->dst, req->dst_len); 289 290 mapped_src_nents = dma_map_sg(dev, req_ctx->fixup_src, src_nents, 291 DMA_TO_DEVICE); 292 if (unlikely(!mapped_src_nents)) { 293 dev_err(dev, "unable to map source\n"); 294 return ERR_PTR(-ENOMEM); 295 } 296 mapped_dst_nents = dma_map_sg(dev, req->dst, dst_nents, 297 DMA_FROM_DEVICE); 298 if (unlikely(!mapped_dst_nents)) { 299 dev_err(dev, "unable to map destination\n"); 300 goto src_fail; 301 } 302 303 if (!diff_size && mapped_src_nents == 1) 304 sec4_sg_len = 0; /* no need for an input hw s/g table */ 305 else 306 sec4_sg_len = mapped_src_nents + !!diff_size; 307 sec4_sg_index = sec4_sg_len; 308 309 if (mapped_dst_nents > 1) 310 sec4_sg_len += pad_sg_nents(mapped_dst_nents); 311 else 312 sec4_sg_len = pad_sg_nents(sec4_sg_len); 313 314 sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry); 315 316 /* allocate space for base edesc, hw desc commands and link tables */ 317 edesc = kzalloc(sizeof(*edesc) + desclen + sec4_sg_bytes, flags); 318 if (!edesc) 319 goto dst_fail; 320 321 edesc->sec4_sg = (void *)edesc + sizeof(*edesc) + desclen; 322 if (diff_size) 323 dma_to_sec4_sg_one(edesc->sec4_sg, ctx->padding_dma, diff_size, 324 0); 325 326 if (sec4_sg_index) 327 sg_to_sec4_sg_last(req_ctx->fixup_src, req_ctx->fixup_src_len, 328 edesc->sec4_sg + !!diff_size, 0); 329 330 if (mapped_dst_nents > 1) 331 sg_to_sec4_sg_last(req->dst, req->dst_len, 332 edesc->sec4_sg + sec4_sg_index, 0); 333 334 /* Save nents for later use in Job Descriptor */ 335 edesc->src_nents = src_nents; 336 edesc->dst_nents = dst_nents; 337 338 req_ctx->edesc = edesc; 339 340 if (!sec4_sg_bytes) 341 return edesc; 342 343 edesc->mapped_src_nents = mapped_src_nents; 344 edesc->mapped_dst_nents = mapped_dst_nents; 345 346 edesc->sec4_sg_dma = dma_map_single(dev, edesc->sec4_sg, 347 sec4_sg_bytes, DMA_TO_DEVICE); 348 if (dma_mapping_error(dev, edesc->sec4_sg_dma)) { 349 dev_err(dev, "unable to map S/G table\n"); 350 goto sec4_sg_fail; 351 } 352 353 edesc->sec4_sg_bytes = sec4_sg_bytes; 354 355 print_hex_dump_debug("caampkc sec4_sg@" __stringify(__LINE__) ": ", 356 DUMP_PREFIX_ADDRESS, 16, 4, edesc->sec4_sg, 357 edesc->sec4_sg_bytes, 1); 358 359 return edesc; 360 361 sec4_sg_fail: 362 kfree(edesc); 363 dst_fail: 364 dma_unmap_sg(dev, req->dst, dst_nents, DMA_FROM_DEVICE); 365 src_fail: 366 dma_unmap_sg(dev, req_ctx->fixup_src, src_nents, DMA_TO_DEVICE); 367 return ERR_PTR(-ENOMEM); 368 } 369 370 static int akcipher_do_one_req(struct crypto_engine *engine, void *areq) 371 { 372 struct akcipher_request *req = container_of(areq, 373 struct akcipher_request, 374 base); 375 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 376 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 377 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 378 struct device *jrdev = ctx->dev; 379 u32 *desc = req_ctx->edesc->hw_desc; 380 int ret; 381 382 req_ctx->edesc->bklog = true; 383 384 ret = caam_jr_enqueue(jrdev, desc, req_ctx->akcipher_op_done, req); 385 386 if (ret == -ENOSPC && engine->retry_support) 387 return ret; 388 389 if (ret != -EINPROGRESS) { 390 rsa_pub_unmap(jrdev, req_ctx->edesc, req); 391 rsa_io_unmap(jrdev, req_ctx->edesc, req); 392 kfree(req_ctx->edesc); 393 } else { 394 ret = 0; 395 } 396 397 return ret; 398 } 399 400 static int set_rsa_pub_pdb(struct akcipher_request *req, 401 struct rsa_edesc *edesc) 402 { 403 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 404 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 405 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 406 struct caam_rsa_key *key = &ctx->key; 407 struct device *dev = ctx->dev; 408 struct rsa_pub_pdb *pdb = &edesc->pdb.pub; 409 int sec4_sg_index = 0; 410 411 pdb->n_dma = dma_map_single(dev, key->n, key->n_sz, DMA_TO_DEVICE); 412 if (dma_mapping_error(dev, pdb->n_dma)) { 413 dev_err(dev, "Unable to map RSA modulus memory\n"); 414 return -ENOMEM; 415 } 416 417 pdb->e_dma = dma_map_single(dev, key->e, key->e_sz, DMA_TO_DEVICE); 418 if (dma_mapping_error(dev, pdb->e_dma)) { 419 dev_err(dev, "Unable to map RSA public exponent memory\n"); 420 dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE); 421 return -ENOMEM; 422 } 423 424 if (edesc->mapped_src_nents > 1) { 425 pdb->sgf |= RSA_PDB_SGF_F; 426 pdb->f_dma = edesc->sec4_sg_dma; 427 sec4_sg_index += edesc->mapped_src_nents; 428 } else { 429 pdb->f_dma = sg_dma_address(req_ctx->fixup_src); 430 } 431 432 if (edesc->mapped_dst_nents > 1) { 433 pdb->sgf |= RSA_PDB_SGF_G; 434 pdb->g_dma = edesc->sec4_sg_dma + 435 sec4_sg_index * sizeof(struct sec4_sg_entry); 436 } else { 437 pdb->g_dma = sg_dma_address(req->dst); 438 } 439 440 pdb->sgf |= (key->e_sz << RSA_PDB_E_SHIFT) | key->n_sz; 441 pdb->f_len = req_ctx->fixup_src_len; 442 443 return 0; 444 } 445 446 static int set_rsa_priv_f1_pdb(struct akcipher_request *req, 447 struct rsa_edesc *edesc) 448 { 449 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 450 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 451 struct caam_rsa_key *key = &ctx->key; 452 struct device *dev = ctx->dev; 453 struct rsa_priv_f1_pdb *pdb = &edesc->pdb.priv_f1; 454 int sec4_sg_index = 0; 455 456 pdb->n_dma = dma_map_single(dev, key->n, key->n_sz, DMA_TO_DEVICE); 457 if (dma_mapping_error(dev, pdb->n_dma)) { 458 dev_err(dev, "Unable to map modulus memory\n"); 459 return -ENOMEM; 460 } 461 462 pdb->d_dma = dma_map_single(dev, key->d, key->d_sz, DMA_TO_DEVICE); 463 if (dma_mapping_error(dev, pdb->d_dma)) { 464 dev_err(dev, "Unable to map RSA private exponent memory\n"); 465 dma_unmap_single(dev, pdb->n_dma, key->n_sz, DMA_TO_DEVICE); 466 return -ENOMEM; 467 } 468 469 if (edesc->mapped_src_nents > 1) { 470 pdb->sgf |= RSA_PRIV_PDB_SGF_G; 471 pdb->g_dma = edesc->sec4_sg_dma; 472 sec4_sg_index += edesc->mapped_src_nents; 473 474 } else { 475 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 476 477 pdb->g_dma = sg_dma_address(req_ctx->fixup_src); 478 } 479 480 if (edesc->mapped_dst_nents > 1) { 481 pdb->sgf |= RSA_PRIV_PDB_SGF_F; 482 pdb->f_dma = edesc->sec4_sg_dma + 483 sec4_sg_index * sizeof(struct sec4_sg_entry); 484 } else { 485 pdb->f_dma = sg_dma_address(req->dst); 486 } 487 488 pdb->sgf |= (key->d_sz << RSA_PDB_D_SHIFT) | key->n_sz; 489 490 return 0; 491 } 492 493 static int set_rsa_priv_f2_pdb(struct akcipher_request *req, 494 struct rsa_edesc *edesc) 495 { 496 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 497 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 498 struct caam_rsa_key *key = &ctx->key; 499 struct device *dev = ctx->dev; 500 struct rsa_priv_f2_pdb *pdb = &edesc->pdb.priv_f2; 501 int sec4_sg_index = 0; 502 size_t p_sz = key->p_sz; 503 size_t q_sz = key->q_sz; 504 505 pdb->d_dma = dma_map_single(dev, key->d, key->d_sz, DMA_TO_DEVICE); 506 if (dma_mapping_error(dev, pdb->d_dma)) { 507 dev_err(dev, "Unable to map RSA private exponent memory\n"); 508 return -ENOMEM; 509 } 510 511 pdb->p_dma = dma_map_single(dev, key->p, p_sz, DMA_TO_DEVICE); 512 if (dma_mapping_error(dev, pdb->p_dma)) { 513 dev_err(dev, "Unable to map RSA prime factor p memory\n"); 514 goto unmap_d; 515 } 516 517 pdb->q_dma = dma_map_single(dev, key->q, q_sz, DMA_TO_DEVICE); 518 if (dma_mapping_error(dev, pdb->q_dma)) { 519 dev_err(dev, "Unable to map RSA prime factor q memory\n"); 520 goto unmap_p; 521 } 522 523 pdb->tmp1_dma = dma_map_single(dev, key->tmp1, p_sz, DMA_BIDIRECTIONAL); 524 if (dma_mapping_error(dev, pdb->tmp1_dma)) { 525 dev_err(dev, "Unable to map RSA tmp1 memory\n"); 526 goto unmap_q; 527 } 528 529 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); 530 if (dma_mapping_error(dev, pdb->tmp2_dma)) { 531 dev_err(dev, "Unable to map RSA tmp2 memory\n"); 532 goto unmap_tmp1; 533 } 534 535 if (edesc->mapped_src_nents > 1) { 536 pdb->sgf |= RSA_PRIV_PDB_SGF_G; 537 pdb->g_dma = edesc->sec4_sg_dma; 538 sec4_sg_index += edesc->mapped_src_nents; 539 } else { 540 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 541 542 pdb->g_dma = sg_dma_address(req_ctx->fixup_src); 543 } 544 545 if (edesc->mapped_dst_nents > 1) { 546 pdb->sgf |= RSA_PRIV_PDB_SGF_F; 547 pdb->f_dma = edesc->sec4_sg_dma + 548 sec4_sg_index * sizeof(struct sec4_sg_entry); 549 } else { 550 pdb->f_dma = sg_dma_address(req->dst); 551 } 552 553 pdb->sgf |= (key->d_sz << RSA_PDB_D_SHIFT) | key->n_sz; 554 pdb->p_q_len = (q_sz << RSA_PDB_Q_SHIFT) | p_sz; 555 556 return 0; 557 558 unmap_tmp1: 559 dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL); 560 unmap_q: 561 dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE); 562 unmap_p: 563 dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE); 564 unmap_d: 565 dma_unmap_single(dev, pdb->d_dma, key->d_sz, DMA_TO_DEVICE); 566 567 return -ENOMEM; 568 } 569 570 static int set_rsa_priv_f3_pdb(struct akcipher_request *req, 571 struct rsa_edesc *edesc) 572 { 573 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 574 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 575 struct caam_rsa_key *key = &ctx->key; 576 struct device *dev = ctx->dev; 577 struct rsa_priv_f3_pdb *pdb = &edesc->pdb.priv_f3; 578 int sec4_sg_index = 0; 579 size_t p_sz = key->p_sz; 580 size_t q_sz = key->q_sz; 581 582 pdb->p_dma = dma_map_single(dev, key->p, p_sz, DMA_TO_DEVICE); 583 if (dma_mapping_error(dev, pdb->p_dma)) { 584 dev_err(dev, "Unable to map RSA prime factor p memory\n"); 585 return -ENOMEM; 586 } 587 588 pdb->q_dma = dma_map_single(dev, key->q, q_sz, DMA_TO_DEVICE); 589 if (dma_mapping_error(dev, pdb->q_dma)) { 590 dev_err(dev, "Unable to map RSA prime factor q memory\n"); 591 goto unmap_p; 592 } 593 594 pdb->dp_dma = dma_map_single(dev, key->dp, p_sz, DMA_TO_DEVICE); 595 if (dma_mapping_error(dev, pdb->dp_dma)) { 596 dev_err(dev, "Unable to map RSA exponent dp memory\n"); 597 goto unmap_q; 598 } 599 600 pdb->dq_dma = dma_map_single(dev, key->dq, q_sz, DMA_TO_DEVICE); 601 if (dma_mapping_error(dev, pdb->dq_dma)) { 602 dev_err(dev, "Unable to map RSA exponent dq memory\n"); 603 goto unmap_dp; 604 } 605 606 pdb->c_dma = dma_map_single(dev, key->qinv, p_sz, DMA_TO_DEVICE); 607 if (dma_mapping_error(dev, pdb->c_dma)) { 608 dev_err(dev, "Unable to map RSA CRT coefficient qinv memory\n"); 609 goto unmap_dq; 610 } 611 612 pdb->tmp1_dma = dma_map_single(dev, key->tmp1, p_sz, DMA_BIDIRECTIONAL); 613 if (dma_mapping_error(dev, pdb->tmp1_dma)) { 614 dev_err(dev, "Unable to map RSA tmp1 memory\n"); 615 goto unmap_qinv; 616 } 617 618 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); 619 if (dma_mapping_error(dev, pdb->tmp2_dma)) { 620 dev_err(dev, "Unable to map RSA tmp2 memory\n"); 621 goto unmap_tmp1; 622 } 623 624 if (edesc->mapped_src_nents > 1) { 625 pdb->sgf |= RSA_PRIV_PDB_SGF_G; 626 pdb->g_dma = edesc->sec4_sg_dma; 627 sec4_sg_index += edesc->mapped_src_nents; 628 } else { 629 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 630 631 pdb->g_dma = sg_dma_address(req_ctx->fixup_src); 632 } 633 634 if (edesc->mapped_dst_nents > 1) { 635 pdb->sgf |= RSA_PRIV_PDB_SGF_F; 636 pdb->f_dma = edesc->sec4_sg_dma + 637 sec4_sg_index * sizeof(struct sec4_sg_entry); 638 } else { 639 pdb->f_dma = sg_dma_address(req->dst); 640 } 641 642 pdb->sgf |= key->n_sz; 643 pdb->p_q_len = (q_sz << RSA_PDB_Q_SHIFT) | p_sz; 644 645 return 0; 646 647 unmap_tmp1: 648 dma_unmap_single(dev, pdb->tmp1_dma, p_sz, DMA_BIDIRECTIONAL); 649 unmap_qinv: 650 dma_unmap_single(dev, pdb->c_dma, p_sz, DMA_TO_DEVICE); 651 unmap_dq: 652 dma_unmap_single(dev, pdb->dq_dma, q_sz, DMA_TO_DEVICE); 653 unmap_dp: 654 dma_unmap_single(dev, pdb->dp_dma, p_sz, DMA_TO_DEVICE); 655 unmap_q: 656 dma_unmap_single(dev, pdb->q_dma, q_sz, DMA_TO_DEVICE); 657 unmap_p: 658 dma_unmap_single(dev, pdb->p_dma, p_sz, DMA_TO_DEVICE); 659 660 return -ENOMEM; 661 } 662 663 static int akcipher_enqueue_req(struct device *jrdev, 664 void (*cbk)(struct device *jrdev, u32 *desc, 665 u32 err, void *context), 666 struct akcipher_request *req) 667 { 668 struct caam_drv_private_jr *jrpriv = dev_get_drvdata(jrdev); 669 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 670 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 671 struct caam_rsa_key *key = &ctx->key; 672 struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req); 673 struct rsa_edesc *edesc = req_ctx->edesc; 674 u32 *desc = edesc->hw_desc; 675 int ret; 676 677 req_ctx->akcipher_op_done = cbk; 678 /* 679 * Only the backlog request are sent to crypto-engine since the others 680 * can be handled by CAAM, if free, especially since JR has up to 1024 681 * entries (more than the 10 entries from crypto-engine). 682 */ 683 if (req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG) 684 ret = crypto_transfer_akcipher_request_to_engine(jrpriv->engine, 685 req); 686 else 687 ret = caam_jr_enqueue(jrdev, desc, cbk, req); 688 689 if ((ret != -EINPROGRESS) && (ret != -EBUSY)) { 690 switch (key->priv_form) { 691 case FORM1: 692 rsa_priv_f1_unmap(jrdev, edesc, req); 693 break; 694 case FORM2: 695 rsa_priv_f2_unmap(jrdev, edesc, req); 696 break; 697 case FORM3: 698 rsa_priv_f3_unmap(jrdev, edesc, req); 699 break; 700 default: 701 rsa_pub_unmap(jrdev, edesc, req); 702 } 703 rsa_io_unmap(jrdev, edesc, req); 704 kfree(edesc); 705 } 706 707 return ret; 708 } 709 710 static int caam_rsa_enc(struct akcipher_request *req) 711 { 712 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 713 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 714 struct caam_rsa_key *key = &ctx->key; 715 struct device *jrdev = ctx->dev; 716 struct rsa_edesc *edesc; 717 int ret; 718 719 if (unlikely(!key->n || !key->e)) 720 return -EINVAL; 721 722 if (req->dst_len < key->n_sz) { 723 req->dst_len = key->n_sz; 724 dev_err(jrdev, "Output buffer length less than parameter n\n"); 725 return -EOVERFLOW; 726 } 727 728 /* Allocate extended descriptor */ 729 edesc = rsa_edesc_alloc(req, DESC_RSA_PUB_LEN); 730 if (IS_ERR(edesc)) 731 return PTR_ERR(edesc); 732 733 /* Set RSA Encrypt Protocol Data Block */ 734 ret = set_rsa_pub_pdb(req, edesc); 735 if (ret) 736 goto init_fail; 737 738 /* Initialize Job Descriptor */ 739 init_rsa_pub_desc(edesc->hw_desc, &edesc->pdb.pub); 740 741 return akcipher_enqueue_req(jrdev, rsa_pub_done, req); 742 743 init_fail: 744 rsa_io_unmap(jrdev, edesc, req); 745 kfree(edesc); 746 return ret; 747 } 748 749 static int caam_rsa_dec_priv_f1(struct akcipher_request *req) 750 { 751 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 752 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 753 struct device *jrdev = ctx->dev; 754 struct rsa_edesc *edesc; 755 int ret; 756 757 /* Allocate extended descriptor */ 758 edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F1_LEN); 759 if (IS_ERR(edesc)) 760 return PTR_ERR(edesc); 761 762 /* Set RSA Decrypt Protocol Data Block - Private Key Form #1 */ 763 ret = set_rsa_priv_f1_pdb(req, edesc); 764 if (ret) 765 goto init_fail; 766 767 /* Initialize Job Descriptor */ 768 init_rsa_priv_f1_desc(edesc->hw_desc, &edesc->pdb.priv_f1); 769 770 return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req); 771 772 init_fail: 773 rsa_io_unmap(jrdev, edesc, req); 774 kfree(edesc); 775 return ret; 776 } 777 778 static int caam_rsa_dec_priv_f2(struct akcipher_request *req) 779 { 780 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 781 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 782 struct device *jrdev = ctx->dev; 783 struct rsa_edesc *edesc; 784 int ret; 785 786 /* Allocate extended descriptor */ 787 edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F2_LEN); 788 if (IS_ERR(edesc)) 789 return PTR_ERR(edesc); 790 791 /* Set RSA Decrypt Protocol Data Block - Private Key Form #2 */ 792 ret = set_rsa_priv_f2_pdb(req, edesc); 793 if (ret) 794 goto init_fail; 795 796 /* Initialize Job Descriptor */ 797 init_rsa_priv_f2_desc(edesc->hw_desc, &edesc->pdb.priv_f2); 798 799 return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req); 800 801 init_fail: 802 rsa_io_unmap(jrdev, edesc, req); 803 kfree(edesc); 804 return ret; 805 } 806 807 static int caam_rsa_dec_priv_f3(struct akcipher_request *req) 808 { 809 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 810 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 811 struct device *jrdev = ctx->dev; 812 struct rsa_edesc *edesc; 813 int ret; 814 815 /* Allocate extended descriptor */ 816 edesc = rsa_edesc_alloc(req, DESC_RSA_PRIV_F3_LEN); 817 if (IS_ERR(edesc)) 818 return PTR_ERR(edesc); 819 820 /* Set RSA Decrypt Protocol Data Block - Private Key Form #3 */ 821 ret = set_rsa_priv_f3_pdb(req, edesc); 822 if (ret) 823 goto init_fail; 824 825 /* Initialize Job Descriptor */ 826 init_rsa_priv_f3_desc(edesc->hw_desc, &edesc->pdb.priv_f3); 827 828 return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req); 829 830 init_fail: 831 rsa_io_unmap(jrdev, edesc, req); 832 kfree(edesc); 833 return ret; 834 } 835 836 static int caam_rsa_dec(struct akcipher_request *req) 837 { 838 struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req); 839 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 840 struct caam_rsa_key *key = &ctx->key; 841 int ret; 842 843 if (unlikely(!key->n || !key->d)) 844 return -EINVAL; 845 846 if (req->dst_len < key->n_sz) { 847 req->dst_len = key->n_sz; 848 dev_err(ctx->dev, "Output buffer length less than parameter n\n"); 849 return -EOVERFLOW; 850 } 851 852 if (key->priv_form == FORM3) 853 ret = caam_rsa_dec_priv_f3(req); 854 else if (key->priv_form == FORM2) 855 ret = caam_rsa_dec_priv_f2(req); 856 else 857 ret = caam_rsa_dec_priv_f1(req); 858 859 return ret; 860 } 861 862 static void caam_rsa_free_key(struct caam_rsa_key *key) 863 { 864 kfree_sensitive(key->d); 865 kfree_sensitive(key->p); 866 kfree_sensitive(key->q); 867 kfree_sensitive(key->dp); 868 kfree_sensitive(key->dq); 869 kfree_sensitive(key->qinv); 870 kfree_sensitive(key->tmp1); 871 kfree_sensitive(key->tmp2); 872 kfree(key->e); 873 kfree(key->n); 874 memset(key, 0, sizeof(*key)); 875 } 876 877 static void caam_rsa_drop_leading_zeros(const u8 **ptr, size_t *nbytes) 878 { 879 while (!**ptr && *nbytes) { 880 (*ptr)++; 881 (*nbytes)--; 882 } 883 } 884 885 /** 886 * caam_read_rsa_crt - Used for reading dP, dQ, qInv CRT members. 887 * dP, dQ and qInv could decode to less than corresponding p, q length, as the 888 * BER-encoding requires that the minimum number of bytes be used to encode the 889 * integer. dP, dQ, qInv decoded values have to be zero-padded to appropriate 890 * length. 891 * 892 * @ptr : pointer to {dP, dQ, qInv} CRT member 893 * @nbytes: length in bytes of {dP, dQ, qInv} CRT member 894 * @dstlen: length in bytes of corresponding p or q prime factor 895 */ 896 static u8 *caam_read_rsa_crt(const u8 *ptr, size_t nbytes, size_t dstlen) 897 { 898 u8 *dst; 899 900 caam_rsa_drop_leading_zeros(&ptr, &nbytes); 901 if (!nbytes) 902 return NULL; 903 904 dst = kzalloc(dstlen, GFP_KERNEL); 905 if (!dst) 906 return NULL; 907 908 memcpy(dst + (dstlen - nbytes), ptr, nbytes); 909 910 return dst; 911 } 912 913 /** 914 * caam_read_raw_data - Read a raw byte stream as a positive integer. 915 * The function skips buffer's leading zeros, copies the remained data 916 * to a buffer allocated in the GFP_KERNEL zone and returns 917 * the address of the new buffer. 918 * 919 * @buf : The data to read 920 * @nbytes: The amount of data to read 921 */ 922 static inline u8 *caam_read_raw_data(const u8 *buf, size_t *nbytes) 923 { 924 925 caam_rsa_drop_leading_zeros(&buf, nbytes); 926 if (!*nbytes) 927 return NULL; 928 929 return kmemdup(buf, *nbytes, GFP_KERNEL); 930 } 931 932 static int caam_rsa_check_key_length(unsigned int len) 933 { 934 if (len > 4096) 935 return -EINVAL; 936 return 0; 937 } 938 939 static int caam_rsa_set_pub_key(struct crypto_akcipher *tfm, const void *key, 940 unsigned int keylen) 941 { 942 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 943 struct rsa_key raw_key = {NULL}; 944 struct caam_rsa_key *rsa_key = &ctx->key; 945 int ret; 946 947 /* Free the old RSA key if any */ 948 caam_rsa_free_key(rsa_key); 949 950 ret = rsa_parse_pub_key(&raw_key, key, keylen); 951 if (ret) 952 return ret; 953 954 /* Copy key in DMA zone */ 955 rsa_key->e = kmemdup(raw_key.e, raw_key.e_sz, GFP_KERNEL); 956 if (!rsa_key->e) 957 goto err; 958 959 /* 960 * Skip leading zeros and copy the positive integer to a buffer 961 * allocated in the GFP_KERNEL zone. The decryption descriptor 962 * expects a positive integer for the RSA modulus and uses its length as 963 * decryption output length. 964 */ 965 rsa_key->n = caam_read_raw_data(raw_key.n, &raw_key.n_sz); 966 if (!rsa_key->n) 967 goto err; 968 969 if (caam_rsa_check_key_length(raw_key.n_sz << 3)) { 970 caam_rsa_free_key(rsa_key); 971 return -EINVAL; 972 } 973 974 rsa_key->e_sz = raw_key.e_sz; 975 rsa_key->n_sz = raw_key.n_sz; 976 977 return 0; 978 err: 979 caam_rsa_free_key(rsa_key); 980 return -ENOMEM; 981 } 982 983 static void caam_rsa_set_priv_key_form(struct caam_rsa_ctx *ctx, 984 struct rsa_key *raw_key) 985 { 986 struct caam_rsa_key *rsa_key = &ctx->key; 987 size_t p_sz = raw_key->p_sz; 988 size_t q_sz = raw_key->q_sz; 989 unsigned aligned_size; 990 991 rsa_key->p = caam_read_raw_data(raw_key->p, &p_sz); 992 if (!rsa_key->p) 993 return; 994 rsa_key->p_sz = p_sz; 995 996 rsa_key->q = caam_read_raw_data(raw_key->q, &q_sz); 997 if (!rsa_key->q) 998 goto free_p; 999 rsa_key->q_sz = q_sz; 1000 1001 aligned_size = ALIGN(raw_key->p_sz, dma_get_cache_alignment()); 1002 rsa_key->tmp1 = kzalloc(aligned_size, GFP_KERNEL); 1003 if (!rsa_key->tmp1) 1004 goto free_q; 1005 1006 aligned_size = ALIGN(raw_key->q_sz, dma_get_cache_alignment()); 1007 rsa_key->tmp2 = kzalloc(aligned_size, GFP_KERNEL); 1008 if (!rsa_key->tmp2) 1009 goto free_tmp1; 1010 1011 rsa_key->priv_form = FORM2; 1012 1013 rsa_key->dp = caam_read_rsa_crt(raw_key->dp, raw_key->dp_sz, p_sz); 1014 if (!rsa_key->dp) 1015 goto free_tmp2; 1016 1017 rsa_key->dq = caam_read_rsa_crt(raw_key->dq, raw_key->dq_sz, q_sz); 1018 if (!rsa_key->dq) 1019 goto free_dp; 1020 1021 rsa_key->qinv = caam_read_rsa_crt(raw_key->qinv, raw_key->qinv_sz, 1022 q_sz); 1023 if (!rsa_key->qinv) 1024 goto free_dq; 1025 1026 rsa_key->priv_form = FORM3; 1027 1028 return; 1029 1030 free_dq: 1031 kfree_sensitive(rsa_key->dq); 1032 free_dp: 1033 kfree_sensitive(rsa_key->dp); 1034 free_tmp2: 1035 kfree_sensitive(rsa_key->tmp2); 1036 free_tmp1: 1037 kfree_sensitive(rsa_key->tmp1); 1038 free_q: 1039 kfree_sensitive(rsa_key->q); 1040 free_p: 1041 kfree_sensitive(rsa_key->p); 1042 } 1043 1044 static int caam_rsa_set_priv_key(struct crypto_akcipher *tfm, const void *key, 1045 unsigned int keylen) 1046 { 1047 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 1048 struct rsa_key raw_key = {NULL}; 1049 struct caam_rsa_key *rsa_key = &ctx->key; 1050 int ret; 1051 1052 /* Free the old RSA key if any */ 1053 caam_rsa_free_key(rsa_key); 1054 1055 ret = rsa_parse_priv_key(&raw_key, key, keylen); 1056 if (ret) 1057 return ret; 1058 1059 /* Copy key in DMA zone */ 1060 rsa_key->d = kmemdup(raw_key.d, raw_key.d_sz, GFP_KERNEL); 1061 if (!rsa_key->d) 1062 goto err; 1063 1064 rsa_key->e = kmemdup(raw_key.e, raw_key.e_sz, GFP_KERNEL); 1065 if (!rsa_key->e) 1066 goto err; 1067 1068 /* 1069 * Skip leading zeros and copy the positive integer to a buffer 1070 * allocated in the GFP_KERNEL zone. The decryption descriptor 1071 * expects a positive integer for the RSA modulus and uses its length as 1072 * decryption output length. 1073 */ 1074 rsa_key->n = caam_read_raw_data(raw_key.n, &raw_key.n_sz); 1075 if (!rsa_key->n) 1076 goto err; 1077 1078 if (caam_rsa_check_key_length(raw_key.n_sz << 3)) { 1079 caam_rsa_free_key(rsa_key); 1080 return -EINVAL; 1081 } 1082 1083 rsa_key->d_sz = raw_key.d_sz; 1084 rsa_key->e_sz = raw_key.e_sz; 1085 rsa_key->n_sz = raw_key.n_sz; 1086 1087 caam_rsa_set_priv_key_form(ctx, &raw_key); 1088 1089 return 0; 1090 1091 err: 1092 caam_rsa_free_key(rsa_key); 1093 return -ENOMEM; 1094 } 1095 1096 static unsigned int caam_rsa_max_size(struct crypto_akcipher *tfm) 1097 { 1098 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 1099 1100 return ctx->key.n_sz; 1101 } 1102 1103 /* Per session pkc's driver context creation function */ 1104 static int caam_rsa_init_tfm(struct crypto_akcipher *tfm) 1105 { 1106 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 1107 1108 akcipher_set_reqsize(tfm, sizeof(struct caam_rsa_req_ctx)); 1109 1110 ctx->dev = caam_jr_alloc(); 1111 1112 if (IS_ERR(ctx->dev)) { 1113 pr_err("Job Ring Device allocation for transform failed\n"); 1114 return PTR_ERR(ctx->dev); 1115 } 1116 1117 ctx->padding_dma = dma_map_single(ctx->dev, zero_buffer, 1118 CAAM_RSA_MAX_INPUT_SIZE - 1, 1119 DMA_TO_DEVICE); 1120 if (dma_mapping_error(ctx->dev, ctx->padding_dma)) { 1121 dev_err(ctx->dev, "unable to map padding\n"); 1122 caam_jr_free(ctx->dev); 1123 return -ENOMEM; 1124 } 1125 1126 ctx->enginectx.op.do_one_request = akcipher_do_one_req; 1127 1128 return 0; 1129 } 1130 1131 /* Per session pkc's driver context cleanup function */ 1132 static void caam_rsa_exit_tfm(struct crypto_akcipher *tfm) 1133 { 1134 struct caam_rsa_ctx *ctx = akcipher_tfm_ctx_dma(tfm); 1135 struct caam_rsa_key *key = &ctx->key; 1136 1137 dma_unmap_single(ctx->dev, ctx->padding_dma, CAAM_RSA_MAX_INPUT_SIZE - 1138 1, DMA_TO_DEVICE); 1139 caam_rsa_free_key(key); 1140 caam_jr_free(ctx->dev); 1141 } 1142 1143 static struct caam_akcipher_alg caam_rsa = { 1144 .akcipher = { 1145 .encrypt = caam_rsa_enc, 1146 .decrypt = caam_rsa_dec, 1147 .set_pub_key = caam_rsa_set_pub_key, 1148 .set_priv_key = caam_rsa_set_priv_key, 1149 .max_size = caam_rsa_max_size, 1150 .init = caam_rsa_init_tfm, 1151 .exit = caam_rsa_exit_tfm, 1152 .base = { 1153 .cra_name = "rsa", 1154 .cra_driver_name = "rsa-caam", 1155 .cra_priority = 3000, 1156 .cra_module = THIS_MODULE, 1157 .cra_ctxsize = sizeof(struct caam_rsa_ctx) + 1158 CRYPTO_DMA_PADDING, 1159 }, 1160 } 1161 }; 1162 1163 /* Public Key Cryptography module initialization handler */ 1164 int caam_pkc_init(struct device *ctrldev) 1165 { 1166 struct caam_drv_private *priv = dev_get_drvdata(ctrldev); 1167 u32 pk_inst, pkha; 1168 int err; 1169 init_done = false; 1170 1171 /* Determine public key hardware accelerator presence. */ 1172 if (priv->era < 10) { 1173 pk_inst = (rd_reg32(&priv->jr[0]->perfmon.cha_num_ls) & 1174 CHA_ID_LS_PK_MASK) >> CHA_ID_LS_PK_SHIFT; 1175 } else { 1176 pkha = rd_reg32(&priv->jr[0]->vreg.pkha); 1177 pk_inst = pkha & CHA_VER_NUM_MASK; 1178 1179 /* 1180 * Newer CAAMs support partially disabled functionality. If this is the 1181 * case, the number is non-zero, but this bit is set to indicate that 1182 * no encryption or decryption is supported. Only signing and verifying 1183 * is supported. 1184 */ 1185 if (pkha & CHA_VER_MISC_PKHA_NO_CRYPT) 1186 pk_inst = 0; 1187 } 1188 1189 /* Do not register algorithms if PKHA is not present. */ 1190 if (!pk_inst) 1191 return 0; 1192 1193 /* allocate zero buffer, used for padding input */ 1194 zero_buffer = kzalloc(CAAM_RSA_MAX_INPUT_SIZE - 1, GFP_KERNEL); 1195 if (!zero_buffer) 1196 return -ENOMEM; 1197 1198 err = crypto_register_akcipher(&caam_rsa.akcipher); 1199 1200 if (err) { 1201 kfree(zero_buffer); 1202 dev_warn(ctrldev, "%s alg registration failed\n", 1203 caam_rsa.akcipher.base.cra_driver_name); 1204 } else { 1205 init_done = true; 1206 caam_rsa.registered = true; 1207 dev_info(ctrldev, "caam pkc algorithms registered in /proc/crypto\n"); 1208 } 1209 1210 return err; 1211 } 1212 1213 void caam_pkc_exit(void) 1214 { 1215 if (!init_done) 1216 return; 1217 1218 if (caam_rsa.registered) 1219 crypto_unregister_akcipher(&caam_rsa.akcipher); 1220 1221 kfree(zero_buffer); 1222 } 1223