1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2021 Aspeed Technology Inc. 4 */ 5 6 #include <linux/clk.h> 7 #include <linux/module.h> 8 #include <linux/of_address.h> 9 #include <linux/of_device.h> 10 #include <linux/of_irq.h> 11 #include <linux/of.h> 12 #include <linux/platform_device.h> 13 14 #include "aspeed-hace.h" 15 16 #ifdef CONFIG_CRYPTO_DEV_ASPEED_DEBUG 17 #define HACE_DBG(d, fmt, ...) \ 18 dev_info((d)->dev, "%s() " fmt, __func__, ##__VA_ARGS__) 19 #else 20 #define HACE_DBG(d, fmt, ...) \ 21 dev_dbg((d)->dev, "%s() " fmt, __func__, ##__VA_ARGS__) 22 #endif 23 24 /* HACE interrupt service routine */ 25 static irqreturn_t aspeed_hace_irq(int irq, void *dev) 26 { 27 struct aspeed_hace_dev *hace_dev = (struct aspeed_hace_dev *)dev; 28 struct aspeed_engine_crypto *crypto_engine = &hace_dev->crypto_engine; 29 struct aspeed_engine_hash *hash_engine = &hace_dev->hash_engine; 30 u32 sts; 31 32 sts = ast_hace_read(hace_dev, ASPEED_HACE_STS); 33 ast_hace_write(hace_dev, sts, ASPEED_HACE_STS); 34 35 HACE_DBG(hace_dev, "irq status: 0x%x\n", sts); 36 37 if (sts & HACE_HASH_ISR) { 38 if (hash_engine->flags & CRYPTO_FLAGS_BUSY) 39 tasklet_schedule(&hash_engine->done_task); 40 else 41 dev_warn(hace_dev->dev, "HASH no active requests.\n"); 42 } 43 44 if (sts & HACE_CRYPTO_ISR) { 45 if (crypto_engine->flags & CRYPTO_FLAGS_BUSY) 46 tasklet_schedule(&crypto_engine->done_task); 47 else 48 dev_warn(hace_dev->dev, "CRYPTO no active requests.\n"); 49 } 50 51 return IRQ_HANDLED; 52 } 53 54 static void aspeed_hace_crypto_done_task(unsigned long data) 55 { 56 struct aspeed_hace_dev *hace_dev = (struct aspeed_hace_dev *)data; 57 struct aspeed_engine_crypto *crypto_engine = &hace_dev->crypto_engine; 58 59 crypto_engine->resume(hace_dev); 60 } 61 62 static void aspeed_hace_hash_done_task(unsigned long data) 63 { 64 struct aspeed_hace_dev *hace_dev = (struct aspeed_hace_dev *)data; 65 struct aspeed_engine_hash *hash_engine = &hace_dev->hash_engine; 66 67 hash_engine->resume(hace_dev); 68 } 69 70 static void aspeed_hace_register(struct aspeed_hace_dev *hace_dev) 71 { 72 #ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_HASH 73 aspeed_register_hace_hash_algs(hace_dev); 74 #endif 75 #ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_CRYPTO 76 aspeed_register_hace_crypto_algs(hace_dev); 77 #endif 78 } 79 80 static void aspeed_hace_unregister(struct aspeed_hace_dev *hace_dev) 81 { 82 #ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_HASH 83 aspeed_unregister_hace_hash_algs(hace_dev); 84 #endif 85 #ifdef CONFIG_CRYPTO_DEV_ASPEED_HACE_CRYPTO 86 aspeed_unregister_hace_crypto_algs(hace_dev); 87 #endif 88 } 89 90 static const struct of_device_id aspeed_hace_of_matches[] = { 91 { .compatible = "aspeed,ast2500-hace", .data = (void *)5, }, 92 { .compatible = "aspeed,ast2600-hace", .data = (void *)6, }, 93 {}, 94 }; 95 96 static int aspeed_hace_probe(struct platform_device *pdev) 97 { 98 struct aspeed_engine_crypto *crypto_engine; 99 const struct of_device_id *hace_dev_id; 100 struct aspeed_engine_hash *hash_engine; 101 struct aspeed_hace_dev *hace_dev; 102 struct resource *res; 103 int rc; 104 105 hace_dev = devm_kzalloc(&pdev->dev, sizeof(struct aspeed_hace_dev), 106 GFP_KERNEL); 107 if (!hace_dev) 108 return -ENOMEM; 109 110 hace_dev_id = of_match_device(aspeed_hace_of_matches, &pdev->dev); 111 if (!hace_dev_id) { 112 dev_err(&pdev->dev, "Failed to match hace dev id\n"); 113 return -EINVAL; 114 } 115 116 hace_dev->dev = &pdev->dev; 117 hace_dev->version = (unsigned long)hace_dev_id->data; 118 hash_engine = &hace_dev->hash_engine; 119 crypto_engine = &hace_dev->crypto_engine; 120 121 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 122 123 platform_set_drvdata(pdev, hace_dev); 124 125 hace_dev->regs = devm_ioremap_resource(&pdev->dev, res); 126 if (!hace_dev->regs) { 127 dev_err(&pdev->dev, "Failed to map resources\n"); 128 return -ENOMEM; 129 } 130 131 /* Get irq number and register it */ 132 hace_dev->irq = platform_get_irq(pdev, 0); 133 if (!hace_dev->irq) { 134 dev_err(&pdev->dev, "Failed to get interrupt\n"); 135 return -ENXIO; 136 } 137 138 rc = devm_request_irq(&pdev->dev, hace_dev->irq, aspeed_hace_irq, 0, 139 dev_name(&pdev->dev), hace_dev); 140 if (rc) { 141 dev_err(&pdev->dev, "Failed to request interrupt\n"); 142 return rc; 143 } 144 145 /* Get clk and enable it */ 146 hace_dev->clk = devm_clk_get(&pdev->dev, NULL); 147 if (IS_ERR(hace_dev->clk)) { 148 dev_err(&pdev->dev, "Failed to get clk\n"); 149 return -ENODEV; 150 } 151 152 rc = clk_prepare_enable(hace_dev->clk); 153 if (rc) { 154 dev_err(&pdev->dev, "Failed to enable clock 0x%x\n", rc); 155 return rc; 156 } 157 158 /* Initialize crypto hardware engine structure for hash */ 159 hace_dev->crypt_engine_hash = crypto_engine_alloc_init(hace_dev->dev, 160 true); 161 if (!hace_dev->crypt_engine_hash) { 162 rc = -ENOMEM; 163 goto clk_exit; 164 } 165 166 rc = crypto_engine_start(hace_dev->crypt_engine_hash); 167 if (rc) 168 goto err_engine_hash_start; 169 170 tasklet_init(&hash_engine->done_task, aspeed_hace_hash_done_task, 171 (unsigned long)hace_dev); 172 173 /* Initialize crypto hardware engine structure for crypto */ 174 hace_dev->crypt_engine_crypto = crypto_engine_alloc_init(hace_dev->dev, 175 true); 176 if (!hace_dev->crypt_engine_crypto) { 177 rc = -ENOMEM; 178 goto err_engine_hash_start; 179 } 180 181 rc = crypto_engine_start(hace_dev->crypt_engine_crypto); 182 if (rc) 183 goto err_engine_crypto_start; 184 185 tasklet_init(&crypto_engine->done_task, aspeed_hace_crypto_done_task, 186 (unsigned long)hace_dev); 187 188 /* Allocate DMA buffer for hash engine input used */ 189 hash_engine->ahash_src_addr = 190 dmam_alloc_coherent(&pdev->dev, 191 ASPEED_HASH_SRC_DMA_BUF_LEN, 192 &hash_engine->ahash_src_dma_addr, 193 GFP_KERNEL); 194 if (!hash_engine->ahash_src_addr) { 195 dev_err(&pdev->dev, "Failed to allocate dma buffer\n"); 196 rc = -ENOMEM; 197 goto err_engine_crypto_start; 198 } 199 200 /* Allocate DMA buffer for crypto engine context used */ 201 crypto_engine->cipher_ctx = 202 dmam_alloc_coherent(&pdev->dev, 203 PAGE_SIZE, 204 &crypto_engine->cipher_ctx_dma, 205 GFP_KERNEL); 206 if (!crypto_engine->cipher_ctx) { 207 dev_err(&pdev->dev, "Failed to allocate cipher ctx dma\n"); 208 rc = -ENOMEM; 209 goto err_engine_crypto_start; 210 } 211 212 /* Allocate DMA buffer for crypto engine input used */ 213 crypto_engine->cipher_addr = 214 dmam_alloc_coherent(&pdev->dev, 215 ASPEED_CRYPTO_SRC_DMA_BUF_LEN, 216 &crypto_engine->cipher_dma_addr, 217 GFP_KERNEL); 218 if (!crypto_engine->cipher_addr) { 219 dev_err(&pdev->dev, "Failed to allocate cipher addr dma\n"); 220 rc = -ENOMEM; 221 goto err_engine_crypto_start; 222 } 223 224 /* Allocate DMA buffer for crypto engine output used */ 225 if (hace_dev->version == AST2600_VERSION) { 226 crypto_engine->dst_sg_addr = 227 dmam_alloc_coherent(&pdev->dev, 228 ASPEED_CRYPTO_DST_DMA_BUF_LEN, 229 &crypto_engine->dst_sg_dma_addr, 230 GFP_KERNEL); 231 if (!crypto_engine->dst_sg_addr) { 232 dev_err(&pdev->dev, "Failed to allocate dst_sg dma\n"); 233 rc = -ENOMEM; 234 goto err_engine_crypto_start; 235 } 236 } 237 238 aspeed_hace_register(hace_dev); 239 240 dev_info(&pdev->dev, "Aspeed Crypto Accelerator successfully registered\n"); 241 242 return 0; 243 244 err_engine_crypto_start: 245 crypto_engine_exit(hace_dev->crypt_engine_crypto); 246 err_engine_hash_start: 247 crypto_engine_exit(hace_dev->crypt_engine_hash); 248 clk_exit: 249 clk_disable_unprepare(hace_dev->clk); 250 251 return rc; 252 } 253 254 static int aspeed_hace_remove(struct platform_device *pdev) 255 { 256 struct aspeed_hace_dev *hace_dev = platform_get_drvdata(pdev); 257 struct aspeed_engine_crypto *crypto_engine = &hace_dev->crypto_engine; 258 struct aspeed_engine_hash *hash_engine = &hace_dev->hash_engine; 259 260 aspeed_hace_unregister(hace_dev); 261 262 crypto_engine_exit(hace_dev->crypt_engine_hash); 263 crypto_engine_exit(hace_dev->crypt_engine_crypto); 264 265 tasklet_kill(&hash_engine->done_task); 266 tasklet_kill(&crypto_engine->done_task); 267 268 clk_disable_unprepare(hace_dev->clk); 269 270 return 0; 271 } 272 273 MODULE_DEVICE_TABLE(of, aspeed_hace_of_matches); 274 275 static struct platform_driver aspeed_hace_driver = { 276 .probe = aspeed_hace_probe, 277 .remove = aspeed_hace_remove, 278 .driver = { 279 .name = KBUILD_MODNAME, 280 .of_match_table = aspeed_hace_of_matches, 281 }, 282 }; 283 284 module_platform_driver(aspeed_hace_driver); 285 286 MODULE_AUTHOR("Neal Liu <neal_liu@aspeedtech.com>"); 287 MODULE_DESCRIPTION("Aspeed HACE driver Crypto Accelerator"); 288 MODULE_LICENSE("GPL"); 289