xref: /linux/drivers/crypto/Kconfig (revision f63601fd616ab370774fa00ea10bcaaa9e48e84c)
1
2menuconfig CRYPTO_HW
3	bool "Hardware crypto devices"
4	default y
5	---help---
6	  Say Y here to get to see options for hardware crypto devices and
7	  processors. This option alone does not add any kernel code.
8
9	  If you say N, all options in this submenu will be skipped and disabled.
10
11if CRYPTO_HW
12
13config CRYPTO_DEV_PADLOCK
14	tristate "Support for VIA PadLock ACE"
15	depends on X86 && !UML
16	help
17	  Some VIA processors come with an integrated crypto engine
18	  (so called VIA PadLock ACE, Advanced Cryptography Engine)
19	  that provides instructions for very fast cryptographic
20	  operations with supported algorithms.
21
22	  The instructions are used only when the CPU supports them.
23	  Otherwise software encryption is used.
24
25config CRYPTO_DEV_PADLOCK_AES
26	tristate "PadLock driver for AES algorithm"
27	depends on CRYPTO_DEV_PADLOCK
28	select CRYPTO_BLKCIPHER
29	select CRYPTO_AES
30	help
31	  Use VIA PadLock for AES algorithm.
32
33	  Available in VIA C3 and newer CPUs.
34
35	  If unsure say M. The compiled module will be
36	  called padlock-aes.
37
38config CRYPTO_DEV_PADLOCK_SHA
39	tristate "PadLock driver for SHA1 and SHA256 algorithms"
40	depends on CRYPTO_DEV_PADLOCK
41	select CRYPTO_HASH
42	select CRYPTO_SHA1
43	select CRYPTO_SHA256
44	help
45	  Use VIA PadLock for SHA1/SHA256 algorithms.
46
47	  Available in VIA C7 and newer processors.
48
49	  If unsure say M. The compiled module will be
50	  called padlock-sha.
51
52config CRYPTO_DEV_GEODE
53	tristate "Support for the Geode LX AES engine"
54	depends on X86_32 && PCI
55	select CRYPTO_ALGAPI
56	select CRYPTO_BLKCIPHER
57	help
58	  Say 'Y' here to use the AMD Geode LX processor on-board AES
59	  engine for the CryptoAPI AES algorithm.
60
61	  To compile this driver as a module, choose M here: the module
62	  will be called geode-aes.
63
64config ZCRYPT
65	tristate "Support for PCI-attached cryptographic adapters"
66	depends on S390
67	select HW_RANDOM
68	help
69	  Select this option if you want to use a PCI-attached cryptographic
70	  adapter like:
71	  + PCI Cryptographic Accelerator (PCICA)
72	  + PCI Cryptographic Coprocessor (PCICC)
73	  + PCI-X Cryptographic Coprocessor (PCIXCC)
74	  + Crypto Express2 Coprocessor (CEX2C)
75	  + Crypto Express2 Accelerator (CEX2A)
76	  + Crypto Express3 Coprocessor (CEX3C)
77	  + Crypto Express3 Accelerator (CEX3A)
78
79config CRYPTO_SHA1_S390
80	tristate "SHA1 digest algorithm"
81	depends on S390
82	select CRYPTO_HASH
83	help
84	  This is the s390 hardware accelerated implementation of the
85	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
86
87	  It is available as of z990.
88
89config CRYPTO_SHA256_S390
90	tristate "SHA256 digest algorithm"
91	depends on S390
92	select CRYPTO_HASH
93	help
94	  This is the s390 hardware accelerated implementation of the
95	  SHA256 secure hash standard (DFIPS 180-2).
96
97	  It is available as of z9.
98
99config CRYPTO_SHA512_S390
100	tristate "SHA384 and SHA512 digest algorithm"
101	depends on S390
102	select CRYPTO_HASH
103	help
104	  This is the s390 hardware accelerated implementation of the
105	  SHA512 secure hash standard.
106
107	  It is available as of z10.
108
109config CRYPTO_DES_S390
110	tristate "DES and Triple DES cipher algorithms"
111	depends on S390
112	select CRYPTO_ALGAPI
113	select CRYPTO_BLKCIPHER
114	select CRYPTO_DES
115	help
116	  This is the s390 hardware accelerated implementation of the
117	  DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
118
119	  As of z990 the ECB and CBC mode are hardware accelerated.
120	  As of z196 the CTR mode is hardware accelerated.
121
122config CRYPTO_AES_S390
123	tristate "AES cipher algorithms"
124	depends on S390
125	select CRYPTO_ALGAPI
126	select CRYPTO_BLKCIPHER
127	help
128	  This is the s390 hardware accelerated implementation of the
129	  AES cipher algorithms (FIPS-197).
130
131	  As of z9 the ECB and CBC modes are hardware accelerated
132	  for 128 bit keys.
133	  As of z10 the ECB and CBC modes are hardware accelerated
134	  for all AES key sizes.
135	  As of z196 the CTR mode is hardware accelerated for all AES
136	  key sizes and XTS mode is hardware accelerated for 256 and
137	  512 bit keys.
138
139config S390_PRNG
140	tristate "Pseudo random number generator device driver"
141	depends on S390
142	default "m"
143	help
144	  Select this option if you want to use the s390 pseudo random number
145	  generator. The PRNG is part of the cryptographic processor functions
146	  and uses triple-DES to generate secure random numbers like the
147	  ANSI X9.17 standard. User-space programs access the
148	  pseudo-random-number device through the char device /dev/prandom.
149
150	  It is available as of z9.
151
152config CRYPTO_GHASH_S390
153	tristate "GHASH digest algorithm"
154	depends on S390
155	select CRYPTO_HASH
156	help
157	  This is the s390 hardware accelerated implementation of the
158	  GHASH message digest algorithm for GCM (Galois/Counter Mode).
159
160	  It is available as of z196.
161
162config CRYPTO_DEV_MV_CESA
163	tristate "Marvell's Cryptographic Engine"
164	depends on PLAT_ORION
165	select CRYPTO_AES
166	select CRYPTO_BLKCIPHER
167	select CRYPTO_HASH
168	select SRAM
169	help
170	  This driver allows you to utilize the Cryptographic Engines and
171	  Security Accelerator (CESA) which can be found on the Marvell Orion
172	  and Kirkwood SoCs, such as QNAP's TS-209.
173
174	  Currently the driver supports AES in ECB and CBC mode without DMA.
175
176config CRYPTO_DEV_MARVELL_CESA
177	tristate "New Marvell's Cryptographic Engine driver"
178	depends on (PLAT_ORION || ARCH_MVEBU || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
179	select CRYPTO_AES
180	select CRYPTO_DES
181	select CRYPTO_BLKCIPHER
182	select CRYPTO_HASH
183	select SRAM
184	help
185	  This driver allows you to utilize the Cryptographic Engines and
186	  Security Accelerator (CESA) which can be found on the Armada 370.
187
188	  This driver is aimed at replacing the mv_cesa driver. This will only
189	  happen once it has received proper testing.
190
191config CRYPTO_DEV_NIAGARA2
192       tristate "Niagara2 Stream Processing Unit driver"
193       select CRYPTO_DES
194       select CRYPTO_BLKCIPHER
195       select CRYPTO_HASH
196       depends on SPARC64
197       help
198	  Each core of a Niagara2 processor contains a Stream
199	  Processing Unit, which itself contains several cryptographic
200	  sub-units.  One set provides the Modular Arithmetic Unit,
201	  used for SSL offload.  The other set provides the Cipher
202	  Group, which can perform encryption, decryption, hashing,
203	  checksumming, and raw copies.
204
205config CRYPTO_DEV_HIFN_795X
206	tristate "Driver HIFN 795x crypto accelerator chips"
207	select CRYPTO_DES
208	select CRYPTO_BLKCIPHER
209	select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
210	depends on PCI
211	depends on !ARCH_DMA_ADDR_T_64BIT
212	help
213	  This option allows you to have support for HIFN 795x crypto adapters.
214
215config CRYPTO_DEV_HIFN_795X_RNG
216	bool "HIFN 795x random number generator"
217	depends on CRYPTO_DEV_HIFN_795X
218	help
219	  Select this option if you want to enable the random number generator
220	  on the HIFN 795x crypto adapters.
221
222source drivers/crypto/caam/Kconfig
223
224config CRYPTO_DEV_TALITOS
225	tristate "Talitos Freescale Security Engine (SEC)"
226	select CRYPTO_AEAD
227	select CRYPTO_AUTHENC
228	select CRYPTO_BLKCIPHER
229	select CRYPTO_HASH
230	select HW_RANDOM
231	depends on FSL_SOC
232	help
233	  Say 'Y' here to use the Freescale Security Engine (SEC)
234	  to offload cryptographic algorithm computation.
235
236	  The Freescale SEC is present on PowerQUICC 'E' processors, such
237	  as the MPC8349E and MPC8548E.
238
239	  To compile this driver as a module, choose M here: the module
240	  will be called talitos.
241
242config CRYPTO_DEV_TALITOS1
243	bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
244	depends on CRYPTO_DEV_TALITOS
245	depends on PPC_8xx || PPC_82xx
246	default y
247	help
248	  Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
249	  found on MPC82xx or the Freescale Security Engine (SEC Lite)
250	  version 1.2 found on MPC8xx
251
252config CRYPTO_DEV_TALITOS2
253	bool "SEC2+ (SEC version 2.0 or upper)"
254	depends on CRYPTO_DEV_TALITOS
255	default y if !PPC_8xx
256	help
257	  Say 'Y' here to use the Freescale Security Engine (SEC)
258	  version 2 and following as found on MPC83xx, MPC85xx, etc ...
259
260config CRYPTO_DEV_IXP4XX
261	tristate "Driver for IXP4xx crypto hardware acceleration"
262	depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
263	select CRYPTO_DES
264	select CRYPTO_AEAD
265	select CRYPTO_AUTHENC
266	select CRYPTO_BLKCIPHER
267	help
268	  Driver for the IXP4xx NPE crypto engine.
269
270config CRYPTO_DEV_PPC4XX
271	tristate "Driver AMCC PPC4xx crypto accelerator"
272	depends on PPC && 4xx
273	select CRYPTO_HASH
274	select CRYPTO_BLKCIPHER
275	help
276	  This option allows you to have support for AMCC crypto acceleration.
277
278config CRYPTO_DEV_OMAP_SHAM
279	tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
280	depends on ARCH_OMAP2PLUS
281	select CRYPTO_SHA1
282	select CRYPTO_MD5
283	select CRYPTO_SHA256
284	select CRYPTO_SHA512
285	select CRYPTO_HMAC
286	help
287	  OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
288	  want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
289
290config CRYPTO_DEV_OMAP_AES
291	tristate "Support for OMAP AES hw engine"
292	depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
293	select CRYPTO_AES
294	select CRYPTO_BLKCIPHER
295	help
296	  OMAP processors have AES module accelerator. Select this if you
297	  want to use the OMAP module for AES algorithms.
298
299config CRYPTO_DEV_OMAP_DES
300	tristate "Support for OMAP DES3DES hw engine"
301	depends on ARCH_OMAP2PLUS
302	select CRYPTO_DES
303	select CRYPTO_BLKCIPHER
304	help
305	  OMAP processors have DES/3DES module accelerator. Select this if you
306	  want to use the OMAP module for DES and 3DES algorithms. Currently
307	  the ECB and CBC modes of operation supported by the driver. Also
308	  accesses made on unaligned boundaries are also supported.
309
310config CRYPTO_DEV_PICOXCELL
311	tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
312	depends on ARCH_PICOXCELL && HAVE_CLK
313	select CRYPTO_AEAD
314	select CRYPTO_AES
315	select CRYPTO_AUTHENC
316	select CRYPTO_BLKCIPHER
317	select CRYPTO_DES
318	select CRYPTO_CBC
319	select CRYPTO_ECB
320	select CRYPTO_SEQIV
321	help
322	  This option enables support for the hardware offload engines in the
323	  Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
324	  and for 3gpp Layer 2 ciphering support.
325
326	  Saying m here will build a module named pipcoxcell_crypto.
327
328config CRYPTO_DEV_SAHARA
329	tristate "Support for SAHARA crypto accelerator"
330	depends on ARCH_MXC && OF
331	select CRYPTO_BLKCIPHER
332	select CRYPTO_AES
333	select CRYPTO_ECB
334	help
335	  This option enables support for the SAHARA HW crypto accelerator
336	  found in some Freescale i.MX chips.
337
338config CRYPTO_DEV_S5P
339	tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
340	depends on ARCH_S5PV210 || ARCH_EXYNOS
341	select CRYPTO_AES
342	select CRYPTO_BLKCIPHER
343	help
344	  This option allows you to have support for S5P crypto acceleration.
345	  Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
346	  algorithms execution.
347
348config CRYPTO_DEV_NX
349	bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
350	depends on PPC64
351	help
352	  This enables support for the NX hardware cryptographic accelerator
353	  coprocessor that is in IBM PowerPC P7+ or later processors.  This
354	  does not actually enable any drivers, it only allows you to select
355	  which acceleration type (encryption and/or compression) to enable.
356
357if CRYPTO_DEV_NX
358	source "drivers/crypto/nx/Kconfig"
359endif
360
361config CRYPTO_DEV_UX500
362	tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
363	depends on ARCH_U8500
364	help
365	  Driver for ST-Ericsson UX500 crypto engine.
366
367if CRYPTO_DEV_UX500
368	source "drivers/crypto/ux500/Kconfig"
369endif # if CRYPTO_DEV_UX500
370
371config CRYPTO_DEV_BFIN_CRC
372	tristate "Support for Blackfin CRC hardware"
373	depends on BF60x
374	help
375	  Newer Blackfin processors have CRC hardware. Select this if you
376	  want to use the Blackfin CRC module.
377
378config CRYPTO_DEV_ATMEL_AES
379	tristate "Support for Atmel AES hw accelerator"
380	depends on ARCH_AT91
381	select CRYPTO_AES
382	select CRYPTO_BLKCIPHER
383	select AT_HDMAC
384	help
385	  Some Atmel processors have AES hw accelerator.
386	  Select this if you want to use the Atmel module for
387	  AES algorithms.
388
389	  To compile this driver as a module, choose M here: the module
390	  will be called atmel-aes.
391
392config CRYPTO_DEV_ATMEL_TDES
393	tristate "Support for Atmel DES/TDES hw accelerator"
394	depends on ARCH_AT91
395	select CRYPTO_DES
396	select CRYPTO_BLKCIPHER
397	help
398	  Some Atmel processors have DES/TDES hw accelerator.
399	  Select this if you want to use the Atmel module for
400	  DES/TDES algorithms.
401
402	  To compile this driver as a module, choose M here: the module
403	  will be called atmel-tdes.
404
405config CRYPTO_DEV_ATMEL_SHA
406	tristate "Support for Atmel SHA hw accelerator"
407	depends on ARCH_AT91
408	select CRYPTO_HASH
409	help
410	  Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
411	  hw accelerator.
412	  Select this if you want to use the Atmel module for
413	  SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
414
415	  To compile this driver as a module, choose M here: the module
416	  will be called atmel-sha.
417
418config CRYPTO_DEV_CCP
419	bool "Support for AMD Cryptographic Coprocessor"
420	depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
421	help
422	  The AMD Cryptographic Coprocessor provides hardware support
423	  for encryption, hashing and related operations.
424
425if CRYPTO_DEV_CCP
426	source "drivers/crypto/ccp/Kconfig"
427endif
428
429config CRYPTO_DEV_MXS_DCP
430	tristate "Support for Freescale MXS DCP"
431	depends on ARCH_MXS
432	select CRYPTO_CBC
433	select CRYPTO_ECB
434	select CRYPTO_AES
435	select CRYPTO_BLKCIPHER
436	select CRYPTO_HASH
437	help
438	  The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
439	  co-processor on the die.
440
441	  To compile this driver as a module, choose M here: the module
442	  will be called mxs-dcp.
443
444source "drivers/crypto/qat/Kconfig"
445
446config CRYPTO_DEV_QCE
447	tristate "Qualcomm crypto engine accelerator"
448	depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
449	select CRYPTO_AES
450	select CRYPTO_DES
451	select CRYPTO_ECB
452	select CRYPTO_CBC
453	select CRYPTO_XTS
454	select CRYPTO_CTR
455	select CRYPTO_BLKCIPHER
456	help
457	  This driver supports Qualcomm crypto engine accelerator
458	  hardware. To compile this driver as a module, choose M here. The
459	  module will be called qcrypto.
460
461config CRYPTO_DEV_VMX
462	bool "Support for VMX cryptographic acceleration instructions"
463	depends on PPC64
464	help
465	  Support for VMX cryptographic acceleration instructions.
466
467source "drivers/crypto/vmx/Kconfig"
468
469config CRYPTO_DEV_IMGTEC_HASH
470	tristate "Imagination Technologies hardware hash accelerator"
471	depends on MIPS || COMPILE_TEST
472	depends on HAS_DMA
473	select CRYPTO_MD5
474	select CRYPTO_SHA1
475	select CRYPTO_SHA256
476	select CRYPTO_HASH
477	help
478	  This driver interfaces with the Imagination Technologies
479	  hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
480	  hashing algorithms.
481
482endif # CRYPTO_HW
483