1 2menuconfig CRYPTO_HW 3 bool "Hardware crypto devices" 4 default y 5 ---help--- 6 Say Y here to get to see options for hardware crypto devices and 7 processors. This option alone does not add any kernel code. 8 9 If you say N, all options in this submenu will be skipped and disabled. 10 11if CRYPTO_HW 12 13config CRYPTO_DEV_PADLOCK 14 tristate "Support for VIA PadLock ACE" 15 depends on X86 && !UML 16 help 17 Some VIA processors come with an integrated crypto engine 18 (so called VIA PadLock ACE, Advanced Cryptography Engine) 19 that provides instructions for very fast cryptographic 20 operations with supported algorithms. 21 22 The instructions are used only when the CPU supports them. 23 Otherwise software encryption is used. 24 25config CRYPTO_DEV_PADLOCK_AES 26 tristate "PadLock driver for AES algorithm" 27 depends on CRYPTO_DEV_PADLOCK 28 select CRYPTO_BLKCIPHER 29 select CRYPTO_AES 30 help 31 Use VIA PadLock for AES algorithm. 32 33 Available in VIA C3 and newer CPUs. 34 35 If unsure say M. The compiled module will be 36 called padlock-aes. 37 38config CRYPTO_DEV_PADLOCK_SHA 39 tristate "PadLock driver for SHA1 and SHA256 algorithms" 40 depends on CRYPTO_DEV_PADLOCK 41 select CRYPTO_HASH 42 select CRYPTO_SHA1 43 select CRYPTO_SHA256 44 help 45 Use VIA PadLock for SHA1/SHA256 algorithms. 46 47 Available in VIA C7 and newer processors. 48 49 If unsure say M. The compiled module will be 50 called padlock-sha. 51 52config CRYPTO_DEV_GEODE 53 tristate "Support for the Geode LX AES engine" 54 depends on X86_32 && PCI 55 select CRYPTO_ALGAPI 56 select CRYPTO_BLKCIPHER 57 help 58 Say 'Y' here to use the AMD Geode LX processor on-board AES 59 engine for the CryptoAPI AES algorithm. 60 61 To compile this driver as a module, choose M here: the module 62 will be called geode-aes. 63 64config ZCRYPT 65 tristate "Support for s390 cryptographic adapters" 66 depends on S390 67 select HW_RANDOM 68 help 69 Select this option if you want to enable support for 70 s390 cryptographic adapters like: 71 + PCI-X Cryptographic Coprocessor (PCIXCC) 72 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC) 73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA) 74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP) 75 76config PKEY 77 tristate "Kernel API for protected key handling" 78 depends on S390 79 depends on ZCRYPT 80 help 81 With this option enabled the pkey kernel module provides an API 82 for creation and handling of protected keys. Other parts of the 83 kernel or userspace applications may use these functions. 84 85 Select this option if you want to enable the kernel and userspace 86 API for proteced key handling. 87 88 Please note that creation of protected keys from secure keys 89 requires to have at least one CEX card in coprocessor mode 90 available at runtime. 91 92config CRYPTO_SHA1_S390 93 tristate "SHA1 digest algorithm" 94 depends on S390 95 select CRYPTO_HASH 96 help 97 This is the s390 hardware accelerated implementation of the 98 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 99 100 It is available as of z990. 101 102config CRYPTO_SHA256_S390 103 tristate "SHA256 digest algorithm" 104 depends on S390 105 select CRYPTO_HASH 106 help 107 This is the s390 hardware accelerated implementation of the 108 SHA256 secure hash standard (DFIPS 180-2). 109 110 It is available as of z9. 111 112config CRYPTO_SHA512_S390 113 tristate "SHA384 and SHA512 digest algorithm" 114 depends on S390 115 select CRYPTO_HASH 116 help 117 This is the s390 hardware accelerated implementation of the 118 SHA512 secure hash standard. 119 120 It is available as of z10. 121 122config CRYPTO_DES_S390 123 tristate "DES and Triple DES cipher algorithms" 124 depends on S390 125 select CRYPTO_ALGAPI 126 select CRYPTO_BLKCIPHER 127 select CRYPTO_DES 128 help 129 This is the s390 hardware accelerated implementation of the 130 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 131 132 As of z990 the ECB and CBC mode are hardware accelerated. 133 As of z196 the CTR mode is hardware accelerated. 134 135config CRYPTO_AES_S390 136 tristate "AES cipher algorithms" 137 depends on S390 138 select CRYPTO_ALGAPI 139 select CRYPTO_BLKCIPHER 140 select PKEY 141 help 142 This is the s390 hardware accelerated implementation of the 143 AES cipher algorithms (FIPS-197). 144 145 As of z9 the ECB and CBC modes are hardware accelerated 146 for 128 bit keys. 147 As of z10 the ECB and CBC modes are hardware accelerated 148 for all AES key sizes. 149 As of z196 the CTR mode is hardware accelerated for all AES 150 key sizes and XTS mode is hardware accelerated for 256 and 151 512 bit keys. 152 153config S390_PRNG 154 tristate "Pseudo random number generator device driver" 155 depends on S390 156 default "m" 157 help 158 Select this option if you want to use the s390 pseudo random number 159 generator. The PRNG is part of the cryptographic processor functions 160 and uses triple-DES to generate secure random numbers like the 161 ANSI X9.17 standard. User-space programs access the 162 pseudo-random-number device through the char device /dev/prandom. 163 164 It is available as of z9. 165 166config CRYPTO_GHASH_S390 167 tristate "GHASH digest algorithm" 168 depends on S390 169 select CRYPTO_HASH 170 help 171 This is the s390 hardware accelerated implementation of the 172 GHASH message digest algorithm for GCM (Galois/Counter Mode). 173 174 It is available as of z196. 175 176config CRYPTO_CRC32_S390 177 tristate "CRC-32 algorithms" 178 depends on S390 179 select CRYPTO_HASH 180 select CRC32 181 help 182 Select this option if you want to use hardware accelerated 183 implementations of CRC algorithms. With this option, you 184 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) 185 and CRC-32C (Castagnoli). 186 187 It is available with IBM z13 or later. 188 189config CRYPTO_DEV_MV_CESA 190 tristate "Marvell's Cryptographic Engine" 191 depends on PLAT_ORION 192 select CRYPTO_AES 193 select CRYPTO_BLKCIPHER 194 select CRYPTO_HASH 195 select SRAM 196 help 197 This driver allows you to utilize the Cryptographic Engines and 198 Security Accelerator (CESA) which can be found on the Marvell Orion 199 and Kirkwood SoCs, such as QNAP's TS-209. 200 201 Currently the driver supports AES in ECB and CBC mode without DMA. 202 203config CRYPTO_DEV_MARVELL_CESA 204 tristate "New Marvell's Cryptographic Engine driver" 205 depends on PLAT_ORION || ARCH_MVEBU 206 select CRYPTO_AES 207 select CRYPTO_DES 208 select CRYPTO_BLKCIPHER 209 select CRYPTO_HASH 210 select SRAM 211 help 212 This driver allows you to utilize the Cryptographic Engines and 213 Security Accelerator (CESA) which can be found on the Armada 370. 214 This driver supports CPU offload through DMA transfers. 215 216 This driver is aimed at replacing the mv_cesa driver. This will only 217 happen once it has received proper testing. 218 219config CRYPTO_DEV_NIAGARA2 220 tristate "Niagara2 Stream Processing Unit driver" 221 select CRYPTO_DES 222 select CRYPTO_BLKCIPHER 223 select CRYPTO_HASH 224 select CRYPTO_MD5 225 select CRYPTO_SHA1 226 select CRYPTO_SHA256 227 depends on SPARC64 228 help 229 Each core of a Niagara2 processor contains a Stream 230 Processing Unit, which itself contains several cryptographic 231 sub-units. One set provides the Modular Arithmetic Unit, 232 used for SSL offload. The other set provides the Cipher 233 Group, which can perform encryption, decryption, hashing, 234 checksumming, and raw copies. 235 236config CRYPTO_DEV_HIFN_795X 237 tristate "Driver HIFN 795x crypto accelerator chips" 238 select CRYPTO_DES 239 select CRYPTO_BLKCIPHER 240 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 241 depends on PCI 242 depends on !ARCH_DMA_ADDR_T_64BIT 243 help 244 This option allows you to have support for HIFN 795x crypto adapters. 245 246config CRYPTO_DEV_HIFN_795X_RNG 247 bool "HIFN 795x random number generator" 248 depends on CRYPTO_DEV_HIFN_795X 249 help 250 Select this option if you want to enable the random number generator 251 on the HIFN 795x crypto adapters. 252 253source drivers/crypto/caam/Kconfig 254 255config CRYPTO_DEV_TALITOS 256 tristate "Talitos Freescale Security Engine (SEC)" 257 select CRYPTO_AEAD 258 select CRYPTO_AUTHENC 259 select CRYPTO_BLKCIPHER 260 select CRYPTO_HASH 261 select HW_RANDOM 262 depends on FSL_SOC 263 help 264 Say 'Y' here to use the Freescale Security Engine (SEC) 265 to offload cryptographic algorithm computation. 266 267 The Freescale SEC is present on PowerQUICC 'E' processors, such 268 as the MPC8349E and MPC8548E. 269 270 To compile this driver as a module, choose M here: the module 271 will be called talitos. 272 273config CRYPTO_DEV_TALITOS1 274 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 275 depends on CRYPTO_DEV_TALITOS 276 depends on PPC_8xx || PPC_82xx 277 default y 278 help 279 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 280 found on MPC82xx or the Freescale Security Engine (SEC Lite) 281 version 1.2 found on MPC8xx 282 283config CRYPTO_DEV_TALITOS2 284 bool "SEC2+ (SEC version 2.0 or upper)" 285 depends on CRYPTO_DEV_TALITOS 286 default y if !PPC_8xx 287 help 288 Say 'Y' here to use the Freescale Security Engine (SEC) 289 version 2 and following as found on MPC83xx, MPC85xx, etc ... 290 291config CRYPTO_DEV_IXP4XX 292 tristate "Driver for IXP4xx crypto hardware acceleration" 293 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE 294 select CRYPTO_DES 295 select CRYPTO_AEAD 296 select CRYPTO_AUTHENC 297 select CRYPTO_BLKCIPHER 298 help 299 Driver for the IXP4xx NPE crypto engine. 300 301config CRYPTO_DEV_PPC4XX 302 tristate "Driver AMCC PPC4xx crypto accelerator" 303 depends on PPC && 4xx 304 select CRYPTO_HASH 305 select CRYPTO_BLKCIPHER 306 help 307 This option allows you to have support for AMCC crypto acceleration. 308 309config HW_RANDOM_PPC4XX 310 bool "PowerPC 4xx generic true random number generator support" 311 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM 312 default y 313 ---help--- 314 This option provides the kernel-side support for the TRNG hardware 315 found in the security function of some PowerPC 4xx SoCs. 316 317config CRYPTO_DEV_OMAP_SHAM 318 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 319 depends on ARCH_OMAP2PLUS 320 select CRYPTO_SHA1 321 select CRYPTO_MD5 322 select CRYPTO_SHA256 323 select CRYPTO_SHA512 324 select CRYPTO_HMAC 325 help 326 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 327 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 328 329config CRYPTO_DEV_OMAP_AES 330 tristate "Support for OMAP AES hw engine" 331 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 332 select CRYPTO_AES 333 select CRYPTO_BLKCIPHER 334 select CRYPTO_ENGINE 335 select CRYPTO_CBC 336 select CRYPTO_ECB 337 select CRYPTO_CTR 338 help 339 OMAP processors have AES module accelerator. Select this if you 340 want to use the OMAP module for AES algorithms. 341 342config CRYPTO_DEV_OMAP_DES 343 tristate "Support for OMAP DES/3DES hw engine" 344 depends on ARCH_OMAP2PLUS 345 select CRYPTO_DES 346 select CRYPTO_BLKCIPHER 347 select CRYPTO_ENGINE 348 help 349 OMAP processors have DES/3DES module accelerator. Select this if you 350 want to use the OMAP module for DES and 3DES algorithms. Currently 351 the ECB and CBC modes of operation are supported by the driver. Also 352 accesses made on unaligned boundaries are supported. 353 354config CRYPTO_DEV_PICOXCELL 355 tristate "Support for picoXcell IPSEC and Layer2 crypto engines" 356 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK 357 select CRYPTO_AEAD 358 select CRYPTO_AES 359 select CRYPTO_AUTHENC 360 select CRYPTO_BLKCIPHER 361 select CRYPTO_DES 362 select CRYPTO_CBC 363 select CRYPTO_ECB 364 select CRYPTO_SEQIV 365 help 366 This option enables support for the hardware offload engines in the 367 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload 368 and for 3gpp Layer 2 ciphering support. 369 370 Saying m here will build a module named pipcoxcell_crypto. 371 372config CRYPTO_DEV_SAHARA 373 tristate "Support for SAHARA crypto accelerator" 374 depends on ARCH_MXC && OF 375 select CRYPTO_BLKCIPHER 376 select CRYPTO_AES 377 select CRYPTO_ECB 378 help 379 This option enables support for the SAHARA HW crypto accelerator 380 found in some Freescale i.MX chips. 381 382config CRYPTO_DEV_MXC_SCC 383 tristate "Support for Freescale Security Controller (SCC)" 384 depends on ARCH_MXC && OF 385 select CRYPTO_BLKCIPHER 386 select CRYPTO_DES 387 help 388 This option enables support for the Security Controller (SCC) 389 found in Freescale i.MX25 chips. 390 391config CRYPTO_DEV_EXYNOS_RNG 392 tristate "EXYNOS HW pseudo random number generator support" 393 depends on ARCH_EXYNOS || COMPILE_TEST 394 depends on HAS_IOMEM 395 select CRYPTO_RNG 396 ---help--- 397 This driver provides kernel-side support through the 398 cryptographic API for the pseudo random number generator hardware 399 found on Exynos SoCs. 400 401 To compile this driver as a module, choose M here: the 402 module will be called exynos-rng. 403 404 If unsure, say Y. 405 406config CRYPTO_DEV_S5P 407 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 408 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 409 depends on HAS_IOMEM && HAS_DMA 410 select CRYPTO_AES 411 select CRYPTO_BLKCIPHER 412 help 413 This option allows you to have support for S5P crypto acceleration. 414 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 415 algorithms execution. 416 417config CRYPTO_DEV_NX 418 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 419 depends on PPC64 420 help 421 This enables support for the NX hardware cryptographic accelerator 422 coprocessor that is in IBM PowerPC P7+ or later processors. This 423 does not actually enable any drivers, it only allows you to select 424 which acceleration type (encryption and/or compression) to enable. 425 426if CRYPTO_DEV_NX 427 source "drivers/crypto/nx/Kconfig" 428endif 429 430config CRYPTO_DEV_UX500 431 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" 432 depends on ARCH_U8500 433 help 434 Driver for ST-Ericsson UX500 crypto engine. 435 436if CRYPTO_DEV_UX500 437 source "drivers/crypto/ux500/Kconfig" 438endif # if CRYPTO_DEV_UX500 439 440config CRYPTO_DEV_BFIN_CRC 441 tristate "Support for Blackfin CRC hardware" 442 depends on BF60x 443 help 444 Newer Blackfin processors have CRC hardware. Select this if you 445 want to use the Blackfin CRC module. 446 447config CRYPTO_DEV_ATMEL_AUTHENC 448 tristate "Support for Atmel IPSEC/SSL hw accelerator" 449 depends on HAS_DMA 450 depends on ARCH_AT91 || COMPILE_TEST 451 select CRYPTO_AUTHENC 452 select CRYPTO_DEV_ATMEL_AES 453 select CRYPTO_DEV_ATMEL_SHA 454 help 455 Some Atmel processors can combine the AES and SHA hw accelerators 456 to enhance support of IPSEC/SSL. 457 Select this if you want to use the Atmel modules for 458 authenc(hmac(shaX),Y(cbc)) algorithms. 459 460config CRYPTO_DEV_ATMEL_AES 461 tristate "Support for Atmel AES hw accelerator" 462 depends on HAS_DMA 463 depends on ARCH_AT91 || COMPILE_TEST 464 select CRYPTO_AES 465 select CRYPTO_AEAD 466 select CRYPTO_BLKCIPHER 467 help 468 Some Atmel processors have AES hw accelerator. 469 Select this if you want to use the Atmel module for 470 AES algorithms. 471 472 To compile this driver as a module, choose M here: the module 473 will be called atmel-aes. 474 475config CRYPTO_DEV_ATMEL_TDES 476 tristate "Support for Atmel DES/TDES hw accelerator" 477 depends on HAS_DMA 478 depends on ARCH_AT91 || COMPILE_TEST 479 select CRYPTO_DES 480 select CRYPTO_BLKCIPHER 481 help 482 Some Atmel processors have DES/TDES hw accelerator. 483 Select this if you want to use the Atmel module for 484 DES/TDES algorithms. 485 486 To compile this driver as a module, choose M here: the module 487 will be called atmel-tdes. 488 489config CRYPTO_DEV_ATMEL_SHA 490 tristate "Support for Atmel SHA hw accelerator" 491 depends on HAS_DMA 492 depends on ARCH_AT91 || COMPILE_TEST 493 select CRYPTO_HASH 494 help 495 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 496 hw accelerator. 497 Select this if you want to use the Atmel module for 498 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 499 500 To compile this driver as a module, choose M here: the module 501 will be called atmel-sha. 502 503config CRYPTO_DEV_CCP 504 bool "Support for AMD Cryptographic Coprocessor" 505 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 506 help 507 The AMD Cryptographic Coprocessor provides hardware offload support 508 for encryption, hashing and related operations. 509 510if CRYPTO_DEV_CCP 511 source "drivers/crypto/ccp/Kconfig" 512endif 513 514config CRYPTO_DEV_MXS_DCP 515 tristate "Support for Freescale MXS DCP" 516 depends on (ARCH_MXS || ARCH_MXC) 517 select STMP_DEVICE 518 select CRYPTO_CBC 519 select CRYPTO_ECB 520 select CRYPTO_AES 521 select CRYPTO_BLKCIPHER 522 select CRYPTO_HASH 523 help 524 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 525 co-processor on the die. 526 527 To compile this driver as a module, choose M here: the module 528 will be called mxs-dcp. 529 530source "drivers/crypto/qat/Kconfig" 531source "drivers/crypto/cavium/cpt/Kconfig" 532 533config CRYPTO_DEV_CAVIUM_ZIP 534 tristate "Cavium ZIP driver" 535 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 536 ---help--- 537 Select this option if you want to enable compression/decompression 538 acceleration on Cavium's ARM based SoCs 539 540config CRYPTO_DEV_QCE 541 tristate "Qualcomm crypto engine accelerator" 542 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM 543 select CRYPTO_AES 544 select CRYPTO_DES 545 select CRYPTO_ECB 546 select CRYPTO_CBC 547 select CRYPTO_XTS 548 select CRYPTO_CTR 549 select CRYPTO_BLKCIPHER 550 help 551 This driver supports Qualcomm crypto engine accelerator 552 hardware. To compile this driver as a module, choose M here. The 553 module will be called qcrypto. 554 555config CRYPTO_DEV_VMX 556 bool "Support for VMX cryptographic acceleration instructions" 557 depends on PPC64 && VSX 558 help 559 Support for VMX cryptographic acceleration instructions. 560 561source "drivers/crypto/vmx/Kconfig" 562 563config CRYPTO_DEV_IMGTEC_HASH 564 tristate "Imagination Technologies hardware hash accelerator" 565 depends on MIPS || COMPILE_TEST 566 depends on HAS_DMA 567 select CRYPTO_MD5 568 select CRYPTO_SHA1 569 select CRYPTO_SHA256 570 select CRYPTO_HASH 571 help 572 This driver interfaces with the Imagination Technologies 573 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 574 hashing algorithms. 575 576config CRYPTO_DEV_SUN4I_SS 577 tristate "Support for Allwinner Security System cryptographic accelerator" 578 depends on ARCH_SUNXI && !64BIT 579 select CRYPTO_MD5 580 select CRYPTO_SHA1 581 select CRYPTO_AES 582 select CRYPTO_DES 583 select CRYPTO_BLKCIPHER 584 help 585 Some Allwinner SoC have a crypto accelerator named 586 Security System. Select this if you want to use it. 587 The Security System handle AES/DES/3DES ciphers in CBC mode 588 and SHA1 and MD5 hash algorithms. 589 590 To compile this driver as a module, choose M here: the module 591 will be called sun4i-ss. 592 593config CRYPTO_DEV_ROCKCHIP 594 tristate "Rockchip's Cryptographic Engine driver" 595 depends on OF && ARCH_ROCKCHIP 596 select CRYPTO_AES 597 select CRYPTO_DES 598 select CRYPTO_MD5 599 select CRYPTO_SHA1 600 select CRYPTO_SHA256 601 select CRYPTO_HASH 602 select CRYPTO_BLKCIPHER 603 604 help 605 This driver interfaces with the hardware crypto accelerator. 606 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 607 608config CRYPTO_DEV_MEDIATEK 609 tristate "MediaTek's EIP97 Cryptographic Engine driver" 610 depends on HAS_DMA 611 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST 612 select CRYPTO_AES 613 select CRYPTO_AEAD 614 select CRYPTO_BLKCIPHER 615 select CRYPTO_CTR 616 select CRYPTO_SHA1 617 select CRYPTO_SHA256 618 select CRYPTO_SHA512 619 select CRYPTO_HMAC 620 help 621 This driver allows you to utilize the hardware crypto accelerator 622 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... 623 Select this if you want to use it for AES/SHA1/SHA2 algorithms. 624 625source "drivers/crypto/chelsio/Kconfig" 626 627source "drivers/crypto/virtio/Kconfig" 628 629config CRYPTO_DEV_BCM_SPU 630 tristate "Broadcom symmetric crypto/hash acceleration support" 631 depends on ARCH_BCM_IPROC 632 depends on BCM_PDC_MBOX 633 default m 634 select CRYPTO_DES 635 select CRYPTO_MD5 636 select CRYPTO_SHA1 637 select CRYPTO_SHA256 638 select CRYPTO_SHA512 639 help 640 This driver provides support for Broadcom crypto acceleration using the 641 Secure Processing Unit (SPU). The SPU driver registers ablkcipher, 642 ahash, and aead algorithms with the kernel cryptographic API. 643 644source "drivers/crypto/stm32/Kconfig" 645 646endif # CRYPTO_HW 647