1# SPDX-License-Identifier: GPL-2.0-only 2 3menuconfig CRYPTO_HW 4 bool "Hardware crypto devices" 5 default y 6 help 7 Say Y here to get to see options for hardware crypto devices and 8 processors. This option alone does not add any kernel code. 9 10 If you say N, all options in this submenu will be skipped and disabled. 11 12if CRYPTO_HW 13 14source "drivers/crypto/allwinner/Kconfig" 15 16config CRYPTO_DEV_PADLOCK 17 tristate "Support for VIA PadLock ACE" 18 depends on X86 && !UML 19 help 20 Some VIA processors come with an integrated crypto engine 21 (so called VIA PadLock ACE, Advanced Cryptography Engine) 22 that provides instructions for very fast cryptographic 23 operations with supported algorithms. 24 25 The instructions are used only when the CPU supports them. 26 Otherwise software encryption is used. 27 28config CRYPTO_DEV_PADLOCK_AES 29 tristate "PadLock driver for AES algorithm" 30 depends on CRYPTO_DEV_PADLOCK 31 select CRYPTO_SKCIPHER 32 select CRYPTO_LIB_AES 33 help 34 Use VIA PadLock for AES algorithm. 35 36 Available in VIA C3 and newer CPUs. 37 38 If unsure say M. The compiled module will be 39 called padlock-aes. 40 41config CRYPTO_DEV_PADLOCK_SHA 42 tristate "PadLock driver for SHA1 and SHA256 algorithms" 43 depends on CRYPTO_DEV_PADLOCK 44 select CRYPTO_HASH 45 select CRYPTO_SHA1 46 select CRYPTO_SHA256 47 help 48 Use VIA PadLock for SHA1/SHA256 algorithms. 49 50 Available in VIA C7 and newer processors. 51 52 If unsure say M. The compiled module will be 53 called padlock-sha. 54 55config CRYPTO_DEV_GEODE 56 tristate "Support for the Geode LX AES engine" 57 depends on X86_32 && PCI 58 select CRYPTO_ALGAPI 59 select CRYPTO_SKCIPHER 60 help 61 Say 'Y' here to use the AMD Geode LX processor on-board AES 62 engine for the CryptoAPI AES algorithm. 63 64 To compile this driver as a module, choose M here: the module 65 will be called geode-aes. 66 67config ZCRYPT 68 tristate "Support for s390 cryptographic adapters" 69 depends on S390 70 depends on AP 71 select HW_RANDOM 72 help 73 Select this option if you want to enable support for 74 s390 cryptographic adapters like Crypto Express 4 up 75 to 8 in Coprocessor (CEXxC), EP11 Coprocessor (CEXxP) 76 or Accelerator (CEXxA) mode. 77 78config PKEY 79 tristate "Kernel API for protected key handling" 80 depends on S390 81 depends on ZCRYPT 82 help 83 With this option enabled the pkey kernel module provides an API 84 for creation and handling of protected keys. Other parts of the 85 kernel or userspace applications may use these functions. 86 87 Select this option if you want to enable the kernel and userspace 88 API for proteced key handling. 89 90 Please note that creation of protected keys from secure keys 91 requires to have at least one CEX card in coprocessor mode 92 available at runtime. 93 94config CRYPTO_PAES_S390 95 tristate "PAES cipher algorithms" 96 depends on S390 97 depends on ZCRYPT 98 depends on PKEY 99 select CRYPTO_ALGAPI 100 select CRYPTO_SKCIPHER 101 help 102 This is the s390 hardware accelerated implementation of the 103 AES cipher algorithms for use with protected key. 104 105 Select this option if you want to use the paes cipher 106 for example to use protected key encrypted devices. 107 108config S390_PRNG 109 tristate "Pseudo random number generator device driver" 110 depends on S390 111 default "m" 112 help 113 Select this option if you want to use the s390 pseudo random number 114 generator. The PRNG is part of the cryptographic processor functions 115 and uses triple-DES to generate secure random numbers like the 116 ANSI X9.17 standard. User-space programs access the 117 pseudo-random-number device through the char device /dev/prandom. 118 119 It is available as of z9. 120 121config CRYPTO_DEV_NIAGARA2 122 tristate "Niagara2 Stream Processing Unit driver" 123 select CRYPTO_LIB_DES 124 select CRYPTO_SKCIPHER 125 select CRYPTO_HASH 126 select CRYPTO_MD5 127 select CRYPTO_SHA1 128 select CRYPTO_SHA256 129 depends on SPARC64 130 help 131 Each core of a Niagara2 processor contains a Stream 132 Processing Unit, which itself contains several cryptographic 133 sub-units. One set provides the Modular Arithmetic Unit, 134 used for SSL offload. The other set provides the Cipher 135 Group, which can perform encryption, decryption, hashing, 136 checksumming, and raw copies. 137 138config CRYPTO_DEV_SL3516 139 tristate "Storlink SL3516 crypto offloader" 140 depends on ARCH_GEMINI || COMPILE_TEST 141 depends on HAS_IOMEM && PM 142 select CRYPTO_SKCIPHER 143 select CRYPTO_ENGINE 144 select CRYPTO_ECB 145 select CRYPTO_AES 146 select HW_RANDOM 147 help 148 This option allows you to have support for SL3516 crypto offloader. 149 150config CRYPTO_DEV_SL3516_DEBUG 151 bool "Enable SL3516 stats" 152 depends on CRYPTO_DEV_SL3516 153 depends on DEBUG_FS 154 help 155 Say y to enable SL3516 debug stats. 156 This will create /sys/kernel/debug/sl3516/stats for displaying 157 the number of requests per algorithm and other internal stats. 158 159config CRYPTO_DEV_HIFN_795X 160 tristate "Driver HIFN 795x crypto accelerator chips" 161 select CRYPTO_LIB_DES 162 select CRYPTO_SKCIPHER 163 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 164 depends on PCI 165 depends on !ARCH_DMA_ADDR_T_64BIT 166 help 167 This option allows you to have support for HIFN 795x crypto adapters. 168 169config CRYPTO_DEV_HIFN_795X_RNG 170 bool "HIFN 795x random number generator" 171 depends on CRYPTO_DEV_HIFN_795X 172 help 173 Select this option if you want to enable the random number generator 174 on the HIFN 795x crypto adapters. 175 176source "drivers/crypto/caam/Kconfig" 177 178config CRYPTO_DEV_TALITOS 179 tristate "Talitos Freescale Security Engine (SEC)" 180 select CRYPTO_AEAD 181 select CRYPTO_AUTHENC 182 select CRYPTO_SKCIPHER 183 select CRYPTO_HASH 184 select CRYPTO_LIB_DES 185 select HW_RANDOM 186 depends on FSL_SOC 187 help 188 Say 'Y' here to use the Freescale Security Engine (SEC) 189 to offload cryptographic algorithm computation. 190 191 The Freescale SEC is present on PowerQUICC 'E' processors, such 192 as the MPC8349E and MPC8548E. 193 194 To compile this driver as a module, choose M here: the module 195 will be called talitos. 196 197config CRYPTO_DEV_TALITOS1 198 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 199 depends on CRYPTO_DEV_TALITOS 200 depends on PPC_8xx || PPC_82xx 201 default y 202 help 203 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 204 found on MPC82xx or the Freescale Security Engine (SEC Lite) 205 version 1.2 found on MPC8xx 206 207config CRYPTO_DEV_TALITOS2 208 bool "SEC2+ (SEC version 2.0 or upper)" 209 depends on CRYPTO_DEV_TALITOS 210 default y if !PPC_8xx 211 help 212 Say 'Y' here to use the Freescale Security Engine (SEC) 213 version 2 and following as found on MPC83xx, MPC85xx, etc ... 214 215config CRYPTO_DEV_PPC4XX 216 tristate "Driver AMCC PPC4xx crypto accelerator" 217 depends on PPC && 4xx 218 select CRYPTO_HASH 219 select CRYPTO_AEAD 220 select CRYPTO_AES 221 select CRYPTO_LIB_AES 222 select CRYPTO_CCM 223 select CRYPTO_CTR 224 select CRYPTO_GCM 225 select CRYPTO_SKCIPHER 226 help 227 This option allows you to have support for AMCC crypto acceleration. 228 229config HW_RANDOM_PPC4XX 230 bool "PowerPC 4xx generic true random number generator support" 231 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y 232 default y 233 help 234 This option provides the kernel-side support for the TRNG hardware 235 found in the security function of some PowerPC 4xx SoCs. 236 237config CRYPTO_DEV_OMAP 238 tristate "Support for OMAP crypto HW accelerators" 239 depends on ARCH_OMAP2PLUS 240 help 241 OMAP processors have various crypto HW accelerators. Select this if 242 you want to use the OMAP modules for any of the crypto algorithms. 243 244if CRYPTO_DEV_OMAP 245 246config CRYPTO_DEV_OMAP_SHAM 247 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 248 depends on ARCH_OMAP2PLUS 249 select CRYPTO_ENGINE 250 select CRYPTO_SHA1 251 select CRYPTO_MD5 252 select CRYPTO_SHA256 253 select CRYPTO_SHA512 254 select CRYPTO_HMAC 255 help 256 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 257 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 258 259config CRYPTO_DEV_OMAP_AES 260 tristate "Support for OMAP AES hw engine" 261 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 262 select CRYPTO_AES 263 select CRYPTO_SKCIPHER 264 select CRYPTO_ENGINE 265 select CRYPTO_CBC 266 select CRYPTO_ECB 267 select CRYPTO_CTR 268 select CRYPTO_AEAD 269 help 270 OMAP processors have AES module accelerator. Select this if you 271 want to use the OMAP module for AES algorithms. 272 273config CRYPTO_DEV_OMAP_DES 274 tristate "Support for OMAP DES/3DES hw engine" 275 depends on ARCH_OMAP2PLUS 276 select CRYPTO_LIB_DES 277 select CRYPTO_SKCIPHER 278 select CRYPTO_ENGINE 279 help 280 OMAP processors have DES/3DES module accelerator. Select this if you 281 want to use the OMAP module for DES and 3DES algorithms. Currently 282 the ECB and CBC modes of operation are supported by the driver. Also 283 accesses made on unaligned boundaries are supported. 284 285endif # CRYPTO_DEV_OMAP 286 287config CRYPTO_DEV_SAHARA 288 tristate "Support for SAHARA crypto accelerator" 289 depends on ARCH_MXC && OF 290 select CRYPTO_SKCIPHER 291 select CRYPTO_AES 292 select CRYPTO_ECB 293 select CRYPTO_ENGINE 294 help 295 This option enables support for the SAHARA HW crypto accelerator 296 found in some Freescale i.MX chips. 297 298config CRYPTO_DEV_EXYNOS_RNG 299 tristate "Exynos HW pseudo random number generator support" 300 depends on ARCH_EXYNOS || COMPILE_TEST 301 depends on HAS_IOMEM 302 select CRYPTO_RNG 303 help 304 This driver provides kernel-side support through the 305 cryptographic API for the pseudo random number generator hardware 306 found on Exynos SoCs. 307 308 To compile this driver as a module, choose M here: the 309 module will be called exynos-rng. 310 311 If unsure, say Y. 312 313config CRYPTO_DEV_S5P 314 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 315 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 316 depends on HAS_IOMEM 317 select CRYPTO_AES 318 select CRYPTO_SKCIPHER 319 help 320 This option allows you to have support for S5P crypto acceleration. 321 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 322 algorithms execution. 323 324config CRYPTO_DEV_EXYNOS_HASH 325 bool "Support for Samsung Exynos HASH accelerator" 326 depends on CRYPTO_DEV_S5P 327 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m 328 select CRYPTO_SHA1 329 select CRYPTO_MD5 330 select CRYPTO_SHA256 331 help 332 Select this to offload Exynos from HASH MD5/SHA1/SHA256. 333 This will select software SHA1, MD5 and SHA256 as they are 334 needed for small and zero-size messages. 335 HASH algorithms will be disabled if EXYNOS_RNG 336 is enabled due to hw conflict. 337 338config CRYPTO_DEV_NX 339 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 340 depends on PPC64 341 help 342 This enables support for the NX hardware cryptographic accelerator 343 coprocessor that is in IBM PowerPC P7+ or later processors. This 344 does not actually enable any drivers, it only allows you to select 345 which acceleration type (encryption and/or compression) to enable. 346 347if CRYPTO_DEV_NX 348 source "drivers/crypto/nx/Kconfig" 349endif 350 351config CRYPTO_DEV_ATMEL_AUTHENC 352 bool "Support for Atmel IPSEC/SSL hw accelerator" 353 depends on ARCH_AT91 || COMPILE_TEST 354 depends on CRYPTO_DEV_ATMEL_AES 355 help 356 Some Atmel processors can combine the AES and SHA hw accelerators 357 to enhance support of IPSEC/SSL. 358 Select this if you want to use the Atmel modules for 359 authenc(hmac(shaX),Y(cbc)) algorithms. 360 361config CRYPTO_DEV_ATMEL_AES 362 tristate "Support for Atmel AES hw accelerator" 363 depends on ARCH_AT91 || COMPILE_TEST 364 select CRYPTO_AES 365 select CRYPTO_AEAD 366 select CRYPTO_SKCIPHER 367 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC 368 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC 369 help 370 Some Atmel processors have AES hw accelerator. 371 Select this if you want to use the Atmel module for 372 AES algorithms. 373 374 To compile this driver as a module, choose M here: the module 375 will be called atmel-aes. 376 377config CRYPTO_DEV_ATMEL_TDES 378 tristate "Support for Atmel DES/TDES hw accelerator" 379 depends on ARCH_AT91 || COMPILE_TEST 380 select CRYPTO_LIB_DES 381 select CRYPTO_SKCIPHER 382 help 383 Some Atmel processors have DES/TDES hw accelerator. 384 Select this if you want to use the Atmel module for 385 DES/TDES algorithms. 386 387 To compile this driver as a module, choose M here: the module 388 will be called atmel-tdes. 389 390config CRYPTO_DEV_ATMEL_SHA 391 tristate "Support for Atmel SHA hw accelerator" 392 depends on ARCH_AT91 || COMPILE_TEST 393 select CRYPTO_HASH 394 help 395 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 396 hw accelerator. 397 Select this if you want to use the Atmel module for 398 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 399 400 To compile this driver as a module, choose M here: the module 401 will be called atmel-sha. 402 403config CRYPTO_DEV_ATMEL_I2C 404 tristate 405 select BITREVERSE 406 407config CRYPTO_DEV_ATMEL_ECC 408 tristate "Support for Microchip / Atmel ECC hw accelerator" 409 depends on I2C 410 select CRYPTO_DEV_ATMEL_I2C 411 select CRYPTO_ECDH 412 select CRC16 413 help 414 Microhip / Atmel ECC hw accelerator. 415 Select this if you want to use the Microchip / Atmel module for 416 ECDH algorithm. 417 418 To compile this driver as a module, choose M here: the module 419 will be called atmel-ecc. 420 421config CRYPTO_DEV_ATMEL_SHA204A 422 tristate "Support for Microchip / Atmel SHA accelerator and RNG" 423 depends on I2C 424 select CRYPTO_DEV_ATMEL_I2C 425 select HW_RANDOM 426 select CRC16 427 help 428 Microhip / Atmel SHA accelerator and RNG. 429 Select this if you want to use the Microchip / Atmel SHA204A 430 module as a random number generator. (Other functions of the 431 chip are currently not exposed by this driver) 432 433 To compile this driver as a module, choose M here: the module 434 will be called atmel-sha204a. 435 436config CRYPTO_DEV_CCP 437 bool "Support for AMD Secure Processor" 438 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 439 help 440 The AMD Secure Processor provides support for the Cryptographic Coprocessor 441 (CCP) and the Platform Security Processor (PSP) devices. 442 443if CRYPTO_DEV_CCP 444 source "drivers/crypto/ccp/Kconfig" 445endif 446 447config CRYPTO_DEV_MXS_DCP 448 tristate "Support for Freescale MXS DCP" 449 depends on (ARCH_MXS || ARCH_MXC) 450 select STMP_DEVICE 451 select CRYPTO_CBC 452 select CRYPTO_ECB 453 select CRYPTO_AES 454 select CRYPTO_SKCIPHER 455 select CRYPTO_HASH 456 help 457 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 458 co-processor on the die. 459 460 To compile this driver as a module, choose M here: the module 461 will be called mxs-dcp. 462 463source "drivers/crypto/cavium/cpt/Kconfig" 464source "drivers/crypto/cavium/nitrox/Kconfig" 465source "drivers/crypto/marvell/Kconfig" 466source "drivers/crypto/intel/Kconfig" 467 468config CRYPTO_DEV_CAVIUM_ZIP 469 tristate "Cavium ZIP driver" 470 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 471 help 472 Select this option if you want to enable compression/decompression 473 acceleration on Cavium's ARM based SoCs 474 475config CRYPTO_DEV_QCE 476 tristate "Qualcomm crypto engine accelerator" 477 depends on ARCH_QCOM || COMPILE_TEST 478 depends on HAS_IOMEM 479 help 480 This driver supports Qualcomm crypto engine accelerator 481 hardware. To compile this driver as a module, choose M here. The 482 module will be called qcrypto. 483 484config CRYPTO_DEV_QCE_SKCIPHER 485 bool 486 depends on CRYPTO_DEV_QCE 487 select CRYPTO_AES 488 select CRYPTO_LIB_DES 489 select CRYPTO_ECB 490 select CRYPTO_CBC 491 select CRYPTO_XTS 492 select CRYPTO_CTR 493 select CRYPTO_SKCIPHER 494 495config CRYPTO_DEV_QCE_SHA 496 bool 497 depends on CRYPTO_DEV_QCE 498 select CRYPTO_SHA1 499 select CRYPTO_SHA256 500 501config CRYPTO_DEV_QCE_AEAD 502 bool 503 depends on CRYPTO_DEV_QCE 504 select CRYPTO_AUTHENC 505 select CRYPTO_LIB_DES 506 507choice 508 prompt "Algorithms enabled for QCE acceleration" 509 default CRYPTO_DEV_QCE_ENABLE_ALL 510 depends on CRYPTO_DEV_QCE 511 help 512 This option allows to choose whether to build support for all algorithms 513 (default), hashes-only, or skciphers-only. 514 515 The QCE engine does not appear to scale as well as the CPU to handle 516 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the 517 QCE handles only 2 requests in parallel. 518 519 Ipsec throughput seems to improve when disabling either family of 520 algorithms, sharing the load with the CPU. Enabling skciphers-only 521 appears to work best. 522 523 config CRYPTO_DEV_QCE_ENABLE_ALL 524 bool "All supported algorithms" 525 select CRYPTO_DEV_QCE_SKCIPHER 526 select CRYPTO_DEV_QCE_SHA 527 select CRYPTO_DEV_QCE_AEAD 528 help 529 Enable all supported algorithms: 530 - AES (CBC, CTR, ECB, XTS) 531 - 3DES (CBC, ECB) 532 - DES (CBC, ECB) 533 - SHA1, HMAC-SHA1 534 - SHA256, HMAC-SHA256 535 536 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER 537 bool "Symmetric-key ciphers only" 538 select CRYPTO_DEV_QCE_SKCIPHER 539 help 540 Enable symmetric-key ciphers only: 541 - AES (CBC, CTR, ECB, XTS) 542 - 3DES (ECB, CBC) 543 - DES (ECB, CBC) 544 545 config CRYPTO_DEV_QCE_ENABLE_SHA 546 bool "Hash/HMAC only" 547 select CRYPTO_DEV_QCE_SHA 548 help 549 Enable hashes/HMAC algorithms only: 550 - SHA1, HMAC-SHA1 551 - SHA256, HMAC-SHA256 552 553 config CRYPTO_DEV_QCE_ENABLE_AEAD 554 bool "AEAD algorithms only" 555 select CRYPTO_DEV_QCE_AEAD 556 help 557 Enable AEAD algorithms only: 558 - authenc() 559 - ccm(aes) 560 - rfc4309(ccm(aes)) 561endchoice 562 563config CRYPTO_DEV_QCE_SW_MAX_LEN 564 int "Default maximum request size to use software for AES" 565 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER 566 default 512 567 help 568 This sets the default maximum request size to perform AES requests 569 using software instead of the crypto engine. It can be changed by 570 setting the aes_sw_max_len parameter. 571 572 Small blocks are processed faster in software than hardware. 573 Considering the 256-bit ciphers, software is 2-3 times faster than 574 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes. 575 With 128-bit keys, the break-even point would be around 1024-bytes. 576 577 The default is set a little lower, to 512 bytes, to balance the 578 cost in CPU usage. The minimum recommended setting is 16-bytes 579 (1 AES block), since AES-GCM will fail if you set it lower. 580 Setting this to zero will send all requests to the hardware. 581 582 Note that 192-bit keys are not supported by the hardware and are 583 always processed by the software fallback, and all DES requests 584 are done by the hardware. 585 586config CRYPTO_DEV_QCOM_RNG 587 tristate "Qualcomm Random Number Generator Driver" 588 depends on ARCH_QCOM || COMPILE_TEST 589 depends on HW_RANDOM 590 select CRYPTO_RNG 591 help 592 This driver provides support for the Random Number 593 Generator hardware found on Qualcomm SoCs. 594 595 To compile this driver as a module, choose M here. The 596 module will be called qcom-rng. If unsure, say N. 597 598#config CRYPTO_DEV_VMX 599# bool "Support for VMX cryptographic acceleration instructions" 600# depends on PPC64 && VSX 601# help 602# Support for VMX cryptographic acceleration instructions. 603# 604#source "drivers/crypto/vmx/Kconfig" 605 606config CRYPTO_DEV_IMGTEC_HASH 607 tristate "Imagination Technologies hardware hash accelerator" 608 depends on MIPS || COMPILE_TEST 609 select CRYPTO_MD5 610 select CRYPTO_SHA1 611 select CRYPTO_SHA256 612 select CRYPTO_HASH 613 help 614 This driver interfaces with the Imagination Technologies 615 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 616 hashing algorithms. 617 618config CRYPTO_DEV_ROCKCHIP 619 tristate "Rockchip's Cryptographic Engine driver" 620 depends on OF && ARCH_ROCKCHIP 621 depends on PM 622 select CRYPTO_ECB 623 select CRYPTO_CBC 624 select CRYPTO_DES 625 select CRYPTO_AES 626 select CRYPTO_ENGINE 627 select CRYPTO_LIB_DES 628 select CRYPTO_MD5 629 select CRYPTO_SHA1 630 select CRYPTO_SHA256 631 select CRYPTO_HASH 632 select CRYPTO_SKCIPHER 633 634 help 635 This driver interfaces with the hardware crypto accelerator. 636 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 637 638config CRYPTO_DEV_ROCKCHIP_DEBUG 639 bool "Enable Rockchip crypto stats" 640 depends on CRYPTO_DEV_ROCKCHIP 641 depends on DEBUG_FS 642 help 643 Say y to enable Rockchip crypto debug stats. 644 This will create /sys/kernel/debug/rk3288_crypto/stats for displaying 645 the number of requests per algorithm and other internal stats. 646 647config CRYPTO_DEV_TEGRA 648 tristate "Enable Tegra Security Engine" 649 depends on TEGRA_HOST1X 650 select CRYPTO_ENGINE 651 652 help 653 Select this to enable Tegra Security Engine which accelerates various 654 AES encryption/decryption and HASH algorithms. 655 656config CRYPTO_DEV_ZYNQMP_AES 657 tristate "Support for Xilinx ZynqMP AES hw accelerator" 658 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 659 select CRYPTO_AES 660 select CRYPTO_ENGINE 661 select CRYPTO_AEAD 662 help 663 Xilinx ZynqMP has AES-GCM engine used for symmetric key 664 encryption and decryption. This driver interfaces with AES hw 665 accelerator. Select this if you want to use the ZynqMP module 666 for AES algorithms. 667 668config CRYPTO_DEV_ZYNQMP_SHA3 669 tristate "Support for Xilinx ZynqMP SHA3 hardware accelerator" 670 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 671 select CRYPTO_SHA3 672 help 673 Xilinx ZynqMP has SHA3 engine used for secure hash calculation. 674 This driver interfaces with SHA3 hardware engine. 675 Select this if you want to use the ZynqMP module 676 for SHA3 hash computation. 677 678source "drivers/crypto/chelsio/Kconfig" 679 680source "drivers/crypto/virtio/Kconfig" 681 682config CRYPTO_DEV_BCM_SPU 683 tristate "Broadcom symmetric crypto/hash acceleration support" 684 depends on ARCH_BCM_IPROC 685 depends on MAILBOX 686 default m 687 select CRYPTO_AUTHENC 688 select CRYPTO_LIB_DES 689 select CRYPTO_MD5 690 select CRYPTO_SHA1 691 select CRYPTO_SHA256 692 select CRYPTO_SHA512 693 help 694 This driver provides support for Broadcom crypto acceleration using the 695 Secure Processing Unit (SPU). The SPU driver registers skcipher, 696 ahash, and aead algorithms with the kernel cryptographic API. 697 698source "drivers/crypto/stm32/Kconfig" 699 700config CRYPTO_DEV_SAFEXCEL 701 tristate "Inside Secure's SafeXcel cryptographic engine driver" 702 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM 703 select CRYPTO_LIB_AES 704 select CRYPTO_AUTHENC 705 select CRYPTO_SKCIPHER 706 select CRYPTO_LIB_DES 707 select CRYPTO_HASH 708 select CRYPTO_HMAC 709 select CRYPTO_MD5 710 select CRYPTO_SHA1 711 select CRYPTO_SHA256 712 select CRYPTO_SHA512 713 select CRYPTO_CHACHA20POLY1305 714 select CRYPTO_SHA3 715 help 716 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic 717 engines designed by Inside Secure. It currently accelerates DES, 3DES and 718 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, 719 SHA384 and SHA512 hash algorithms for both basic hash and HMAC. 720 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. 721 722config CRYPTO_DEV_ARTPEC6 723 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." 724 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) 725 depends on OF 726 select CRYPTO_AEAD 727 select CRYPTO_AES 728 select CRYPTO_ALGAPI 729 select CRYPTO_SKCIPHER 730 select CRYPTO_CTR 731 select CRYPTO_HASH 732 select CRYPTO_SHA1 733 select CRYPTO_SHA256 734 select CRYPTO_SHA512 735 help 736 Enables the driver for the on-chip crypto accelerator 737 of Axis ARTPEC SoCs. 738 739 To compile this driver as a module, choose M here. 740 741config CRYPTO_DEV_CCREE 742 tristate "Support for ARM TrustZone CryptoCell family of security processors" 743 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA 744 depends on HAS_IOMEM 745 select CRYPTO_HASH 746 select CRYPTO_SKCIPHER 747 select CRYPTO_LIB_DES 748 select CRYPTO_AEAD 749 select CRYPTO_AUTHENC 750 select CRYPTO_SHA1 751 select CRYPTO_MD5 752 select CRYPTO_SHA256 753 select CRYPTO_SHA512 754 select CRYPTO_HMAC 755 select CRYPTO_AES 756 select CRYPTO_CBC 757 select CRYPTO_ECB 758 select CRYPTO_CTR 759 select CRYPTO_XTS 760 select CRYPTO_SM4_GENERIC 761 select CRYPTO_SM3_GENERIC 762 help 763 Say 'Y' to enable a driver for the REE interface of the Arm 764 TrustZone CryptoCell family of processors. Currently the 765 CryptoCell 713, 703, 712, 710 and 630 are supported. 766 Choose this if you wish to use hardware acceleration of 767 cryptographic operations on the system REE. 768 If unsure say Y. 769 770source "drivers/crypto/hisilicon/Kconfig" 771 772source "drivers/crypto/amlogic/Kconfig" 773 774config CRYPTO_DEV_SA2UL 775 tristate "Support for TI security accelerator" 776 depends on ARCH_K3 || COMPILE_TEST 777 select CRYPTO_AES 778 select CRYPTO_ALGAPI 779 select CRYPTO_AUTHENC 780 select CRYPTO_DES 781 select CRYPTO_SHA1 782 select CRYPTO_SHA256 783 select CRYPTO_SHA512 784 select HW_RANDOM 785 select SG_SPLIT 786 help 787 K3 devices include a security accelerator engine that may be 788 used for crypto offload. Select this if you want to use hardware 789 acceleration for cryptographic algorithms on these devices. 790 791source "drivers/crypto/aspeed/Kconfig" 792source "drivers/crypto/starfive/Kconfig" 793 794endif # CRYPTO_HW 795