xref: /linux/drivers/crypto/Kconfig (revision 46c5338db7bd45b2cf99570560f00389d60fd6b4)
1# SPDX-License-Identifier: GPL-2.0-only
2
3menuconfig CRYPTO_HW
4	bool "Hardware crypto devices"
5	default y
6	help
7	  Say Y here to get to see options for hardware crypto devices and
8	  processors. This option alone does not add any kernel code.
9
10	  If you say N, all options in this submenu will be skipped and disabled.
11
12if CRYPTO_HW
13
14source "drivers/crypto/allwinner/Kconfig"
15
16config CRYPTO_DEV_PADLOCK
17	tristate "Support for VIA PadLock ACE"
18	depends on X86 && !UML
19	help
20	  Some VIA processors come with an integrated crypto engine
21	  (so called VIA PadLock ACE, Advanced Cryptography Engine)
22	  that provides instructions for very fast cryptographic
23	  operations with supported algorithms.
24
25	  The instructions are used only when the CPU supports them.
26	  Otherwise software encryption is used.
27
28config CRYPTO_DEV_PADLOCK_AES
29	tristate "PadLock driver for AES algorithm"
30	depends on CRYPTO_DEV_PADLOCK
31	select CRYPTO_SKCIPHER
32	select CRYPTO_LIB_AES
33	help
34	  Use VIA PadLock for AES algorithm.
35
36	  Available in VIA C3 and newer CPUs.
37
38	  If unsure say M. The compiled module will be
39	  called padlock-aes.
40
41config CRYPTO_DEV_PADLOCK_SHA
42	tristate "PadLock driver for SHA1 and SHA256 algorithms"
43	depends on CRYPTO_DEV_PADLOCK
44	select CRYPTO_HASH
45	select CRYPTO_SHA1
46	select CRYPTO_SHA256
47	help
48	  Use VIA PadLock for SHA1/SHA256 algorithms.
49
50	  Available in VIA C7 and newer processors.
51
52	  If unsure say M. The compiled module will be
53	  called padlock-sha.
54
55config CRYPTO_DEV_GEODE
56	tristate "Support for the Geode LX AES engine"
57	depends on X86_32 && PCI
58	select CRYPTO_ALGAPI
59	select CRYPTO_SKCIPHER
60	help
61	  Say 'Y' here to use the AMD Geode LX processor on-board AES
62	  engine for the CryptoAPI AES algorithm.
63
64	  To compile this driver as a module, choose M here: the module
65	  will be called geode-aes.
66
67config ZCRYPT
68	tristate "Support for s390 cryptographic adapters"
69	depends on S390
70	select HW_RANDOM
71	help
72	  Select this option if you want to enable support for
73	  s390 cryptographic adapters like:
74	  + Crypto Express 2 up to 7 Coprocessor (CEXxC)
75	  + Crypto Express 2 up to 7 Accelerator (CEXxA)
76	  + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP)
77
78config ZCRYPT_DEBUG
79	bool "Enable debug features for s390 cryptographic adapters"
80	default n
81	depends on DEBUG_KERNEL
82	depends on ZCRYPT
83	help
84	  Say 'Y' here to enable some additional debug features on the
85	  s390 cryptographic adapters driver.
86
87	  There will be some more sysfs attributes displayed for ap cards
88	  and queues and some flags on crypto requests are interpreted as
89	  debugging messages to force error injection.
90
91	  Do not enable on production level kernel build.
92
93	  If unsure, say N.
94
95config ZCRYPT_MULTIDEVNODES
96	bool "Support for multiple zcrypt device nodes"
97	default y
98	depends on S390
99	depends on ZCRYPT
100	help
101	  With this option enabled the zcrypt device driver can
102	  provide multiple devices nodes in /dev. Each device
103	  node can get customized to limit access and narrow
104	  down the use of the available crypto hardware.
105
106config PKEY
107	tristate "Kernel API for protected key handling"
108	depends on S390
109	depends on ZCRYPT
110	help
111	  With this option enabled the pkey kernel module provides an API
112	  for creation and handling of protected keys. Other parts of the
113	  kernel or userspace applications may use these functions.
114
115	  Select this option if you want to enable the kernel and userspace
116	  API for proteced key handling.
117
118	  Please note that creation of protected keys from secure keys
119	  requires to have at least one CEX card in coprocessor mode
120	  available at runtime.
121
122config CRYPTO_PAES_S390
123	tristate "PAES cipher algorithms"
124	depends on S390
125	depends on ZCRYPT
126	depends on PKEY
127	select CRYPTO_ALGAPI
128	select CRYPTO_SKCIPHER
129	help
130	  This is the s390 hardware accelerated implementation of the
131	  AES cipher algorithms for use with protected key.
132
133	  Select this option if you want to use the paes cipher
134	  for example to use protected key encrypted devices.
135
136config CRYPTO_SHA1_S390
137	tristate "SHA1 digest algorithm"
138	depends on S390
139	select CRYPTO_HASH
140	help
141	  This is the s390 hardware accelerated implementation of the
142	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
143
144	  It is available as of z990.
145
146config CRYPTO_SHA256_S390
147	tristate "SHA256 digest algorithm"
148	depends on S390
149	select CRYPTO_HASH
150	help
151	  This is the s390 hardware accelerated implementation of the
152	  SHA256 secure hash standard (DFIPS 180-2).
153
154	  It is available as of z9.
155
156config CRYPTO_SHA512_S390
157	tristate "SHA384 and SHA512 digest algorithm"
158	depends on S390
159	select CRYPTO_HASH
160	help
161	  This is the s390 hardware accelerated implementation of the
162	  SHA512 secure hash standard.
163
164	  It is available as of z10.
165
166config CRYPTO_SHA3_256_S390
167	tristate "SHA3_224 and SHA3_256 digest algorithm"
168	depends on S390
169	select CRYPTO_HASH
170	help
171	  This is the s390 hardware accelerated implementation of the
172	  SHA3_256 secure hash standard.
173
174	  It is available as of z14.
175
176config CRYPTO_SHA3_512_S390
177	tristate "SHA3_384 and SHA3_512 digest algorithm"
178	depends on S390
179	select CRYPTO_HASH
180	help
181	  This is the s390 hardware accelerated implementation of the
182	  SHA3_512 secure hash standard.
183
184	  It is available as of z14.
185
186config CRYPTO_DES_S390
187	tristate "DES and Triple DES cipher algorithms"
188	depends on S390
189	select CRYPTO_ALGAPI
190	select CRYPTO_SKCIPHER
191	select CRYPTO_LIB_DES
192	help
193	  This is the s390 hardware accelerated implementation of the
194	  DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
195
196	  As of z990 the ECB and CBC mode are hardware accelerated.
197	  As of z196 the CTR mode is hardware accelerated.
198
199config CRYPTO_AES_S390
200	tristate "AES cipher algorithms"
201	depends on S390
202	select CRYPTO_ALGAPI
203	select CRYPTO_SKCIPHER
204	help
205	  This is the s390 hardware accelerated implementation of the
206	  AES cipher algorithms (FIPS-197).
207
208	  As of z9 the ECB and CBC modes are hardware accelerated
209	  for 128 bit keys.
210	  As of z10 the ECB and CBC modes are hardware accelerated
211	  for all AES key sizes.
212	  As of z196 the CTR mode is hardware accelerated for all AES
213	  key sizes and XTS mode is hardware accelerated for 256 and
214	  512 bit keys.
215
216config S390_PRNG
217	tristate "Pseudo random number generator device driver"
218	depends on S390
219	default "m"
220	help
221	  Select this option if you want to use the s390 pseudo random number
222	  generator. The PRNG is part of the cryptographic processor functions
223	  and uses triple-DES to generate secure random numbers like the
224	  ANSI X9.17 standard. User-space programs access the
225	  pseudo-random-number device through the char device /dev/prandom.
226
227	  It is available as of z9.
228
229config CRYPTO_GHASH_S390
230	tristate "GHASH hash function"
231	depends on S390
232	select CRYPTO_HASH
233	help
234	  This is the s390 hardware accelerated implementation of GHASH,
235	  the hash function used in GCM (Galois/Counter mode).
236
237	  It is available as of z196.
238
239config CRYPTO_CRC32_S390
240	tristate "CRC-32 algorithms"
241	depends on S390
242	select CRYPTO_HASH
243	select CRC32
244	help
245	  Select this option if you want to use hardware accelerated
246	  implementations of CRC algorithms.  With this option, you
247	  can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
248	  and CRC-32C (Castagnoli).
249
250	  It is available with IBM z13 or later.
251
252config CRYPTO_DEV_NIAGARA2
253	tristate "Niagara2 Stream Processing Unit driver"
254	select CRYPTO_LIB_DES
255	select CRYPTO_SKCIPHER
256	select CRYPTO_HASH
257	select CRYPTO_MD5
258	select CRYPTO_SHA1
259	select CRYPTO_SHA256
260	depends on SPARC64
261	help
262	  Each core of a Niagara2 processor contains a Stream
263	  Processing Unit, which itself contains several cryptographic
264	  sub-units.  One set provides the Modular Arithmetic Unit,
265	  used for SSL offload.  The other set provides the Cipher
266	  Group, which can perform encryption, decryption, hashing,
267	  checksumming, and raw copies.
268
269config CRYPTO_DEV_SL3516
270	tristate "Stormlink SL3516 crypto offloader"
271	select CRYPTO_SKCIPHER
272	select CRYPTO_ENGINE
273	select CRYPTO_ECB
274	select CRYPTO_AES
275	select HW_RANDOM
276	help
277	  This option allows you to have support for SL3516 crypto offloader.
278
279config CRYPTO_DEV_SL3516_DEBUG
280	bool "Enable SL3516 stats"
281	depends on CRYPTO_DEV_SL3516
282	depends on DEBUG_FS
283	help
284	  Say y to enable SL3516 debug stats.
285	  This will create /sys/kernel/debug/sl3516/stats for displaying
286	  the number of requests per algorithm and other internal stats.
287
288config CRYPTO_DEV_HIFN_795X
289	tristate "Driver HIFN 795x crypto accelerator chips"
290	select CRYPTO_LIB_DES
291	select CRYPTO_SKCIPHER
292	select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
293	depends on PCI
294	depends on !ARCH_DMA_ADDR_T_64BIT
295	help
296	  This option allows you to have support for HIFN 795x crypto adapters.
297
298config CRYPTO_DEV_HIFN_795X_RNG
299	bool "HIFN 795x random number generator"
300	depends on CRYPTO_DEV_HIFN_795X
301	help
302	  Select this option if you want to enable the random number generator
303	  on the HIFN 795x crypto adapters.
304
305source "drivers/crypto/caam/Kconfig"
306
307config CRYPTO_DEV_TALITOS
308	tristate "Talitos Freescale Security Engine (SEC)"
309	select CRYPTO_AEAD
310	select CRYPTO_AUTHENC
311	select CRYPTO_SKCIPHER
312	select CRYPTO_HASH
313	select CRYPTO_LIB_DES
314	select HW_RANDOM
315	depends on FSL_SOC
316	help
317	  Say 'Y' here to use the Freescale Security Engine (SEC)
318	  to offload cryptographic algorithm computation.
319
320	  The Freescale SEC is present on PowerQUICC 'E' processors, such
321	  as the MPC8349E and MPC8548E.
322
323	  To compile this driver as a module, choose M here: the module
324	  will be called talitos.
325
326config CRYPTO_DEV_TALITOS1
327	bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
328	depends on CRYPTO_DEV_TALITOS
329	depends on PPC_8xx || PPC_82xx
330	default y
331	help
332	  Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
333	  found on MPC82xx or the Freescale Security Engine (SEC Lite)
334	  version 1.2 found on MPC8xx
335
336config CRYPTO_DEV_TALITOS2
337	bool "SEC2+ (SEC version 2.0 or upper)"
338	depends on CRYPTO_DEV_TALITOS
339	default y if !PPC_8xx
340	help
341	  Say 'Y' here to use the Freescale Security Engine (SEC)
342	  version 2 and following as found on MPC83xx, MPC85xx, etc ...
343
344config CRYPTO_DEV_IXP4XX
345	tristate "Driver for IXP4xx crypto hardware acceleration"
346	depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
347	select CRYPTO_AES
348	select CRYPTO_DES
349	select CRYPTO_ECB
350	select CRYPTO_CBC
351	select CRYPTO_CTR
352	select CRYPTO_LIB_DES
353	select CRYPTO_AEAD
354	select CRYPTO_AUTHENC
355	select CRYPTO_SKCIPHER
356	help
357	  Driver for the IXP4xx NPE crypto engine.
358
359config CRYPTO_DEV_PPC4XX
360	tristate "Driver AMCC PPC4xx crypto accelerator"
361	depends on PPC && 4xx
362	select CRYPTO_HASH
363	select CRYPTO_AEAD
364	select CRYPTO_AES
365	select CRYPTO_LIB_AES
366	select CRYPTO_CCM
367	select CRYPTO_CTR
368	select CRYPTO_GCM
369	select CRYPTO_SKCIPHER
370	help
371	  This option allows you to have support for AMCC crypto acceleration.
372
373config HW_RANDOM_PPC4XX
374	bool "PowerPC 4xx generic true random number generator support"
375	depends on CRYPTO_DEV_PPC4XX && HW_RANDOM=y
376	default y
377	help
378	 This option provides the kernel-side support for the TRNG hardware
379	 found in the security function of some PowerPC 4xx SoCs.
380
381config CRYPTO_DEV_OMAP
382	tristate "Support for OMAP crypto HW accelerators"
383	depends on ARCH_OMAP2PLUS
384	help
385	  OMAP processors have various crypto HW accelerators. Select this if
386	  you want to use the OMAP modules for any of the crypto algorithms.
387
388if CRYPTO_DEV_OMAP
389
390config CRYPTO_DEV_OMAP_SHAM
391	tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
392	depends on ARCH_OMAP2PLUS
393	select CRYPTO_ENGINE
394	select CRYPTO_SHA1
395	select CRYPTO_MD5
396	select CRYPTO_SHA256
397	select CRYPTO_SHA512
398	select CRYPTO_HMAC
399	help
400	  OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
401	  want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
402
403config CRYPTO_DEV_OMAP_AES
404	tristate "Support for OMAP AES hw engine"
405	depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
406	select CRYPTO_AES
407	select CRYPTO_SKCIPHER
408	select CRYPTO_ENGINE
409	select CRYPTO_CBC
410	select CRYPTO_ECB
411	select CRYPTO_CTR
412	select CRYPTO_AEAD
413	help
414	  OMAP processors have AES module accelerator. Select this if you
415	  want to use the OMAP module for AES algorithms.
416
417config CRYPTO_DEV_OMAP_DES
418	tristate "Support for OMAP DES/3DES hw engine"
419	depends on ARCH_OMAP2PLUS
420	select CRYPTO_LIB_DES
421	select CRYPTO_SKCIPHER
422	select CRYPTO_ENGINE
423	help
424	  OMAP processors have DES/3DES module accelerator. Select this if you
425	  want to use the OMAP module for DES and 3DES algorithms. Currently
426	  the ECB and CBC modes of operation are supported by the driver. Also
427	  accesses made on unaligned boundaries are supported.
428
429endif # CRYPTO_DEV_OMAP
430
431config CRYPTO_DEV_SAHARA
432	tristate "Support for SAHARA crypto accelerator"
433	depends on ARCH_MXC && OF
434	select CRYPTO_SKCIPHER
435	select CRYPTO_AES
436	select CRYPTO_ECB
437	help
438	  This option enables support for the SAHARA HW crypto accelerator
439	  found in some Freescale i.MX chips.
440
441config CRYPTO_DEV_EXYNOS_RNG
442	tristate "Exynos HW pseudo random number generator support"
443	depends on ARCH_EXYNOS || COMPILE_TEST
444	depends on HAS_IOMEM
445	select CRYPTO_RNG
446	help
447	  This driver provides kernel-side support through the
448	  cryptographic API for the pseudo random number generator hardware
449	  found on Exynos SoCs.
450
451	  To compile this driver as a module, choose M here: the
452	  module will be called exynos-rng.
453
454	  If unsure, say Y.
455
456config CRYPTO_DEV_S5P
457	tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
458	depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
459	depends on HAS_IOMEM
460	select CRYPTO_AES
461	select CRYPTO_SKCIPHER
462	help
463	  This option allows you to have support for S5P crypto acceleration.
464	  Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
465	  algorithms execution.
466
467config CRYPTO_DEV_EXYNOS_HASH
468	bool "Support for Samsung Exynos HASH accelerator"
469	depends on CRYPTO_DEV_S5P
470	depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
471	select CRYPTO_SHA1
472	select CRYPTO_MD5
473	select CRYPTO_SHA256
474	help
475	  Select this to offload Exynos from HASH MD5/SHA1/SHA256.
476	  This will select software SHA1, MD5 and SHA256 as they are
477	  needed for small and zero-size messages.
478	  HASH algorithms will be disabled if EXYNOS_RNG
479	  is enabled due to hw conflict.
480
481config CRYPTO_DEV_NX
482	bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
483	depends on PPC64
484	help
485	  This enables support for the NX hardware cryptographic accelerator
486	  coprocessor that is in IBM PowerPC P7+ or later processors.  This
487	  does not actually enable any drivers, it only allows you to select
488	  which acceleration type (encryption and/or compression) to enable.
489
490if CRYPTO_DEV_NX
491	source "drivers/crypto/nx/Kconfig"
492endif
493
494config CRYPTO_DEV_UX500
495	tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
496	depends on ARCH_U8500
497	help
498	  Driver for ST-Ericsson UX500 crypto engine.
499
500if CRYPTO_DEV_UX500
501	source "drivers/crypto/ux500/Kconfig"
502endif # if CRYPTO_DEV_UX500
503
504config CRYPTO_DEV_ATMEL_AUTHENC
505	bool "Support for Atmel IPSEC/SSL hw accelerator"
506	depends on ARCH_AT91 || COMPILE_TEST
507	depends on CRYPTO_DEV_ATMEL_AES
508	help
509	  Some Atmel processors can combine the AES and SHA hw accelerators
510	  to enhance support of IPSEC/SSL.
511	  Select this if you want to use the Atmel modules for
512	  authenc(hmac(shaX),Y(cbc)) algorithms.
513
514config CRYPTO_DEV_ATMEL_AES
515	tristate "Support for Atmel AES hw accelerator"
516	depends on ARCH_AT91 || COMPILE_TEST
517	select CRYPTO_AES
518	select CRYPTO_AEAD
519	select CRYPTO_SKCIPHER
520	select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC
521	select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC
522	help
523	  Some Atmel processors have AES hw accelerator.
524	  Select this if you want to use the Atmel module for
525	  AES algorithms.
526
527	  To compile this driver as a module, choose M here: the module
528	  will be called atmel-aes.
529
530config CRYPTO_DEV_ATMEL_TDES
531	tristate "Support for Atmel DES/TDES hw accelerator"
532	depends on ARCH_AT91 || COMPILE_TEST
533	select CRYPTO_LIB_DES
534	select CRYPTO_SKCIPHER
535	help
536	  Some Atmel processors have DES/TDES hw accelerator.
537	  Select this if you want to use the Atmel module for
538	  DES/TDES algorithms.
539
540	  To compile this driver as a module, choose M here: the module
541	  will be called atmel-tdes.
542
543config CRYPTO_DEV_ATMEL_SHA
544	tristate "Support for Atmel SHA hw accelerator"
545	depends on ARCH_AT91 || COMPILE_TEST
546	select CRYPTO_HASH
547	help
548	  Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
549	  hw accelerator.
550	  Select this if you want to use the Atmel module for
551	  SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
552
553	  To compile this driver as a module, choose M here: the module
554	  will be called atmel-sha.
555
556config CRYPTO_DEV_ATMEL_I2C
557	tristate
558	select BITREVERSE
559
560config CRYPTO_DEV_ATMEL_ECC
561	tristate "Support for Microchip / Atmel ECC hw accelerator"
562	depends on I2C
563	select CRYPTO_DEV_ATMEL_I2C
564	select CRYPTO_ECDH
565	select CRC16
566	help
567	  Microhip / Atmel ECC hw accelerator.
568	  Select this if you want to use the Microchip / Atmel module for
569	  ECDH algorithm.
570
571	  To compile this driver as a module, choose M here: the module
572	  will be called atmel-ecc.
573
574config CRYPTO_DEV_ATMEL_SHA204A
575	tristate "Support for Microchip / Atmel SHA accelerator and RNG"
576	depends on I2C
577	select CRYPTO_DEV_ATMEL_I2C
578	select HW_RANDOM
579	select CRC16
580	help
581	  Microhip / Atmel SHA accelerator and RNG.
582	  Select this if you want to use the Microchip / Atmel SHA204A
583	  module as a random number generator. (Other functions of the
584	  chip are currently not exposed by this driver)
585
586	  To compile this driver as a module, choose M here: the module
587	  will be called atmel-sha204a.
588
589config CRYPTO_DEV_CCP
590	bool "Support for AMD Secure Processor"
591	depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
592	help
593	  The AMD Secure Processor provides support for the Cryptographic Coprocessor
594	  (CCP) and the Platform Security Processor (PSP) devices.
595
596if CRYPTO_DEV_CCP
597	source "drivers/crypto/ccp/Kconfig"
598endif
599
600config CRYPTO_DEV_MXS_DCP
601	tristate "Support for Freescale MXS DCP"
602	depends on (ARCH_MXS || ARCH_MXC)
603	select STMP_DEVICE
604	select CRYPTO_CBC
605	select CRYPTO_ECB
606	select CRYPTO_AES
607	select CRYPTO_SKCIPHER
608	select CRYPTO_HASH
609	help
610	  The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
611	  co-processor on the die.
612
613	  To compile this driver as a module, choose M here: the module
614	  will be called mxs-dcp.
615
616source "drivers/crypto/qat/Kconfig"
617source "drivers/crypto/cavium/cpt/Kconfig"
618source "drivers/crypto/cavium/nitrox/Kconfig"
619source "drivers/crypto/marvell/Kconfig"
620
621config CRYPTO_DEV_CAVIUM_ZIP
622	tristate "Cavium ZIP driver"
623	depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
624	help
625	  Select this option if you want to enable compression/decompression
626	  acceleration on Cavium's ARM based SoCs
627
628config CRYPTO_DEV_QCE
629	tristate "Qualcomm crypto engine accelerator"
630	depends on ARCH_QCOM || COMPILE_TEST
631	depends on HAS_IOMEM
632	help
633	  This driver supports Qualcomm crypto engine accelerator
634	  hardware. To compile this driver as a module, choose M here. The
635	  module will be called qcrypto.
636
637config CRYPTO_DEV_QCE_SKCIPHER
638	bool
639	depends on CRYPTO_DEV_QCE
640	select CRYPTO_AES
641	select CRYPTO_LIB_DES
642	select CRYPTO_ECB
643	select CRYPTO_CBC
644	select CRYPTO_XTS
645	select CRYPTO_CTR
646	select CRYPTO_SKCIPHER
647
648config CRYPTO_DEV_QCE_SHA
649	bool
650	depends on CRYPTO_DEV_QCE
651	select CRYPTO_SHA1
652	select CRYPTO_SHA256
653
654config CRYPTO_DEV_QCE_AEAD
655	bool
656	depends on CRYPTO_DEV_QCE
657	select CRYPTO_AUTHENC
658	select CRYPTO_LIB_DES
659
660choice
661	prompt "Algorithms enabled for QCE acceleration"
662	default CRYPTO_DEV_QCE_ENABLE_ALL
663	depends on CRYPTO_DEV_QCE
664	help
665	  This option allows to choose whether to build support for all algorithms
666	  (default), hashes-only, or skciphers-only.
667
668	  The QCE engine does not appear to scale as well as the CPU to handle
669	  multiple crypto requests.  While the ipq40xx chips have 4-core CPUs, the
670	  QCE handles only 2 requests in parallel.
671
672	  Ipsec throughput seems to improve when disabling either family of
673	  algorithms, sharing the load with the CPU.  Enabling skciphers-only
674	  appears to work best.
675
676	config CRYPTO_DEV_QCE_ENABLE_ALL
677		bool "All supported algorithms"
678		select CRYPTO_DEV_QCE_SKCIPHER
679		select CRYPTO_DEV_QCE_SHA
680		select CRYPTO_DEV_QCE_AEAD
681		help
682		  Enable all supported algorithms:
683			- AES (CBC, CTR, ECB, XTS)
684			- 3DES (CBC, ECB)
685			- DES (CBC, ECB)
686			- SHA1, HMAC-SHA1
687			- SHA256, HMAC-SHA256
688
689	config CRYPTO_DEV_QCE_ENABLE_SKCIPHER
690		bool "Symmetric-key ciphers only"
691		select CRYPTO_DEV_QCE_SKCIPHER
692		help
693		  Enable symmetric-key ciphers only:
694			- AES (CBC, CTR, ECB, XTS)
695			- 3DES (ECB, CBC)
696			- DES (ECB, CBC)
697
698	config CRYPTO_DEV_QCE_ENABLE_SHA
699		bool "Hash/HMAC only"
700		select CRYPTO_DEV_QCE_SHA
701		help
702		  Enable hashes/HMAC algorithms only:
703			- SHA1, HMAC-SHA1
704			- SHA256, HMAC-SHA256
705
706	config CRYPTO_DEV_QCE_ENABLE_AEAD
707		bool "AEAD algorithms only"
708		select CRYPTO_DEV_QCE_AEAD
709		help
710		  Enable AEAD algorithms only:
711			- authenc()
712			- ccm(aes)
713			- rfc4309(ccm(aes))
714endchoice
715
716config CRYPTO_DEV_QCE_SW_MAX_LEN
717	int "Default maximum request size to use software for AES"
718	depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER
719	default 512
720	help
721	  This sets the default maximum request size to perform AES requests
722	  using software instead of the crypto engine.  It can be changed by
723	  setting the aes_sw_max_len parameter.
724
725	  Small blocks are processed faster in software than hardware.
726	  Considering the 256-bit ciphers, software is 2-3 times faster than
727	  qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
728	  With 128-bit keys, the break-even point would be around 1024-bytes.
729
730	  The default is set a little lower, to 512 bytes, to balance the
731	  cost in CPU usage.  The minimum recommended setting is 16-bytes
732	  (1 AES block), since AES-GCM will fail if you set it lower.
733	  Setting this to zero will send all requests to the hardware.
734
735	  Note that 192-bit keys are not supported by the hardware and are
736	  always processed by the software fallback, and all DES requests
737	  are done by the hardware.
738
739config CRYPTO_DEV_QCOM_RNG
740	tristate "Qualcomm Random Number Generator Driver"
741	depends on ARCH_QCOM || COMPILE_TEST
742	select CRYPTO_RNG
743	help
744	  This driver provides support for the Random Number
745	  Generator hardware found on Qualcomm SoCs.
746
747	  To compile this driver as a module, choose M here. The
748	  module will be called qcom-rng. If unsure, say N.
749
750config CRYPTO_DEV_VMX
751	bool "Support for VMX cryptographic acceleration instructions"
752	depends on PPC64 && VSX
753	help
754	  Support for VMX cryptographic acceleration instructions.
755
756source "drivers/crypto/vmx/Kconfig"
757
758config CRYPTO_DEV_IMGTEC_HASH
759	tristate "Imagination Technologies hardware hash accelerator"
760	depends on MIPS || COMPILE_TEST
761	select CRYPTO_MD5
762	select CRYPTO_SHA1
763	select CRYPTO_SHA256
764	select CRYPTO_HASH
765	help
766	  This driver interfaces with the Imagination Technologies
767	  hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
768	  hashing algorithms.
769
770config CRYPTO_DEV_ROCKCHIP
771	tristate "Rockchip's Cryptographic Engine driver"
772	depends on OF && ARCH_ROCKCHIP
773	select CRYPTO_AES
774	select CRYPTO_LIB_DES
775	select CRYPTO_MD5
776	select CRYPTO_SHA1
777	select CRYPTO_SHA256
778	select CRYPTO_HASH
779	select CRYPTO_SKCIPHER
780
781	help
782	  This driver interfaces with the hardware crypto accelerator.
783	  Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
784
785config CRYPTO_DEV_ZYNQMP_AES
786	tristate "Support for Xilinx ZynqMP AES hw accelerator"
787	depends on ZYNQMP_FIRMWARE || COMPILE_TEST
788	select CRYPTO_AES
789	select CRYPTO_ENGINE
790	select CRYPTO_AEAD
791	help
792	  Xilinx ZynqMP has AES-GCM engine used for symmetric key
793	  encryption and decryption. This driver interfaces with AES hw
794	  accelerator. Select this if you want to use the ZynqMP module
795	  for AES algorithms.
796
797source "drivers/crypto/chelsio/Kconfig"
798
799source "drivers/crypto/virtio/Kconfig"
800
801config CRYPTO_DEV_BCM_SPU
802	tristate "Broadcom symmetric crypto/hash acceleration support"
803	depends on ARCH_BCM_IPROC
804	depends on MAILBOX
805	default m
806	select CRYPTO_AUTHENC
807	select CRYPTO_LIB_DES
808	select CRYPTO_MD5
809	select CRYPTO_SHA1
810	select CRYPTO_SHA256
811	select CRYPTO_SHA512
812	help
813	  This driver provides support for Broadcom crypto acceleration using the
814	  Secure Processing Unit (SPU). The SPU driver registers skcipher,
815	  ahash, and aead algorithms with the kernel cryptographic API.
816
817source "drivers/crypto/stm32/Kconfig"
818
819config CRYPTO_DEV_SAFEXCEL
820	tristate "Inside Secure's SafeXcel cryptographic engine driver"
821	depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM
822	select CRYPTO_LIB_AES
823	select CRYPTO_AUTHENC
824	select CRYPTO_SKCIPHER
825	select CRYPTO_LIB_DES
826	select CRYPTO_HASH
827	select CRYPTO_HMAC
828	select CRYPTO_MD5
829	select CRYPTO_SHA1
830	select CRYPTO_SHA256
831	select CRYPTO_SHA512
832	select CRYPTO_CHACHA20POLY1305
833	select CRYPTO_SHA3
834	help
835	  This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
836	  engines designed by Inside Secure. It currently accelerates DES, 3DES and
837	  AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256,
838	  SHA384 and SHA512 hash algorithms for both basic hash and HMAC.
839	  Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
840
841config CRYPTO_DEV_ARTPEC6
842	tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
843	depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
844	depends on OF
845	select CRYPTO_AEAD
846	select CRYPTO_AES
847	select CRYPTO_ALGAPI
848	select CRYPTO_SKCIPHER
849	select CRYPTO_CTR
850	select CRYPTO_HASH
851	select CRYPTO_SHA1
852	select CRYPTO_SHA256
853	select CRYPTO_SHA512
854	help
855	  Enables the driver for the on-chip crypto accelerator
856	  of Axis ARTPEC SoCs.
857
858	  To compile this driver as a module, choose M here.
859
860config CRYPTO_DEV_CCREE
861	tristate "Support for ARM TrustZone CryptoCell family of security processors"
862	depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
863	default n
864	select CRYPTO_HASH
865	select CRYPTO_SKCIPHER
866	select CRYPTO_LIB_DES
867	select CRYPTO_AEAD
868	select CRYPTO_AUTHENC
869	select CRYPTO_SHA1
870	select CRYPTO_MD5
871	select CRYPTO_SHA256
872	select CRYPTO_SHA512
873	select CRYPTO_HMAC
874	select CRYPTO_AES
875	select CRYPTO_CBC
876	select CRYPTO_ECB
877	select CRYPTO_CTR
878	select CRYPTO_XTS
879	select CRYPTO_SM4
880	select CRYPTO_SM3
881	help
882	  Say 'Y' to enable a driver for the REE interface of the Arm
883	  TrustZone CryptoCell family of processors. Currently the
884	  CryptoCell 713, 703, 712, 710 and 630 are supported.
885	  Choose this if you wish to use hardware acceleration of
886	  cryptographic operations on the system REE.
887	  If unsure say Y.
888
889source "drivers/crypto/hisilicon/Kconfig"
890
891source "drivers/crypto/amlogic/Kconfig"
892
893config CRYPTO_DEV_SA2UL
894	tristate "Support for TI security accelerator"
895	depends on ARCH_K3 || COMPILE_TEST
896	select ARM64_CRYPTO
897	select CRYPTO_AES
898	select CRYPTO_AES_ARM64
899	select CRYPTO_ALGAPI
900	select CRYPTO_AUTHENC
901	select CRYPTO_SHA1
902	select CRYPTO_SHA256
903	select CRYPTO_SHA512
904	select HW_RANDOM
905	select SG_SPLIT
906	help
907	  K3 devices include a security accelerator engine that may be
908	  used for crypto offload.  Select this if you want to use hardware
909	  acceleration for cryptographic algorithms on these devices.
910
911source "drivers/crypto/keembay/Kconfig"
912
913endif # CRYPTO_HW
914