xref: /linux/drivers/crypto/Kconfig (revision 3e4cd0737d2e9c3dd52153a23aef1753e3a99fc4)
1
2menuconfig CRYPTO_HW
3	bool "Hardware crypto devices"
4	default y
5	---help---
6	  Say Y here to get to see options for hardware crypto devices and
7	  processors. This option alone does not add any kernel code.
8
9	  If you say N, all options in this submenu will be skipped and disabled.
10
11if CRYPTO_HW
12
13config CRYPTO_DEV_PADLOCK
14	tristate "Support for VIA PadLock ACE"
15	depends on X86 && !UML
16	help
17	  Some VIA processors come with an integrated crypto engine
18	  (so called VIA PadLock ACE, Advanced Cryptography Engine)
19	  that provides instructions for very fast cryptographic
20	  operations with supported algorithms.
21
22	  The instructions are used only when the CPU supports them.
23	  Otherwise software encryption is used.
24
25config CRYPTO_DEV_PADLOCK_AES
26	tristate "PadLock driver for AES algorithm"
27	depends on CRYPTO_DEV_PADLOCK
28	select CRYPTO_BLKCIPHER
29	select CRYPTO_AES
30	help
31	  Use VIA PadLock for AES algorithm.
32
33	  Available in VIA C3 and newer CPUs.
34
35	  If unsure say M. The compiled module will be
36	  called padlock-aes.
37
38config CRYPTO_DEV_PADLOCK_SHA
39	tristate "PadLock driver for SHA1 and SHA256 algorithms"
40	depends on CRYPTO_DEV_PADLOCK
41	select CRYPTO_HASH
42	select CRYPTO_SHA1
43	select CRYPTO_SHA256
44	help
45	  Use VIA PadLock for SHA1/SHA256 algorithms.
46
47	  Available in VIA C7 and newer processors.
48
49	  If unsure say M. The compiled module will be
50	  called padlock-sha.
51
52config CRYPTO_DEV_GEODE
53	tristate "Support for the Geode LX AES engine"
54	depends on X86_32 && PCI
55	select CRYPTO_ALGAPI
56	select CRYPTO_BLKCIPHER
57	help
58	  Say 'Y' here to use the AMD Geode LX processor on-board AES
59	  engine for the CryptoAPI AES algorithm.
60
61	  To compile this driver as a module, choose M here: the module
62	  will be called geode-aes.
63
64config ZCRYPT
65	tristate "Support for PCI-attached cryptographic adapters"
66	depends on S390
67	select ZCRYPT_MONOLITHIC if ZCRYPT="y"
68	select HW_RANDOM
69	help
70	  Select this option if you want to use a PCI-attached cryptographic
71	  adapter like:
72	  + PCI Cryptographic Accelerator (PCICA)
73	  + PCI Cryptographic Coprocessor (PCICC)
74	  + PCI-X Cryptographic Coprocessor (PCIXCC)
75	  + Crypto Express2 Coprocessor (CEX2C)
76	  + Crypto Express2 Accelerator (CEX2A)
77
78config ZCRYPT_MONOLITHIC
79	bool "Monolithic zcrypt module"
80	depends on ZCRYPT
81	help
82	  Select this option if you want to have a single module z90crypt,
83	  that contains all parts of the crypto device driver (ap bus,
84	  request router and all the card drivers).
85
86config CRYPTO_SHA1_S390
87	tristate "SHA1 digest algorithm"
88	depends on S390
89	select CRYPTO_HASH
90	help
91	  This is the s390 hardware accelerated implementation of the
92	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
93
94	  It is available as of z990.
95
96config CRYPTO_SHA256_S390
97	tristate "SHA256 digest algorithm"
98	depends on S390
99	select CRYPTO_HASH
100	help
101	  This is the s390 hardware accelerated implementation of the
102	  SHA256 secure hash standard (DFIPS 180-2).
103
104	  It is available as of z9.
105
106config CRYPTO_SHA512_S390
107	tristate "SHA384 and SHA512 digest algorithm"
108	depends on S390
109	select CRYPTO_HASH
110	help
111	  This is the s390 hardware accelerated implementation of the
112	  SHA512 secure hash standard.
113
114	  It is available as of z10.
115
116config CRYPTO_DES_S390
117	tristate "DES and Triple DES cipher algorithms"
118	depends on S390
119	select CRYPTO_ALGAPI
120	select CRYPTO_BLKCIPHER
121	help
122	  This is the s390 hardware accelerated implementation of the
123	  DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
124
125	  As of z990 the ECB and CBC mode are hardware accelerated.
126	  As of z196 the CTR mode is hardware accelerated.
127
128config CRYPTO_AES_S390
129	tristate "AES cipher algorithms"
130	depends on S390
131	select CRYPTO_ALGAPI
132	select CRYPTO_BLKCIPHER
133	help
134	  This is the s390 hardware accelerated implementation of the
135	  AES cipher algorithms (FIPS-197).
136
137	  As of z9 the ECB and CBC modes are hardware accelerated
138	  for 128 bit keys.
139	  As of z10 the ECB and CBC modes are hardware accelerated
140	  for all AES key sizes.
141	  As of z196 the CTR mode is hardware accelerated for all AES
142	  key sizes and XTS mode is hardware accelerated for 256 and
143	  512 bit keys.
144
145config S390_PRNG
146	tristate "Pseudo random number generator device driver"
147	depends on S390
148	default "m"
149	help
150	  Select this option if you want to use the s390 pseudo random number
151	  generator. The PRNG is part of the cryptographic processor functions
152	  and uses triple-DES to generate secure random numbers like the
153	  ANSI X9.17 standard. User-space programs access the
154	  pseudo-random-number device through the char device /dev/prandom.
155
156	  It is available as of z9.
157
158config CRYPTO_GHASH_S390
159	tristate "GHASH digest algorithm"
160	depends on S390
161	select CRYPTO_HASH
162	help
163	  This is the s390 hardware accelerated implementation of the
164	  GHASH message digest algorithm for GCM (Galois/Counter Mode).
165
166	  It is available as of z196.
167
168config CRYPTO_DEV_MV_CESA
169	tristate "Marvell's Cryptographic Engine"
170	depends on PLAT_ORION
171	select CRYPTO_ALGAPI
172	select CRYPTO_AES
173	select CRYPTO_BLKCIPHER2
174	help
175	  This driver allows you to utilize the Cryptographic Engines and
176	  Security Accelerator (CESA) which can be found on the Marvell Orion
177	  and Kirkwood SoCs, such as QNAP's TS-209.
178
179	  Currently the driver supports AES in ECB and CBC mode without DMA.
180
181config CRYPTO_DEV_NIAGARA2
182       tristate "Niagara2 Stream Processing Unit driver"
183       select CRYPTO_DES
184       select CRYPTO_ALGAPI
185       depends on SPARC64
186       help
187	  Each core of a Niagara2 processor contains a Stream
188	  Processing Unit, which itself contains several cryptographic
189	  sub-units.  One set provides the Modular Arithmetic Unit,
190	  used for SSL offload.  The other set provides the Cipher
191	  Group, which can perform encryption, decryption, hashing,
192	  checksumming, and raw copies.
193
194config CRYPTO_DEV_HIFN_795X
195	tristate "Driver HIFN 795x crypto accelerator chips"
196	select CRYPTO_DES
197	select CRYPTO_ALGAPI
198	select CRYPTO_BLKCIPHER
199	select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
200	depends on PCI
201	help
202	  This option allows you to have support for HIFN 795x crypto adapters.
203
204config CRYPTO_DEV_HIFN_795X_RNG
205	bool "HIFN 795x random number generator"
206	depends on CRYPTO_DEV_HIFN_795X
207	help
208	  Select this option if you want to enable the random number generator
209	  on the HIFN 795x crypto adapters.
210
211source drivers/crypto/caam/Kconfig
212
213config CRYPTO_DEV_TALITOS
214	tristate "Talitos Freescale Security Engine (SEC)"
215	select CRYPTO_ALGAPI
216	select CRYPTO_AUTHENC
217	select HW_RANDOM
218	depends on FSL_SOC
219	help
220	  Say 'Y' here to use the Freescale Security Engine (SEC)
221	  to offload cryptographic algorithm computation.
222
223	  The Freescale SEC is present on PowerQUICC 'E' processors, such
224	  as the MPC8349E and MPC8548E.
225
226	  To compile this driver as a module, choose M here: the module
227	  will be called talitos.
228
229config CRYPTO_DEV_IXP4XX
230	tristate "Driver for IXP4xx crypto hardware acceleration"
231	depends on ARCH_IXP4XX
232	select CRYPTO_DES
233	select CRYPTO_ALGAPI
234	select CRYPTO_AUTHENC
235	select CRYPTO_BLKCIPHER
236	help
237	  Driver for the IXP4xx NPE crypto engine.
238
239config CRYPTO_DEV_PPC4XX
240	tristate "Driver AMCC PPC4xx crypto accelerator"
241	depends on PPC && 4xx
242	select CRYPTO_HASH
243	select CRYPTO_ALGAPI
244	select CRYPTO_BLKCIPHER
245	help
246	  This option allows you to have support for AMCC crypto acceleration.
247
248config CRYPTO_DEV_OMAP_SHAM
249	tristate "Support for OMAP SHA1/MD5 hw accelerator"
250	depends on ARCH_OMAP2 || ARCH_OMAP3
251	select CRYPTO_SHA1
252	select CRYPTO_MD5
253	help
254	  OMAP processors have SHA1/MD5 hw accelerator. Select this if you
255	  want to use the OMAP module for SHA1/MD5 algorithms.
256
257config CRYPTO_DEV_OMAP_AES
258	tristate "Support for OMAP AES hw engine"
259	depends on ARCH_OMAP2 || ARCH_OMAP3
260	select CRYPTO_AES
261	help
262	  OMAP processors have AES module accelerator. Select this if you
263	  want to use the OMAP module for AES algorithms.
264
265config CRYPTO_DEV_PICOXCELL
266	tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
267	depends on ARCH_PICOXCELL
268	select CRYPTO_AES
269	select CRYPTO_AUTHENC
270	select CRYPTO_ALGAPI
271	select CRYPTO_DES
272	select CRYPTO_CBC
273	select CRYPTO_ECB
274	select CRYPTO_SEQIV
275	help
276	  This option enables support for the hardware offload engines in the
277	  Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
278	  and for 3gpp Layer 2 ciphering support.
279
280	  Saying m here will build a module named pipcoxcell_crypto.
281
282config CRYPTO_DEV_S5P
283	tristate "Support for Samsung S5PV210 crypto accelerator"
284	depends on ARCH_S5PV210
285	select CRYPTO_AES
286	select CRYPTO_ALGAPI
287	select CRYPTO_BLKCIPHER
288	help
289	  This option allows you to have support for S5P crypto acceleration.
290	  Select this to offload Samsung S5PV210 or S5PC110 from AES
291	  algorithms execution.
292
293endif # CRYPTO_HW
294