xref: /linux/drivers/crypto/Kconfig (revision dbaf0624ffa57ae6e7d87a823185ccd9a7852d3c)

menuconfig CRYPTO_HW
	bool "Hardware crypto devices"
	default y
	---help---
	  Say Y here to get to see options for hardware crypto devices and
	  processors. This option alone does not add any kernel code.

	  If you say N, all options in this submenu will be skipped and disabled.

if CRYPTO_HW

config CRYPTO_DEV_PADLOCK
	tristate "Support for VIA PadLock ACE"
	depends on X86 && !UML
	help
	  Some VIA processors come with an integrated crypto engine
	  (so called VIA PadLock ACE, Advanced Cryptography Engine)
	  that provides instructions for very fast cryptographic
	  operations with supported algorithms.

	  The instructions are used only when the CPU supports them.
	  Otherwise software encryption is used.

config CRYPTO_DEV_PADLOCK_AES
	tristate "PadLock driver for AES algorithm"
	depends on CRYPTO_DEV_PADLOCK
	select CRYPTO_BLKCIPHER
	select CRYPTO_AES
	help
	  Use VIA PadLock for AES algorithm.

	  Available in VIA C3 and newer CPUs.

	  If unsure say M. The compiled module will be
	  called padlock-aes.

config CRYPTO_DEV_PADLOCK_SHA
	tristate "PadLock driver for SHA1 and SHA256 algorithms"
	depends on CRYPTO_DEV_PADLOCK
	select CRYPTO_HASH
	select CRYPTO_SHA1
	select CRYPTO_SHA256
	help
	  Use VIA PadLock for SHA1/SHA256 algorithms.

	  Available in VIA C7 and newer processors.

	  If unsure say M. The compiled module will be
	  called padlock-sha.

config CRYPTO_DEV_GEODE
	tristate "Support for the Geode LX AES engine"
	depends on X86_32 && PCI
	select CRYPTO_ALGAPI
	select CRYPTO_BLKCIPHER
	help
	  Say 'Y' here to use the AMD Geode LX processor on-board AES
	  engine for the CryptoAPI AES algorithm.

	  To compile this driver as a module, choose M here: the module
	  will be called geode-aes.

config ZCRYPT
	tristate "Support for PCI-attached cryptographic adapters"
	depends on S390
	select HW_RANDOM
	help
	  Select this option if you want to use a PCI-attached cryptographic
	  adapter like:
	  + PCI Cryptographic Accelerator (PCICA)
	  + PCI Cryptographic Coprocessor (PCICC)
	  + PCI-X Cryptographic Coprocessor (PCIXCC)
	  + Crypto Express2 Coprocessor (CEX2C)
	  + Crypto Express2 Accelerator (CEX2A)
	  + Crypto Express3 Coprocessor (CEX3C)
	  + Crypto Express3 Accelerator (CEX3A)

config CRYPTO_SHA1_S390
	tristate "SHA1 digest algorithm"
	depends on S390
	select CRYPTO_HASH
	help
	  This is the s390 hardware accelerated implementation of the
	  SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).

	  It is available as of z990.

config CRYPTO_SHA256_S390
	tristate "SHA256 digest algorithm"
	depends on S390
	select CRYPTO_HASH
	help
	  This is the s390 hardware accelerated implementation of the
	  SHA256 secure hash standard (DFIPS 180-2).

	  It is available as of z9.

config CRYPTO_SHA512_S390
	tristate "SHA384 and SHA512 digest algorithm"
	depends on S390
	select CRYPTO_HASH
	help
	  This is the s390 hardware accelerated implementation of the
	  SHA512 secure hash standard.

	  It is available as of z10.

config CRYPTO_DES_S390
	tristate "DES and Triple DES cipher algorithms"
	depends on S390
	select CRYPTO_ALGAPI
	select CRYPTO_BLKCIPHER
	select CRYPTO_DES
	help
	  This is the s390 hardware accelerated implementation of the
	  DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).

	  As of z990 the ECB and CBC mode are hardware accelerated.
	  As of z196 the CTR mode is hardware accelerated.

config CRYPTO_AES_S390
	tristate "AES cipher algorithms"
	depends on S390
	select CRYPTO_ALGAPI
	select CRYPTO_BLKCIPHER
	help
	  This is the s390 hardware accelerated implementation of the
	  AES cipher algorithms (FIPS-197).

	  As of z9 the ECB and CBC modes are hardware accelerated
	  for 128 bit keys.
	  As of z10 the ECB and CBC modes are hardware accelerated
	  for all AES key sizes.
	  As of z196 the CTR mode is hardware accelerated for all AES
	  key sizes and XTS mode is hardware accelerated for 256 and
	  512 bit keys.

config S390_PRNG
	tristate "Pseudo random number generator device driver"
	depends on S390
	default "m"
	help
	  Select this option if you want to use the s390 pseudo random number
	  generator. The PRNG is part of the cryptographic processor functions
	  and uses triple-DES to generate secure random numbers like the
	  ANSI X9.17 standard. User-space programs access the
	  pseudo-random-number device through the char device /dev/prandom.

	  It is available as of z9.

config CRYPTO_GHASH_S390
	tristate "GHASH digest algorithm"
	depends on S390
	select CRYPTO_HASH
	help
	  This is the s390 hardware accelerated implementation of the
	  GHASH message digest algorithm for GCM (Galois/Counter Mode).

	  It is available as of z196.

config CRYPTO_CRC32_S390
	tristate "CRC-32 algorithms"
	depends on S390
	select CRYPTO_HASH
	select CRC32
	help
	  Select this option if you want to use hardware accelerated
	  implementations of CRC algorithms.  With this option, you
	  can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
	  and CRC-32C (Castagnoli).

	  It is available with IBM z13 or later.

config CRYPTO_DEV_MV_CESA
	tristate "Marvell's Cryptographic Engine"
	depends on PLAT_ORION
	select CRYPTO_AES
	select CRYPTO_BLKCIPHER
	select CRYPTO_HASH
	select SRAM
	help
	  This driver allows you to utilize the Cryptographic Engines and
	  Security Accelerator (CESA) which can be found on the Marvell Orion
	  and Kirkwood SoCs, such as QNAP's TS-209.

	  Currently the driver supports AES in ECB and CBC mode without DMA.

config CRYPTO_DEV_MARVELL_CESA
	tristate "New Marvell's Cryptographic Engine driver"
	depends on PLAT_ORION || ARCH_MVEBU
	select CRYPTO_AES
	select CRYPTO_DES
	select CRYPTO_BLKCIPHER
	select CRYPTO_HASH
	select SRAM
	help
	  This driver allows you to utilize the Cryptographic Engines and
	  Security Accelerator (CESA) which can be found on the Armada 370.
	  This driver supports CPU offload through DMA transfers.

	  This driver is aimed at replacing the mv_cesa driver. This will only
	  happen once it has received proper testing.

config CRYPTO_DEV_NIAGARA2
       tristate "Niagara2 Stream Processing Unit driver"
       select CRYPTO_DES
       select CRYPTO_BLKCIPHER
       select CRYPTO_HASH
       select CRYPTO_MD5
       select CRYPTO_SHA1
       select CRYPTO_SHA256
       depends on SPARC64
       help
	  Each core of a Niagara2 processor contains a Stream
	  Processing Unit, which itself contains several cryptographic
	  sub-units.  One set provides the Modular Arithmetic Unit,
	  used for SSL offload.  The other set provides the Cipher
	  Group, which can perform encryption, decryption, hashing,
	  checksumming, and raw copies.

config CRYPTO_DEV_HIFN_795X
	tristate "Driver HIFN 795x crypto accelerator chips"
	select CRYPTO_DES
	select CRYPTO_BLKCIPHER
	select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
	depends on PCI
	depends on !ARCH_DMA_ADDR_T_64BIT
	help
	  This option allows you to have support for HIFN 795x crypto adapters.

config CRYPTO_DEV_HIFN_795X_RNG
	bool "HIFN 795x random number generator"
	depends on CRYPTO_DEV_HIFN_795X
	help
	  Select this option if you want to enable the random number generator
	  on the HIFN 795x crypto adapters.

source drivers/crypto/caam/Kconfig

config CRYPTO_DEV_TALITOS
	tristate "Talitos Freescale Security Engine (SEC)"
	select CRYPTO_AEAD
	select CRYPTO_AUTHENC
	select CRYPTO_BLKCIPHER
	select CRYPTO_HASH
	select HW_RANDOM
	depends on FSL_SOC
	help
	  Say 'Y' here to use the Freescale Security Engine (SEC)
	  to offload cryptographic algorithm computation.

	  The Freescale SEC is present on PowerQUICC 'E' processors, such
	  as the MPC8349E and MPC8548E.

	  To compile this driver as a module, choose M here: the module
	  will be called talitos.

config CRYPTO_DEV_TALITOS1
	bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
	depends on CRYPTO_DEV_TALITOS
	depends on PPC_8xx || PPC_82xx
	default y
	help
	  Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
	  found on MPC82xx or the Freescale Security Engine (SEC Lite)
	  version 1.2 found on MPC8xx

config CRYPTO_DEV_TALITOS2
	bool "SEC2+ (SEC version 2.0 or upper)"
	depends on CRYPTO_DEV_TALITOS
	default y if !PPC_8xx
	help
	  Say 'Y' here to use the Freescale Security Engine (SEC)
	  version 2 and following as found on MPC83xx, MPC85xx, etc ...

config CRYPTO_DEV_IXP4XX
	tristate "Driver for IXP4xx crypto hardware acceleration"
	depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
	select CRYPTO_DES
	select CRYPTO_AEAD
	select CRYPTO_AUTHENC
	select CRYPTO_BLKCIPHER
	help
	  Driver for the IXP4xx NPE crypto engine.

config CRYPTO_DEV_PPC4XX
	tristate "Driver AMCC PPC4xx crypto accelerator"
	depends on PPC && 4xx
	select CRYPTO_HASH
	select CRYPTO_BLKCIPHER
	help
	  This option allows you to have support for AMCC crypto acceleration.

config HW_RANDOM_PPC4XX
	bool "PowerPC 4xx generic true random number generator support"
	depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
	default y
	---help---
	 This option provides the kernel-side support for the TRNG hardware
	 found in the security function of some PowerPC 4xx SoCs.

config CRYPTO_DEV_OMAP_SHAM
	tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
	depends on ARCH_OMAP2PLUS
	select CRYPTO_SHA1
	select CRYPTO_MD5
	select CRYPTO_SHA256
	select CRYPTO_SHA512
	select CRYPTO_HMAC
	help
	  OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
	  want to use the OMAP module for MD5/SHA1/SHA2 algorithms.

config CRYPTO_DEV_OMAP_AES
	tristate "Support for OMAP AES hw engine"
	depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
	select CRYPTO_AES
	select CRYPTO_BLKCIPHER
	select CRYPTO_ENGINE
	select CRYPTO_CBC
	select CRYPTO_ECB
	select CRYPTO_CTR
	help
	  OMAP processors have AES module accelerator. Select this if you
	  want to use the OMAP module for AES algorithms.

config CRYPTO_DEV_OMAP_DES
	tristate "Support for OMAP DES/3DES hw engine"
	depends on ARCH_OMAP2PLUS
	select CRYPTO_DES
	select CRYPTO_BLKCIPHER
	select CRYPTO_ENGINE
	help
	  OMAP processors have DES/3DES module accelerator. Select this if you
	  want to use the OMAP module for DES and 3DES algorithms. Currently
	  the ECB and CBC modes of operation are supported by the driver. Also
	  accesses made on unaligned boundaries are supported.

config CRYPTO_DEV_PICOXCELL
	tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
	depends on ARCH_PICOXCELL && HAVE_CLK
	select CRYPTO_AEAD
	select CRYPTO_AES
	select CRYPTO_AUTHENC
	select CRYPTO_BLKCIPHER
	select CRYPTO_DES
	select CRYPTO_CBC
	select CRYPTO_ECB
	select CRYPTO_SEQIV
	help
	  This option enables support for the hardware offload engines in the
	  Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
	  and for 3gpp Layer 2 ciphering support.

	  Saying m here will build a module named pipcoxcell_crypto.

config CRYPTO_DEV_SAHARA
	tristate "Support for SAHARA crypto accelerator"
	depends on ARCH_MXC && OF
	select CRYPTO_BLKCIPHER
	select CRYPTO_AES
	select CRYPTO_ECB
	help
	  This option enables support for the SAHARA HW crypto accelerator
	  found in some Freescale i.MX chips.

config CRYPTO_DEV_MXC_SCC
	tristate "Support for Freescale Security Controller (SCC)"
	depends on ARCH_MXC && OF
	select CRYPTO_BLKCIPHER
	select CRYPTO_DES
	help
	  This option enables support for the Security Controller (SCC)
	  found in Freescale i.MX25 chips.

config CRYPTO_DEV_S5P
	tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
	depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
	depends on HAS_IOMEM && HAS_DMA
	select CRYPTO_AES
	select CRYPTO_BLKCIPHER
	help
	  This option allows you to have support for S5P crypto acceleration.
	  Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
	  algorithms execution.

config CRYPTO_DEV_NX
	bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
	depends on PPC64
	help
	  This enables support for the NX hardware cryptographic accelerator
	  coprocessor that is in IBM PowerPC P7+ or later processors.  This
	  does not actually enable any drivers, it only allows you to select
	  which acceleration type (encryption and/or compression) to enable.

if CRYPTO_DEV_NX
	source "drivers/crypto/nx/Kconfig"
endif

config CRYPTO_DEV_UX500
	tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
	depends on ARCH_U8500
	help
	  Driver for ST-Ericsson UX500 crypto engine.

if CRYPTO_DEV_UX500
	source "drivers/crypto/ux500/Kconfig"
endif # if CRYPTO_DEV_UX500

config CRYPTO_DEV_BFIN_CRC
	tristate "Support for Blackfin CRC hardware"
	depends on BF60x
	help
	  Newer Blackfin processors have CRC hardware. Select this if you
	  want to use the Blackfin CRC module.

config CRYPTO_DEV_ATMEL_AES
	tristate "Support for Atmel AES hw accelerator"
	depends on HAS_DMA
	depends on AT_XDMAC || AT_HDMAC || COMPILE_TEST
	select CRYPTO_AES
	select CRYPTO_AEAD
	select CRYPTO_BLKCIPHER
	help
	  Some Atmel processors have AES hw accelerator.
	  Select this if you want to use the Atmel module for
	  AES algorithms.

	  To compile this driver as a module, choose M here: the module
	  will be called atmel-aes.

config CRYPTO_DEV_ATMEL_TDES
	tristate "Support for Atmel DES/TDES hw accelerator"
	depends on ARCH_AT91
	select CRYPTO_DES
	select CRYPTO_BLKCIPHER
	help
	  Some Atmel processors have DES/TDES hw accelerator.
	  Select this if you want to use the Atmel module for
	  DES/TDES algorithms.

	  To compile this driver as a module, choose M here: the module
	  will be called atmel-tdes.

config CRYPTO_DEV_ATMEL_SHA
	tristate "Support for Atmel SHA hw accelerator"
	depends on ARCH_AT91
	select CRYPTO_HASH
	help
	  Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
	  hw accelerator.
	  Select this if you want to use the Atmel module for
	  SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.

	  To compile this driver as a module, choose M here: the module
	  will be called atmel-sha.

config CRYPTO_DEV_CCP
	bool "Support for AMD Cryptographic Coprocessor"
	depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
	help
	  The AMD Cryptographic Coprocessor provides hardware offload support
	  for encryption, hashing and related operations.

if CRYPTO_DEV_CCP
	source "drivers/crypto/ccp/Kconfig"
endif

config CRYPTO_DEV_MXS_DCP
	tristate "Support for Freescale MXS DCP"
	depends on (ARCH_MXS || ARCH_MXC)
	select STMP_DEVICE
	select CRYPTO_CBC
	select CRYPTO_ECB
	select CRYPTO_AES
	select CRYPTO_BLKCIPHER
	select CRYPTO_HASH
	help
	  The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
	  co-processor on the die.

	  To compile this driver as a module, choose M here: the module
	  will be called mxs-dcp.

source "drivers/crypto/qat/Kconfig"

config CRYPTO_DEV_QCE
	tristate "Qualcomm crypto engine accelerator"
	depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
	select CRYPTO_AES
	select CRYPTO_DES
	select CRYPTO_ECB
	select CRYPTO_CBC
	select CRYPTO_XTS
	select CRYPTO_CTR
	select CRYPTO_BLKCIPHER
	help
	  This driver supports Qualcomm crypto engine accelerator
	  hardware. To compile this driver as a module, choose M here. The
	  module will be called qcrypto.

config CRYPTO_DEV_VMX
	bool "Support for VMX cryptographic acceleration instructions"
	depends on PPC64 && VSX
	help
	  Support for VMX cryptographic acceleration instructions.

source "drivers/crypto/vmx/Kconfig"

config CRYPTO_DEV_IMGTEC_HASH
	tristate "Imagination Technologies hardware hash accelerator"
	depends on MIPS || COMPILE_TEST
	depends on HAS_DMA
	select CRYPTO_MD5
	select CRYPTO_SHA1
	select CRYPTO_SHA256
	select CRYPTO_HASH
	help
	  This driver interfaces with the Imagination Technologies
	  hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
	  hashing algorithms.

config CRYPTO_DEV_SUN4I_SS
	tristate "Support for Allwinner Security System cryptographic accelerator"
	depends on ARCH_SUNXI && !64BIT
	select CRYPTO_MD5
	select CRYPTO_SHA1
	select CRYPTO_AES
	select CRYPTO_DES
	select CRYPTO_BLKCIPHER
	help
	  Some Allwinner SoC have a crypto accelerator named
	  Security System. Select this if you want to use it.
	  The Security System handle AES/DES/3DES ciphers in CBC mode
	  and SHA1 and MD5 hash algorithms.

	  To compile this driver as a module, choose M here: the module
	  will be called sun4i-ss.

config CRYPTO_DEV_ROCKCHIP
	tristate "Rockchip's Cryptographic Engine driver"
	depends on OF && ARCH_ROCKCHIP
	select CRYPTO_AES
	select CRYPTO_DES
	select CRYPTO_MD5
	select CRYPTO_SHA1
	select CRYPTO_SHA256
	select CRYPTO_HASH
	select CRYPTO_BLKCIPHER

	help
	  This driver interfaces with the hardware crypto accelerator.
	  Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.

source "drivers/crypto/chelsio/Kconfig"

source "drivers/crypto/virtio/Kconfig"

endif # CRYPTO_HW