1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2013 ARM/Linaro 4 * 5 * Authors: Daniel Lezcano <daniel.lezcano@linaro.org> 6 * Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 7 * Nicolas Pitre <nicolas.pitre@linaro.org> 8 * 9 * Maintainer: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 10 * Maintainer: Daniel Lezcano <daniel.lezcano@linaro.org> 11 */ 12 #include <linux/cpuidle.h> 13 #include <linux/cpu_pm.h> 14 #include <linux/slab.h> 15 #include <linux/of.h> 16 17 #include <asm/cpu.h> 18 #include <asm/cputype.h> 19 #include <asm/cpuidle.h> 20 #include <asm/mcpm.h> 21 #include <asm/smp_plat.h> 22 #include <asm/suspend.h> 23 24 #include "dt_idle_states.h" 25 26 static int bl_enter_powerdown(struct cpuidle_device *dev, 27 struct cpuidle_driver *drv, int idx); 28 29 /* 30 * NB: Owing to current menu governor behaviour big and LITTLE 31 * index 1 states have to define exit_latency and target_residency for 32 * cluster state since, when all CPUs in a cluster hit it, the cluster 33 * can be shutdown. This means that when a single CPU enters this state 34 * the exit_latency and target_residency values are somewhat overkill. 35 * There is no notion of cluster states in the menu governor, so CPUs 36 * have to define CPU states where possibly the cluster will be shutdown 37 * depending on the state of other CPUs. idle states entry and exit happen 38 * at random times; however the cluster state provides target_residency 39 * values as if all CPUs in a cluster enter the state at once; this is 40 * somewhat optimistic and behaviour should be fixed either in the governor 41 * or in the MCPM back-ends. 42 * To make this driver 100% generic the number of states and the exit_latency 43 * target_residency values must be obtained from device tree bindings. 44 * 45 * exit_latency: refers to the TC2 vexpress test chip and depends on the 46 * current cluster operating point. It is the time it takes to get the CPU 47 * up and running when the CPU is powered up on cluster wake-up from shutdown. 48 * Current values for big and LITTLE clusters are provided for clusters 49 * running at default operating points. 50 * 51 * target_residency: it is the minimum amount of time the cluster has 52 * to be down to break even in terms of power consumption. cluster 53 * shutdown has inherent dynamic power costs (L2 writebacks to DRAM 54 * being the main factor) that depend on the current operating points. 55 * The current values for both clusters are provided for a CPU whose half 56 * of L2 lines are dirty and require cleaning to DRAM, and takes into 57 * account leakage static power values related to the vexpress TC2 testchip. 58 */ 59 static struct cpuidle_driver bl_idle_little_driver = { 60 .name = "little_idle", 61 .owner = THIS_MODULE, 62 .states[0] = ARM_CPUIDLE_WFI_STATE, 63 .states[1] = { 64 .enter = bl_enter_powerdown, 65 .exit_latency = 700, 66 .target_residency = 2500, 67 .flags = CPUIDLE_FLAG_TIMER_STOP | 68 CPUIDLE_FLAG_RCU_IDLE, 69 .name = "C1", 70 .desc = "ARM little-cluster power down", 71 }, 72 .state_count = 2, 73 }; 74 75 static const struct of_device_id bl_idle_state_match[] __initconst = { 76 { .compatible = "arm,idle-state", 77 .data = bl_enter_powerdown }, 78 { }, 79 }; 80 81 static struct cpuidle_driver bl_idle_big_driver = { 82 .name = "big_idle", 83 .owner = THIS_MODULE, 84 .states[0] = ARM_CPUIDLE_WFI_STATE, 85 .states[1] = { 86 .enter = bl_enter_powerdown, 87 .exit_latency = 500, 88 .target_residency = 2000, 89 .flags = CPUIDLE_FLAG_TIMER_STOP | 90 CPUIDLE_FLAG_RCU_IDLE, 91 .name = "C1", 92 .desc = "ARM big-cluster power down", 93 }, 94 .state_count = 2, 95 }; 96 97 /* 98 * notrace prevents trace shims from getting inserted where they 99 * should not. Global jumps and ldrex/strex must not be inserted 100 * in power down sequences where caches and MMU may be turned off. 101 */ 102 static int notrace bl_powerdown_finisher(unsigned long arg) 103 { 104 /* MCPM works with HW CPU identifiers */ 105 unsigned int mpidr = read_cpuid_mpidr(); 106 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); 107 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); 108 109 mcpm_set_entry_vector(cpu, cluster, cpu_resume); 110 mcpm_cpu_suspend(); 111 112 /* return value != 0 means failure */ 113 return 1; 114 } 115 116 /** 117 * bl_enter_powerdown - Programs CPU to enter the specified state 118 * @dev: cpuidle device 119 * @drv: The target state to be programmed 120 * @idx: state index 121 * 122 * Called from the CPUidle framework to program the device to the 123 * specified target state selected by the governor. 124 */ 125 static __cpuidle int bl_enter_powerdown(struct cpuidle_device *dev, 126 struct cpuidle_driver *drv, int idx) 127 { 128 cpu_pm_enter(); 129 ct_cpuidle_enter(); 130 131 cpu_suspend(0, bl_powerdown_finisher); 132 133 /* signals the MCPM core that CPU is out of low power state */ 134 mcpm_cpu_powered_up(); 135 ct_cpuidle_exit(); 136 137 cpu_pm_exit(); 138 139 return idx; 140 } 141 142 static int __init bl_idle_driver_init(struct cpuidle_driver *drv, int part_id) 143 { 144 struct cpumask *cpumask; 145 int cpu; 146 147 cpumask = kzalloc(cpumask_size(), GFP_KERNEL); 148 if (!cpumask) 149 return -ENOMEM; 150 151 for_each_possible_cpu(cpu) 152 if (smp_cpuid_part(cpu) == part_id) 153 cpumask_set_cpu(cpu, cpumask); 154 155 drv->cpumask = cpumask; 156 157 return 0; 158 } 159 160 static const struct of_device_id compatible_machine_match[] = { 161 { .compatible = "arm,vexpress,v2p-ca15_a7" }, 162 { .compatible = "google,peach" }, 163 {}, 164 }; 165 166 static int __init bl_idle_init(void) 167 { 168 int ret; 169 struct device_node *root = of_find_node_by_path("/"); 170 const struct of_device_id *match_id; 171 172 if (!root) 173 return -ENODEV; 174 175 /* 176 * Initialize the driver just for a compliant set of machines 177 */ 178 match_id = of_match_node(compatible_machine_match, root); 179 180 of_node_put(root); 181 182 if (!match_id) 183 return -ENODEV; 184 185 if (!mcpm_is_available()) 186 return -EUNATCH; 187 188 /* 189 * For now the differentiation between little and big cores 190 * is based on the part number. A7 cores are considered little 191 * cores, A15 are considered big cores. This distinction may 192 * evolve in the future with a more generic matching approach. 193 */ 194 ret = bl_idle_driver_init(&bl_idle_little_driver, 195 ARM_CPU_PART_CORTEX_A7); 196 if (ret) 197 return ret; 198 199 ret = bl_idle_driver_init(&bl_idle_big_driver, ARM_CPU_PART_CORTEX_A15); 200 if (ret) 201 goto out_uninit_little; 202 203 /* Start at index 1, index 0 standard WFI */ 204 ret = dt_init_idle_driver(&bl_idle_big_driver, bl_idle_state_match, 1); 205 if (ret < 0) 206 goto out_uninit_big; 207 208 /* Start at index 1, index 0 standard WFI */ 209 ret = dt_init_idle_driver(&bl_idle_little_driver, 210 bl_idle_state_match, 1); 211 if (ret < 0) 212 goto out_uninit_big; 213 214 ret = cpuidle_register(&bl_idle_little_driver, NULL); 215 if (ret) 216 goto out_uninit_big; 217 218 ret = cpuidle_register(&bl_idle_big_driver, NULL); 219 if (ret) 220 goto out_unregister_little; 221 222 return 0; 223 224 out_unregister_little: 225 cpuidle_unregister(&bl_idle_little_driver); 226 out_uninit_big: 227 kfree(bl_idle_big_driver.cpumask); 228 out_uninit_little: 229 kfree(bl_idle_little_driver.cpumask); 230 231 return ret; 232 } 233 device_initcall(bl_idle_init); 234