1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Tegra 124 cpufreq driver 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #include <linux/clk.h> 9 #include <linux/cpufreq.h> 10 #include <linux/err.h> 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/of.h> 15 #include <linux/platform_device.h> 16 #include <linux/pm_opp.h> 17 #include <linux/types.h> 18 19 #include "cpufreq-dt.h" 20 21 static struct platform_device *tegra124_cpufreq_pdev; 22 23 struct tegra124_cpufreq_priv { 24 struct clk *cpu_clk; 25 struct clk *pllp_clk; 26 struct clk *pllx_clk; 27 struct clk *dfll_clk; 28 struct platform_device *cpufreq_dt_pdev; 29 }; 30 31 static int tegra124_cpu_switch_to_dfll(struct tegra124_cpufreq_priv *priv) 32 { 33 struct clk *orig_parent; 34 int ret; 35 36 ret = clk_set_rate(priv->dfll_clk, clk_get_rate(priv->cpu_clk)); 37 if (ret) 38 return ret; 39 40 orig_parent = clk_get_parent(priv->cpu_clk); 41 clk_set_parent(priv->cpu_clk, priv->pllp_clk); 42 43 ret = clk_prepare_enable(priv->dfll_clk); 44 if (ret) 45 goto out; 46 47 clk_set_parent(priv->cpu_clk, priv->dfll_clk); 48 49 return 0; 50 51 out: 52 clk_set_parent(priv->cpu_clk, orig_parent); 53 54 return ret; 55 } 56 57 static int tegra124_cpufreq_probe(struct platform_device *pdev) 58 { 59 struct device_node *np __free(device_node) = of_cpu_device_node_get(0); 60 struct tegra124_cpufreq_priv *priv; 61 struct device *cpu_dev; 62 int ret; 63 64 if (!np) 65 return -ENODEV; 66 67 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 68 if (!priv) 69 return -ENOMEM; 70 71 cpu_dev = get_cpu_device(0); 72 if (!cpu_dev) 73 return -ENODEV; 74 75 priv->cpu_clk = of_clk_get_by_name(np, "cpu_g"); 76 if (IS_ERR(priv->cpu_clk)) 77 return PTR_ERR(priv->cpu_clk); 78 79 priv->dfll_clk = of_clk_get_by_name(np, "dfll"); 80 if (IS_ERR(priv->dfll_clk)) { 81 ret = PTR_ERR(priv->dfll_clk); 82 goto out_put_cpu_clk; 83 } 84 85 priv->pllx_clk = of_clk_get_by_name(np, "pll_x"); 86 if (IS_ERR(priv->pllx_clk)) { 87 ret = PTR_ERR(priv->pllx_clk); 88 goto out_put_dfll_clk; 89 } 90 91 priv->pllp_clk = of_clk_get_by_name(np, "pll_p"); 92 if (IS_ERR(priv->pllp_clk)) { 93 ret = PTR_ERR(priv->pllp_clk); 94 goto out_put_pllx_clk; 95 } 96 97 ret = tegra124_cpu_switch_to_dfll(priv); 98 if (ret) 99 goto out_put_pllp_clk; 100 101 priv->cpufreq_dt_pdev = cpufreq_dt_pdev_register(&pdev->dev); 102 if (IS_ERR(priv->cpufreq_dt_pdev)) { 103 ret = PTR_ERR(priv->cpufreq_dt_pdev); 104 goto out_put_pllp_clk; 105 } 106 107 platform_set_drvdata(pdev, priv); 108 109 return 0; 110 111 out_put_pllp_clk: 112 clk_put(priv->pllp_clk); 113 out_put_pllx_clk: 114 clk_put(priv->pllx_clk); 115 out_put_dfll_clk: 116 clk_put(priv->dfll_clk); 117 out_put_cpu_clk: 118 clk_put(priv->cpu_clk); 119 120 return ret; 121 } 122 123 static int __maybe_unused tegra124_cpufreq_suspend(struct device *dev) 124 { 125 struct tegra124_cpufreq_priv *priv = dev_get_drvdata(dev); 126 int err; 127 128 /* 129 * PLLP rate 408Mhz is below the CPU Fmax at Vmin and is safe to 130 * use during suspend and resume. So, switch the CPU clock source 131 * to PLLP and disable DFLL. 132 */ 133 err = clk_set_parent(priv->cpu_clk, priv->pllp_clk); 134 if (err < 0) { 135 dev_err(dev, "failed to reparent to PLLP: %d\n", err); 136 return err; 137 } 138 139 clk_disable_unprepare(priv->dfll_clk); 140 141 return 0; 142 } 143 144 static int __maybe_unused tegra124_cpufreq_resume(struct device *dev) 145 { 146 struct tegra124_cpufreq_priv *priv = dev_get_drvdata(dev); 147 int err; 148 149 /* 150 * Warmboot code powers up the CPU with PLLP clock source. 151 * Enable DFLL clock and switch CPU clock source back to DFLL. 152 */ 153 err = clk_prepare_enable(priv->dfll_clk); 154 if (err < 0) { 155 dev_err(dev, "failed to enable DFLL clock for CPU: %d\n", err); 156 goto disable_cpufreq; 157 } 158 159 err = clk_set_parent(priv->cpu_clk, priv->dfll_clk); 160 if (err < 0) { 161 dev_err(dev, "failed to reparent to DFLL clock: %d\n", err); 162 goto disable_dfll; 163 } 164 165 return 0; 166 167 disable_dfll: 168 clk_disable_unprepare(priv->dfll_clk); 169 disable_cpufreq: 170 disable_cpufreq(); 171 172 return err; 173 } 174 175 static void tegra124_cpufreq_remove(struct platform_device *pdev) 176 { 177 struct tegra124_cpufreq_priv *priv = dev_get_drvdata(&pdev->dev); 178 179 if (!IS_ERR(priv->cpufreq_dt_pdev)) { 180 platform_device_unregister(priv->cpufreq_dt_pdev); 181 priv->cpufreq_dt_pdev = ERR_PTR(-ENODEV); 182 } 183 184 clk_put(priv->pllp_clk); 185 clk_put(priv->pllx_clk); 186 clk_put(priv->dfll_clk); 187 clk_put(priv->cpu_clk); 188 } 189 190 static const struct dev_pm_ops tegra124_cpufreq_pm_ops = { 191 SET_SYSTEM_SLEEP_PM_OPS(tegra124_cpufreq_suspend, 192 tegra124_cpufreq_resume) 193 }; 194 195 static struct platform_driver tegra124_cpufreq_platdrv = { 196 .driver.name = "cpufreq-tegra124", 197 .driver.pm = &tegra124_cpufreq_pm_ops, 198 .probe = tegra124_cpufreq_probe, 199 .remove = tegra124_cpufreq_remove, 200 }; 201 202 static int __init tegra_cpufreq_init(void) 203 { 204 int ret; 205 206 if (!(of_machine_is_compatible("nvidia,tegra114") || 207 of_machine_is_compatible("nvidia,tegra124") || 208 of_machine_is_compatible("nvidia,tegra210"))) 209 return -ENODEV; 210 211 /* 212 * Platform driver+device required for handling EPROBE_DEFER with 213 * the regulator and the DFLL clock 214 */ 215 ret = platform_driver_register(&tegra124_cpufreq_platdrv); 216 if (ret) 217 return ret; 218 219 tegra124_cpufreq_pdev = platform_device_register_simple("cpufreq-tegra124", -1, NULL, 0); 220 if (IS_ERR(tegra124_cpufreq_pdev)) { 221 platform_driver_unregister(&tegra124_cpufreq_platdrv); 222 return PTR_ERR(tegra124_cpufreq_pdev); 223 } 224 225 return 0; 226 } 227 module_init(tegra_cpufreq_init); 228 229 static void __exit tegra_cpufreq_module_exit(void) 230 { 231 if (!IS_ERR_OR_NULL(tegra124_cpufreq_pdev)) 232 platform_device_unregister(tegra124_cpufreq_pdev); 233 234 platform_driver_unregister(&tegra124_cpufreq_platdrv); 235 } 236 module_exit(tegra_cpufreq_module_exit); 237 238 MODULE_AUTHOR("Tuomas Tynkkynen <ttynkkynen@nvidia.com>"); 239 MODULE_DESCRIPTION("cpufreq driver for NVIDIA Tegra124"); 240 MODULE_LICENSE("GPL"); 241