1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2002,2003 Intrinsyc Software 4 * 5 * History: 6 * 31-Jul-2002 : Initial version [FB] 7 * 29-Jan-2003 : added PXA255 support [FB] 8 * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.) 9 * 10 * Note: 11 * This driver may change the memory bus clock rate, but will not do any 12 * platform specific access timing changes... for example if you have flash 13 * memory connected to CS0, you will need to register a platform specific 14 * notifier which will adjust the memory access strobes to maintain a 15 * minimum strobe width. 16 */ 17 18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 19 20 #include <linux/kernel.h> 21 #include <linux/module.h> 22 #include <linux/sched.h> 23 #include <linux/init.h> 24 #include <linux/cpufreq.h> 25 #include <linux/err.h> 26 #include <linux/regulator/consumer.h> 27 #include <linux/io.h> 28 29 #include <mach/pxa2xx-regs.h> 30 #include <mach/smemc.h> 31 32 #ifdef DEBUG 33 static unsigned int freq_debug; 34 module_param(freq_debug, uint, 0); 35 MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0"); 36 #else 37 #define freq_debug 0 38 #endif 39 40 static struct regulator *vcc_core; 41 42 static unsigned int pxa27x_maxfreq; 43 module_param(pxa27x_maxfreq, uint, 0); 44 MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz" 45 "(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)"); 46 47 struct pxa_cpufreq_data { 48 struct clk *clk_core; 49 }; 50 static struct pxa_cpufreq_data pxa_cpufreq_data; 51 52 struct pxa_freqs { 53 unsigned int khz; 54 int vmin; 55 int vmax; 56 }; 57 58 /* 59 * PXA255 definitions 60 */ 61 static const struct pxa_freqs pxa255_run_freqs[] = 62 { 63 /* CPU MEMBUS run turbo PXbus SDRAM */ 64 { 99500, -1, -1}, /* 99, 99, 50, 50 */ 65 {132700, -1, -1}, /* 133, 133, 66, 66 */ 66 {199100, -1, -1}, /* 199, 199, 99, 99 */ 67 {265400, -1, -1}, /* 265, 265, 133, 66 */ 68 {331800, -1, -1}, /* 331, 331, 166, 83 */ 69 {398100, -1, -1}, /* 398, 398, 196, 99 */ 70 }; 71 72 /* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ 73 static const struct pxa_freqs pxa255_turbo_freqs[] = 74 { 75 /* CPU run turbo PXbus SDRAM */ 76 { 99500, -1, -1}, /* 99, 99, 50, 50 */ 77 {199100, -1, -1}, /* 99, 199, 50, 99 */ 78 {298500, -1, -1}, /* 99, 287, 50, 99 */ 79 {298600, -1, -1}, /* 199, 287, 99, 99 */ 80 {398100, -1, -1}, /* 199, 398, 99, 99 */ 81 }; 82 83 #define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs) 84 #define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs) 85 86 static struct cpufreq_frequency_table 87 pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1]; 88 static struct cpufreq_frequency_table 89 pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1]; 90 91 static unsigned int pxa255_turbo_table; 92 module_param(pxa255_turbo_table, uint, 0); 93 MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table, !0 = turbo table)"); 94 95 static struct pxa_freqs pxa27x_freqs[] = { 96 {104000, 900000, 1705000 }, 97 {156000, 1000000, 1705000 }, 98 {208000, 1180000, 1705000 }, 99 {312000, 1250000, 1705000 }, 100 {416000, 1350000, 1705000 }, 101 {520000, 1450000, 1705000 }, 102 {624000, 1550000, 1705000 } 103 }; 104 105 #define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs) 106 static struct cpufreq_frequency_table 107 pxa27x_freq_table[NUM_PXA27x_FREQS+1]; 108 109 extern unsigned get_clk_frequency_khz(int info); 110 111 #ifdef CONFIG_REGULATOR 112 113 static int pxa_cpufreq_change_voltage(const struct pxa_freqs *pxa_freq) 114 { 115 int ret = 0; 116 int vmin, vmax; 117 118 if (!cpu_is_pxa27x()) 119 return 0; 120 121 vmin = pxa_freq->vmin; 122 vmax = pxa_freq->vmax; 123 if ((vmin == -1) || (vmax == -1)) 124 return 0; 125 126 ret = regulator_set_voltage(vcc_core, vmin, vmax); 127 if (ret) 128 pr_err("Failed to set vcc_core in [%dmV..%dmV]\n", vmin, vmax); 129 return ret; 130 } 131 132 static void pxa_cpufreq_init_voltages(void) 133 { 134 vcc_core = regulator_get(NULL, "vcc_core"); 135 if (IS_ERR(vcc_core)) { 136 pr_info("Didn't find vcc_core regulator\n"); 137 vcc_core = NULL; 138 } else { 139 pr_info("Found vcc_core regulator\n"); 140 } 141 } 142 #else 143 static int pxa_cpufreq_change_voltage(const struct pxa_freqs *pxa_freq) 144 { 145 return 0; 146 } 147 148 static void pxa_cpufreq_init_voltages(void) { } 149 #endif 150 151 static void find_freq_tables(struct cpufreq_frequency_table **freq_table, 152 const struct pxa_freqs **pxa_freqs) 153 { 154 if (cpu_is_pxa25x()) { 155 if (!pxa255_turbo_table) { 156 *pxa_freqs = pxa255_run_freqs; 157 *freq_table = pxa255_run_freq_table; 158 } else { 159 *pxa_freqs = pxa255_turbo_freqs; 160 *freq_table = pxa255_turbo_freq_table; 161 } 162 } else if (cpu_is_pxa27x()) { 163 *pxa_freqs = pxa27x_freqs; 164 *freq_table = pxa27x_freq_table; 165 } else { 166 BUG(); 167 } 168 } 169 170 static void pxa27x_guess_max_freq(void) 171 { 172 if (!pxa27x_maxfreq) { 173 pxa27x_maxfreq = 416000; 174 pr_info("PXA CPU 27x max frequency not defined (pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n", 175 pxa27x_maxfreq); 176 } else { 177 pxa27x_maxfreq *= 1000; 178 } 179 } 180 181 static unsigned int pxa_cpufreq_get(unsigned int cpu) 182 { 183 struct pxa_cpufreq_data *data = cpufreq_get_driver_data(); 184 185 return (unsigned int) clk_get_rate(data->clk_core) / 1000; 186 } 187 188 static int pxa_set_target(struct cpufreq_policy *policy, unsigned int idx) 189 { 190 struct cpufreq_frequency_table *pxa_freqs_table; 191 const struct pxa_freqs *pxa_freq_settings; 192 struct pxa_cpufreq_data *data = cpufreq_get_driver_data(); 193 unsigned int new_freq_cpu; 194 int ret = 0; 195 196 /* Get the current policy */ 197 find_freq_tables(&pxa_freqs_table, &pxa_freq_settings); 198 199 new_freq_cpu = pxa_freq_settings[idx].khz; 200 201 if (freq_debug) 202 pr_debug("Changing CPU frequency from %d Mhz to %d Mhz\n", 203 policy->cur / 1000, new_freq_cpu / 1000); 204 205 if (vcc_core && new_freq_cpu > policy->cur) { 206 ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]); 207 if (ret) 208 return ret; 209 } 210 211 clk_set_rate(data->clk_core, new_freq_cpu * 1000); 212 213 /* 214 * Even if voltage setting fails, we don't report it, as the frequency 215 * change succeeded. The voltage reduction is not a critical failure, 216 * only power savings will suffer from this. 217 * 218 * Note: if the voltage change fails, and a return value is returned, a 219 * bug is triggered (seems a deadlock). Should anybody find out where, 220 * the "return 0" should become a "return ret". 221 */ 222 if (vcc_core && new_freq_cpu < policy->cur) 223 ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]); 224 225 return 0; 226 } 227 228 static int pxa_cpufreq_init(struct cpufreq_policy *policy) 229 { 230 int i; 231 unsigned int freq; 232 struct cpufreq_frequency_table *pxa255_freq_table; 233 const struct pxa_freqs *pxa255_freqs; 234 235 /* try to guess pxa27x cpu */ 236 if (cpu_is_pxa27x()) 237 pxa27x_guess_max_freq(); 238 239 pxa_cpufreq_init_voltages(); 240 241 /* set default policy and cpuinfo */ 242 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ 243 244 /* Generate pxa25x the run cpufreq_frequency_table struct */ 245 for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) { 246 pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; 247 pxa255_run_freq_table[i].driver_data = i; 248 } 249 pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; 250 251 /* Generate pxa25x the turbo cpufreq_frequency_table struct */ 252 for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) { 253 pxa255_turbo_freq_table[i].frequency = 254 pxa255_turbo_freqs[i].khz; 255 pxa255_turbo_freq_table[i].driver_data = i; 256 } 257 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; 258 259 pxa255_turbo_table = !!pxa255_turbo_table; 260 261 /* Generate the pxa27x cpufreq_frequency_table struct */ 262 for (i = 0; i < NUM_PXA27x_FREQS; i++) { 263 freq = pxa27x_freqs[i].khz; 264 if (freq > pxa27x_maxfreq) 265 break; 266 pxa27x_freq_table[i].frequency = freq; 267 pxa27x_freq_table[i].driver_data = i; 268 } 269 pxa27x_freq_table[i].driver_data = i; 270 pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END; 271 272 /* 273 * Set the policy's minimum and maximum frequencies from the tables 274 * just constructed. This sets cpuinfo.mxx_freq, min and max. 275 */ 276 if (cpu_is_pxa25x()) { 277 find_freq_tables(&pxa255_freq_table, &pxa255_freqs); 278 pr_info("using %s frequency table\n", 279 pxa255_turbo_table ? "turbo" : "run"); 280 281 policy->freq_table = pxa255_freq_table; 282 } 283 else if (cpu_is_pxa27x()) { 284 policy->freq_table = pxa27x_freq_table; 285 } 286 287 pr_info("frequency change support initialized\n"); 288 289 return 0; 290 } 291 292 static struct cpufreq_driver pxa_cpufreq_driver = { 293 .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK, 294 .verify = cpufreq_generic_frequency_table_verify, 295 .target_index = pxa_set_target, 296 .init = pxa_cpufreq_init, 297 .get = pxa_cpufreq_get, 298 .name = "PXA2xx", 299 .driver_data = &pxa_cpufreq_data, 300 }; 301 302 static int __init pxa_cpu_init(void) 303 { 304 int ret = -ENODEV; 305 306 pxa_cpufreq_data.clk_core = clk_get_sys(NULL, "core"); 307 if (IS_ERR(pxa_cpufreq_data.clk_core)) 308 return PTR_ERR(pxa_cpufreq_data.clk_core); 309 310 if (cpu_is_pxa25x() || cpu_is_pxa27x()) 311 ret = cpufreq_register_driver(&pxa_cpufreq_driver); 312 return ret; 313 } 314 315 static void __exit pxa_cpu_exit(void) 316 { 317 cpufreq_unregister_driver(&pxa_cpufreq_driver); 318 } 319 320 321 MODULE_AUTHOR("Intrinsyc Software Inc."); 322 MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture"); 323 MODULE_LICENSE("GPL"); 324 module_init(pxa_cpu_init); 325 module_exit(pxa_cpu_exit); 326