1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * POWERNV cpufreq driver for the IBM POWER processors 4 * 5 * (C) Copyright IBM 2014 6 * 7 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com> 8 */ 9 10 #define pr_fmt(fmt) "powernv-cpufreq: " fmt 11 12 #include <linux/kernel.h> 13 #include <linux/sysfs.h> 14 #include <linux/cpumask.h> 15 #include <linux/module.h> 16 #include <linux/cpufreq.h> 17 #include <linux/smp.h> 18 #include <linux/of.h> 19 #include <linux/reboot.h> 20 #include <linux/slab.h> 21 #include <linux/string_choices.h> 22 #include <linux/cpu.h> 23 #include <linux/hashtable.h> 24 #include <trace/events/power.h> 25 26 #include <asm/cputhreads.h> 27 #include <asm/firmware.h> 28 #include <asm/reg.h> 29 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */ 30 #include <asm/opal.h> 31 #include <linux/timer.h> 32 33 #define POWERNV_MAX_PSTATES_ORDER 8 34 #define POWERNV_MAX_PSTATES (1UL << (POWERNV_MAX_PSTATES_ORDER)) 35 #define PMSR_PSAFE_ENABLE (1UL << 30) 36 #define PMSR_SPR_EM_DISABLE (1UL << 31) 37 #define MAX_PSTATE_SHIFT 32 38 #define LPSTATE_SHIFT 48 39 #define GPSTATE_SHIFT 56 40 #define MAX_NR_CHIPS 32 41 42 #define MAX_RAMP_DOWN_TIME 5120 43 /* 44 * On an idle system we want the global pstate to ramp-down from max value to 45 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and 46 * then ramp-down rapidly later on. 47 * 48 * This gives a percentage rampdown for time elapsed in milliseconds. 49 * ramp_down_percentage = ((ms * ms) >> 18) 50 * ~= 3.8 * (sec * sec) 51 * 52 * At 0 ms ramp_down_percent = 0 53 * At 5120 ms ramp_down_percent = 100 54 */ 55 #define ramp_down_percent(time) ((time * time) >> 18) 56 57 /* Interval after which the timer is queued to bring down global pstate */ 58 #define GPSTATE_TIMER_INTERVAL 2000 59 60 /** 61 * struct global_pstate_info - Per policy data structure to maintain history of 62 * global pstates 63 * @highest_lpstate_idx: The local pstate index from which we are 64 * ramping down 65 * @elapsed_time: Time in ms spent in ramping down from 66 * highest_lpstate_idx 67 * @last_sampled_time: Time from boot in ms when global pstates were 68 * last set 69 * @last_lpstate_idx: Last set value of local pstate and global 70 * @last_gpstate_idx: pstate in terms of cpufreq table index 71 * @timer: Is used for ramping down if cpu goes idle for 72 * a long time with global pstate held high 73 * @gpstate_lock: A spinlock to maintain synchronization between 74 * routines called by the timer handler and 75 * governer's target_index calls 76 * @policy: Associated CPUFreq policy 77 */ 78 struct global_pstate_info { 79 int highest_lpstate_idx; 80 unsigned int elapsed_time; 81 unsigned int last_sampled_time; 82 int last_lpstate_idx; 83 int last_gpstate_idx; 84 spinlock_t gpstate_lock; 85 struct timer_list timer; 86 struct cpufreq_policy *policy; 87 }; 88 89 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1]; 90 91 static DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER); 92 /** 93 * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap 94 * indexed by a function of pstate id. 95 * 96 * @pstate_id: pstate id for this entry. 97 * 98 * @cpufreq_table_idx: Index into the powernv_freqs 99 * cpufreq_frequency_table for frequency 100 * corresponding to pstate_id. 101 * 102 * @hentry: hlist_node that hooks this entry into the pstate_revmap 103 * hashtable 104 */ 105 struct pstate_idx_revmap_data { 106 u8 pstate_id; 107 unsigned int cpufreq_table_idx; 108 struct hlist_node hentry; 109 }; 110 111 static bool rebooting, throttled, occ_reset; 112 113 static const char * const throttle_reason[] = { 114 "No throttling", 115 "Power Cap", 116 "Processor Over Temperature", 117 "Power Supply Failure", 118 "Over Current", 119 "OCC Reset" 120 }; 121 122 enum throttle_reason_type { 123 NO_THROTTLE = 0, 124 POWERCAP, 125 CPU_OVERTEMP, 126 POWER_SUPPLY_FAILURE, 127 OVERCURRENT, 128 OCC_RESET_THROTTLE, 129 OCC_MAX_REASON 130 }; 131 132 static struct chip { 133 unsigned int id; 134 bool throttled; 135 bool restore; 136 u8 throttle_reason; 137 cpumask_t mask; 138 struct work_struct throttle; 139 int throttle_turbo; 140 int throttle_sub_turbo; 141 int reason[OCC_MAX_REASON]; 142 } *chips; 143 144 static int nr_chips; 145 static DEFINE_PER_CPU(struct chip *, chip_info); 146 147 /* 148 * Note: 149 * The set of pstates consists of contiguous integers. 150 * powernv_pstate_info stores the index of the frequency table for 151 * max, min and nominal frequencies. It also stores number of 152 * available frequencies. 153 * 154 * powernv_pstate_info.nominal indicates the index to the highest 155 * non-turbo frequency. 156 */ 157 static struct powernv_pstate_info { 158 unsigned int min; 159 unsigned int max; 160 unsigned int nominal; 161 unsigned int nr_pstates; 162 bool wof_enabled; 163 } powernv_pstate_info; 164 165 static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift) 166 { 167 return ((pmsr_val >> shift) & 0xFF); 168 } 169 170 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT) 171 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT) 172 #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT) 173 174 /* Use following functions for conversions between pstate_id and index */ 175 176 /* 177 * idx_to_pstate : Returns the pstate id corresponding to the 178 * frequency in the cpufreq frequency table 179 * powernv_freqs indexed by @i. 180 * 181 * If @i is out of bound, this will return the pstate 182 * corresponding to the nominal frequency. 183 */ 184 static inline u8 idx_to_pstate(unsigned int i) 185 { 186 if (unlikely(i >= powernv_pstate_info.nr_pstates)) { 187 pr_warn_once("idx_to_pstate: index %u is out of bound\n", i); 188 return powernv_freqs[powernv_pstate_info.nominal].driver_data; 189 } 190 191 return powernv_freqs[i].driver_data; 192 } 193 194 /* 195 * pstate_to_idx : Returns the index in the cpufreq frequencytable 196 * powernv_freqs for the frequency whose corresponding 197 * pstate id is @pstate. 198 * 199 * If no frequency corresponding to @pstate is found, 200 * this will return the index of the nominal 201 * frequency. 202 */ 203 static unsigned int pstate_to_idx(u8 pstate) 204 { 205 unsigned int key = pstate % POWERNV_MAX_PSTATES; 206 struct pstate_idx_revmap_data *revmap_data; 207 208 hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) { 209 if (revmap_data->pstate_id == pstate) 210 return revmap_data->cpufreq_table_idx; 211 } 212 213 pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate); 214 return powernv_pstate_info.nominal; 215 } 216 217 static inline void reset_gpstates(struct cpufreq_policy *policy) 218 { 219 struct global_pstate_info *gpstates = policy->driver_data; 220 221 gpstates->highest_lpstate_idx = 0; 222 gpstates->elapsed_time = 0; 223 gpstates->last_sampled_time = 0; 224 gpstates->last_lpstate_idx = 0; 225 gpstates->last_gpstate_idx = 0; 226 } 227 228 /* 229 * Initialize the freq table based on data obtained 230 * from the firmware passed via device-tree 231 */ 232 static int init_powernv_pstates(void) 233 { 234 struct device_node *power_mgt; 235 int i, nr_pstates = 0; 236 const __be32 *pstate_ids, *pstate_freqs; 237 u32 len_ids, len_freqs; 238 u32 pstate_min, pstate_max, pstate_nominal; 239 u32 pstate_turbo, pstate_ultra_turbo; 240 int rc = -ENODEV; 241 242 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 243 if (!power_mgt) { 244 pr_warn("power-mgt node not found\n"); 245 return -ENODEV; 246 } 247 248 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) { 249 pr_warn("ibm,pstate-min node not found\n"); 250 goto out; 251 } 252 253 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) { 254 pr_warn("ibm,pstate-max node not found\n"); 255 goto out; 256 } 257 258 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal", 259 &pstate_nominal)) { 260 pr_warn("ibm,pstate-nominal not found\n"); 261 goto out; 262 } 263 264 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo", 265 &pstate_ultra_turbo)) { 266 powernv_pstate_info.wof_enabled = false; 267 goto next; 268 } 269 270 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo", 271 &pstate_turbo)) { 272 powernv_pstate_info.wof_enabled = false; 273 goto next; 274 } 275 276 if (pstate_turbo == pstate_ultra_turbo) 277 powernv_pstate_info.wof_enabled = false; 278 else 279 powernv_pstate_info.wof_enabled = true; 280 281 next: 282 pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min, 283 pstate_nominal, pstate_max); 284 pr_info("Workload Optimized Frequency is %s in the platform\n", 285 str_enabled_disabled(powernv_pstate_info.wof_enabled)); 286 287 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids); 288 if (!pstate_ids) { 289 pr_warn("ibm,pstate-ids not found\n"); 290 goto out; 291 } 292 293 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz", 294 &len_freqs); 295 if (!pstate_freqs) { 296 pr_warn("ibm,pstate-frequencies-mhz not found\n"); 297 goto out; 298 } 299 300 if (len_ids != len_freqs) { 301 pr_warn("Entries in ibm,pstate-ids and " 302 "ibm,pstate-frequencies-mhz does not match\n"); 303 } 304 305 nr_pstates = min(len_ids, len_freqs) / sizeof(u32); 306 if (!nr_pstates) { 307 pr_warn("No PStates found\n"); 308 goto out; 309 } 310 311 powernv_pstate_info.nr_pstates = nr_pstates; 312 pr_debug("NR PStates %d\n", nr_pstates); 313 314 for (i = 0; i < nr_pstates; i++) { 315 u32 id = be32_to_cpu(pstate_ids[i]); 316 u32 freq = be32_to_cpu(pstate_freqs[i]); 317 struct pstate_idx_revmap_data *revmap_data; 318 unsigned int key; 319 320 pr_debug("PState id %d freq %d MHz\n", id, freq); 321 powernv_freqs[i].frequency = freq * 1000; /* kHz */ 322 powernv_freqs[i].driver_data = id & 0xFF; 323 324 revmap_data = kmalloc(sizeof(*revmap_data), GFP_KERNEL); 325 if (!revmap_data) { 326 rc = -ENOMEM; 327 goto out; 328 } 329 330 revmap_data->pstate_id = id & 0xFF; 331 revmap_data->cpufreq_table_idx = i; 332 key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES; 333 hash_add(pstate_revmap, &revmap_data->hentry, key); 334 335 if (id == pstate_max) 336 powernv_pstate_info.max = i; 337 if (id == pstate_nominal) 338 powernv_pstate_info.nominal = i; 339 if (id == pstate_min) 340 powernv_pstate_info.min = i; 341 342 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) { 343 int j; 344 345 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--) 346 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ; 347 } 348 } 349 350 /* End of list marker entry */ 351 powernv_freqs[i].frequency = CPUFREQ_TABLE_END; 352 353 of_node_put(power_mgt); 354 return 0; 355 out: 356 of_node_put(power_mgt); 357 return rc; 358 } 359 360 /* Returns the CPU frequency corresponding to the pstate_id. */ 361 static unsigned int pstate_id_to_freq(u8 pstate_id) 362 { 363 int i; 364 365 i = pstate_to_idx(pstate_id); 366 if (i >= powernv_pstate_info.nr_pstates || i < 0) { 367 pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n", 368 pstate_id, idx_to_pstate(powernv_pstate_info.nominal)); 369 i = powernv_pstate_info.nominal; 370 } 371 372 return powernv_freqs[i].frequency; 373 } 374 375 /* 376 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by 377 * the firmware 378 */ 379 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy, 380 char *buf) 381 { 382 return sprintf(buf, "%u\n", 383 powernv_freqs[powernv_pstate_info.nominal].frequency); 384 } 385 386 static struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq = 387 __ATTR_RO(cpuinfo_nominal_freq); 388 389 #define SCALING_BOOST_FREQS_ATTR_INDEX 2 390 391 static struct freq_attr *powernv_cpu_freq_attr[] = { 392 &cpufreq_freq_attr_scaling_available_freqs, 393 &cpufreq_freq_attr_cpuinfo_nominal_freq, 394 &cpufreq_freq_attr_scaling_boost_freqs, 395 NULL, 396 }; 397 398 #define throttle_attr(name, member) \ 399 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \ 400 { \ 401 struct chip *chip = per_cpu(chip_info, policy->cpu); \ 402 \ 403 return sprintf(buf, "%u\n", chip->member); \ 404 } \ 405 \ 406 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \ 407 408 throttle_attr(unthrottle, reason[NO_THROTTLE]); 409 throttle_attr(powercap, reason[POWERCAP]); 410 throttle_attr(overtemp, reason[CPU_OVERTEMP]); 411 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]); 412 throttle_attr(overcurrent, reason[OVERCURRENT]); 413 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]); 414 throttle_attr(turbo_stat, throttle_turbo); 415 throttle_attr(sub_turbo_stat, throttle_sub_turbo); 416 417 static struct attribute *throttle_attrs[] = { 418 &throttle_attr_unthrottle.attr, 419 &throttle_attr_powercap.attr, 420 &throttle_attr_overtemp.attr, 421 &throttle_attr_supply_fault.attr, 422 &throttle_attr_overcurrent.attr, 423 &throttle_attr_occ_reset.attr, 424 &throttle_attr_turbo_stat.attr, 425 &throttle_attr_sub_turbo_stat.attr, 426 NULL, 427 }; 428 429 static const struct attribute_group throttle_attr_grp = { 430 .name = "throttle_stats", 431 .attrs = throttle_attrs, 432 }; 433 434 /* Helper routines */ 435 436 /* Access helpers to power mgt SPR */ 437 438 static inline unsigned long get_pmspr(unsigned long sprn) 439 { 440 switch (sprn) { 441 case SPRN_PMCR: 442 return mfspr(SPRN_PMCR); 443 444 case SPRN_PMICR: 445 return mfspr(SPRN_PMICR); 446 447 case SPRN_PMSR: 448 return mfspr(SPRN_PMSR); 449 } 450 BUG(); 451 } 452 453 static inline void set_pmspr(unsigned long sprn, unsigned long val) 454 { 455 switch (sprn) { 456 case SPRN_PMCR: 457 mtspr(SPRN_PMCR, val); 458 return; 459 460 case SPRN_PMICR: 461 mtspr(SPRN_PMICR, val); 462 return; 463 } 464 BUG(); 465 } 466 467 /* 468 * Use objects of this type to query/update 469 * pstates on a remote CPU via smp_call_function. 470 */ 471 struct powernv_smp_call_data { 472 unsigned int freq; 473 u8 pstate_id; 474 u8 gpstate_id; 475 }; 476 477 /* 478 * powernv_read_cpu_freq: Reads the current frequency on this CPU. 479 * 480 * Called via smp_call_function. 481 * 482 * Note: The caller of the smp_call_function should pass an argument of 483 * the type 'struct powernv_smp_call_data *' along with this function. 484 * 485 * The current frequency on this CPU will be returned via 486 * ((struct powernv_smp_call_data *)arg)->freq; 487 */ 488 static void powernv_read_cpu_freq(void *arg) 489 { 490 unsigned long pmspr_val; 491 struct powernv_smp_call_data *freq_data = arg; 492 493 pmspr_val = get_pmspr(SPRN_PMSR); 494 freq_data->pstate_id = extract_local_pstate(pmspr_val); 495 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id); 496 497 pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n", 498 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id, 499 freq_data->freq); 500 } 501 502 /* 503 * powernv_cpufreq_get: Returns the CPU frequency as reported by the 504 * firmware for CPU 'cpu'. This value is reported through the sysfs 505 * file cpuinfo_cur_freq. 506 */ 507 static unsigned int powernv_cpufreq_get(unsigned int cpu) 508 { 509 struct powernv_smp_call_data freq_data; 510 511 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq, 512 &freq_data, 1); 513 514 return freq_data.freq; 515 } 516 517 /* 518 * set_pstate: Sets the pstate on this CPU. 519 * 520 * This is called via an smp_call_function. 521 * 522 * The caller must ensure that freq_data is of the type 523 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set 524 * on this CPU should be present in freq_data->pstate_id. 525 */ 526 static void set_pstate(void *data) 527 { 528 unsigned long val; 529 struct powernv_smp_call_data *freq_data = data; 530 unsigned long pstate_ul = freq_data->pstate_id; 531 unsigned long gpstate_ul = freq_data->gpstate_id; 532 533 val = get_pmspr(SPRN_PMCR); 534 val = val & 0x0000FFFFFFFFFFFFULL; 535 536 pstate_ul = pstate_ul & 0xFF; 537 gpstate_ul = gpstate_ul & 0xFF; 538 539 /* Set both global(bits 56..63) and local(bits 48..55) PStates */ 540 val = val | (gpstate_ul << 56) | (pstate_ul << 48); 541 542 pr_debug("Setting cpu %d pmcr to %016lX\n", 543 raw_smp_processor_id(), val); 544 set_pmspr(SPRN_PMCR, val); 545 } 546 547 /* 548 * get_nominal_index: Returns the index corresponding to the nominal 549 * pstate in the cpufreq table 550 */ 551 static inline unsigned int get_nominal_index(void) 552 { 553 return powernv_pstate_info.nominal; 554 } 555 556 static void powernv_cpufreq_throttle_check(void *data) 557 { 558 struct chip *chip; 559 unsigned int cpu = smp_processor_id(); 560 unsigned long pmsr; 561 u8 pmsr_pmax; 562 unsigned int pmsr_pmax_idx; 563 564 pmsr = get_pmspr(SPRN_PMSR); 565 chip = this_cpu_read(chip_info); 566 567 /* Check for Pmax Capping */ 568 pmsr_pmax = extract_max_pstate(pmsr); 569 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax); 570 if (pmsr_pmax_idx != powernv_pstate_info.max) { 571 if (chip->throttled) 572 goto next; 573 chip->throttled = true; 574 if (pmsr_pmax_idx > powernv_pstate_info.nominal) { 575 pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n", 576 cpu, chip->id, pmsr_pmax, 577 idx_to_pstate(powernv_pstate_info.nominal)); 578 chip->throttle_sub_turbo++; 579 } else { 580 chip->throttle_turbo++; 581 } 582 trace_powernv_throttle(chip->id, 583 throttle_reason[chip->throttle_reason], 584 pmsr_pmax); 585 } else if (chip->throttled) { 586 chip->throttled = false; 587 trace_powernv_throttle(chip->id, 588 throttle_reason[chip->throttle_reason], 589 pmsr_pmax); 590 } 591 592 /* Check if Psafe_mode_active is set in PMSR. */ 593 next: 594 if (pmsr & PMSR_PSAFE_ENABLE) { 595 throttled = true; 596 pr_info("Pstate set to safe frequency\n"); 597 } 598 599 /* Check if SPR_EM_DISABLE is set in PMSR */ 600 if (pmsr & PMSR_SPR_EM_DISABLE) { 601 throttled = true; 602 pr_info("Frequency Control disabled from OS\n"); 603 } 604 605 if (throttled) { 606 pr_info("PMSR = %16lx\n", pmsr); 607 pr_warn("CPU Frequency could be throttled\n"); 608 } 609 } 610 611 /** 612 * calc_global_pstate - Calculate global pstate 613 * @elapsed_time: Elapsed time in milliseconds 614 * @local_pstate_idx: New local pstate 615 * @highest_lpstate_idx: pstate from which its ramping down 616 * 617 * Finds the appropriate global pstate based on the pstate from which its 618 * ramping down and the time elapsed in ramping down. It follows a quadratic 619 * equation which ensures that it reaches ramping down to pmin in 5sec. 620 */ 621 static inline int calc_global_pstate(unsigned int elapsed_time, 622 int highest_lpstate_idx, 623 int local_pstate_idx) 624 { 625 int index_diff; 626 627 /* 628 * Using ramp_down_percent we get the percentage of rampdown 629 * that we are expecting to be dropping. Difference between 630 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute 631 * number of how many pstates we will drop eventually by the end of 632 * 5 seconds, then just scale it get the number pstates to be dropped. 633 */ 634 index_diff = ((int)ramp_down_percent(elapsed_time) * 635 (powernv_pstate_info.min - highest_lpstate_idx)) / 100; 636 637 /* Ensure that global pstate is >= to local pstate */ 638 if (highest_lpstate_idx + index_diff >= local_pstate_idx) 639 return local_pstate_idx; 640 else 641 return highest_lpstate_idx + index_diff; 642 } 643 644 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates) 645 { 646 unsigned int timer_interval; 647 648 /* 649 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But 650 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time. 651 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME 652 * seconds of ramp down time. 653 */ 654 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL) 655 > MAX_RAMP_DOWN_TIME) 656 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time; 657 else 658 timer_interval = GPSTATE_TIMER_INTERVAL; 659 660 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval)); 661 } 662 663 /** 664 * gpstate_timer_handler 665 * 666 * @t: Timer context used to fetch global pstate info struct 667 * 668 * This handler brings down the global pstate closer to the local pstate 669 * according quadratic equation. Queues a new timer if it is still not equal 670 * to local pstate 671 */ 672 static void gpstate_timer_handler(struct timer_list *t) 673 { 674 struct global_pstate_info *gpstates = from_timer(gpstates, t, timer); 675 struct cpufreq_policy *policy = gpstates->policy; 676 int gpstate_idx, lpstate_idx; 677 unsigned long val; 678 unsigned int time_diff = jiffies_to_msecs(jiffies) 679 - gpstates->last_sampled_time; 680 struct powernv_smp_call_data freq_data; 681 682 if (!spin_trylock(&gpstates->gpstate_lock)) 683 return; 684 /* 685 * If the timer has migrated to the different cpu then bring 686 * it back to one of the policy->cpus 687 */ 688 if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) { 689 gpstates->timer.expires = jiffies + msecs_to_jiffies(1); 690 add_timer_on(&gpstates->timer, cpumask_first(policy->cpus)); 691 spin_unlock(&gpstates->gpstate_lock); 692 return; 693 } 694 695 /* 696 * If PMCR was last updated was using fast_switch then 697 * We may have wrong in gpstate->last_lpstate_idx 698 * value. Hence, read from PMCR to get correct data. 699 */ 700 val = get_pmspr(SPRN_PMCR); 701 freq_data.gpstate_id = extract_global_pstate(val); 702 freq_data.pstate_id = extract_local_pstate(val); 703 if (freq_data.gpstate_id == freq_data.pstate_id) { 704 reset_gpstates(policy); 705 spin_unlock(&gpstates->gpstate_lock); 706 return; 707 } 708 709 gpstates->last_sampled_time += time_diff; 710 gpstates->elapsed_time += time_diff; 711 712 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 713 gpstate_idx = pstate_to_idx(freq_data.pstate_id); 714 lpstate_idx = gpstate_idx; 715 reset_gpstates(policy); 716 gpstates->highest_lpstate_idx = gpstate_idx; 717 } else { 718 lpstate_idx = pstate_to_idx(freq_data.pstate_id); 719 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 720 gpstates->highest_lpstate_idx, 721 lpstate_idx); 722 } 723 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 724 gpstates->last_gpstate_idx = gpstate_idx; 725 gpstates->last_lpstate_idx = lpstate_idx; 726 /* 727 * If local pstate is equal to global pstate, rampdown is over 728 * So timer is not required to be queued. 729 */ 730 if (gpstate_idx != gpstates->last_lpstate_idx) 731 queue_gpstate_timer(gpstates); 732 733 set_pstate(&freq_data); 734 spin_unlock(&gpstates->gpstate_lock); 735 } 736 737 /* 738 * powernv_cpufreq_target_index: Sets the frequency corresponding to 739 * the cpufreq table entry indexed by new_index on the cpus in the 740 * mask policy->cpus 741 */ 742 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy, 743 unsigned int new_index) 744 { 745 struct powernv_smp_call_data freq_data; 746 unsigned int cur_msec, gpstate_idx; 747 struct global_pstate_info *gpstates = policy->driver_data; 748 749 if (unlikely(rebooting) && new_index != get_nominal_index()) 750 return 0; 751 752 if (!throttled) { 753 /* we don't want to be preempted while 754 * checking if the CPU frequency has been throttled 755 */ 756 preempt_disable(); 757 powernv_cpufreq_throttle_check(NULL); 758 preempt_enable(); 759 } 760 761 cur_msec = jiffies_to_msecs(get_jiffies_64()); 762 763 freq_data.pstate_id = idx_to_pstate(new_index); 764 if (!gpstates) { 765 freq_data.gpstate_id = freq_data.pstate_id; 766 goto no_gpstate; 767 } 768 769 spin_lock(&gpstates->gpstate_lock); 770 771 if (!gpstates->last_sampled_time) { 772 gpstate_idx = new_index; 773 gpstates->highest_lpstate_idx = new_index; 774 goto gpstates_done; 775 } 776 777 if (gpstates->last_gpstate_idx < new_index) { 778 gpstates->elapsed_time += cur_msec - 779 gpstates->last_sampled_time; 780 781 /* 782 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME 783 * we should be resetting all global pstate related data. Set it 784 * equal to local pstate to start fresh. 785 */ 786 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 787 reset_gpstates(policy); 788 gpstates->highest_lpstate_idx = new_index; 789 gpstate_idx = new_index; 790 } else { 791 /* Elaspsed_time is less than 5 seconds, continue to rampdown */ 792 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 793 gpstates->highest_lpstate_idx, 794 new_index); 795 } 796 } else { 797 reset_gpstates(policy); 798 gpstates->highest_lpstate_idx = new_index; 799 gpstate_idx = new_index; 800 } 801 802 /* 803 * If local pstate is equal to global pstate, rampdown is over 804 * So timer is not required to be queued. 805 */ 806 if (gpstate_idx != new_index) 807 queue_gpstate_timer(gpstates); 808 else 809 del_timer_sync(&gpstates->timer); 810 811 gpstates_done: 812 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 813 gpstates->last_sampled_time = cur_msec; 814 gpstates->last_gpstate_idx = gpstate_idx; 815 gpstates->last_lpstate_idx = new_index; 816 817 spin_unlock(&gpstates->gpstate_lock); 818 819 no_gpstate: 820 /* 821 * Use smp_call_function to send IPI and execute the 822 * mtspr on target CPU. We could do that without IPI 823 * if current CPU is within policy->cpus (core) 824 */ 825 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); 826 return 0; 827 } 828 829 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy) 830 { 831 int base, i; 832 struct kernfs_node *kn; 833 struct global_pstate_info *gpstates; 834 835 base = cpu_first_thread_sibling(policy->cpu); 836 837 for (i = 0; i < threads_per_core; i++) 838 cpumask_set_cpu(base + i, policy->cpus); 839 840 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name); 841 if (!kn) { 842 int ret; 843 844 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp); 845 if (ret) { 846 pr_info("Failed to create throttle stats directory for cpu %d\n", 847 policy->cpu); 848 return ret; 849 } 850 } else { 851 kernfs_put(kn); 852 } 853 854 policy->freq_table = powernv_freqs; 855 policy->fast_switch_possible = true; 856 857 if (pvr_version_is(PVR_POWER9)) 858 return 0; 859 860 /* Initialise Gpstate ramp-down timer only on POWER8 */ 861 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL); 862 if (!gpstates) 863 return -ENOMEM; 864 865 policy->driver_data = gpstates; 866 867 /* initialize timer */ 868 gpstates->policy = policy; 869 timer_setup(&gpstates->timer, gpstate_timer_handler, 870 TIMER_PINNED | TIMER_DEFERRABLE); 871 gpstates->timer.expires = jiffies + 872 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL); 873 spin_lock_init(&gpstates->gpstate_lock); 874 875 return 0; 876 } 877 878 static void powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy) 879 { 880 struct powernv_smp_call_data freq_data; 881 struct global_pstate_info *gpstates = policy->driver_data; 882 883 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min); 884 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min); 885 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1); 886 if (gpstates) 887 del_timer_sync(&gpstates->timer); 888 889 kfree(policy->driver_data); 890 } 891 892 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb, 893 unsigned long action, void *unused) 894 { 895 int cpu; 896 struct cpufreq_policy *cpu_policy; 897 898 rebooting = true; 899 for_each_online_cpu(cpu) { 900 cpu_policy = cpufreq_cpu_get(cpu); 901 if (!cpu_policy) 902 continue; 903 powernv_cpufreq_target_index(cpu_policy, get_nominal_index()); 904 cpufreq_cpu_put(cpu_policy); 905 } 906 907 return NOTIFY_DONE; 908 } 909 910 static struct notifier_block powernv_cpufreq_reboot_nb = { 911 .notifier_call = powernv_cpufreq_reboot_notifier, 912 }; 913 914 static void powernv_cpufreq_work_fn(struct work_struct *work) 915 { 916 struct chip *chip = container_of(work, struct chip, throttle); 917 struct cpufreq_policy *policy; 918 unsigned int cpu; 919 cpumask_t mask; 920 921 cpus_read_lock(); 922 cpumask_and(&mask, &chip->mask, cpu_online_mask); 923 smp_call_function_any(&mask, 924 powernv_cpufreq_throttle_check, NULL, 0); 925 926 if (!chip->restore) 927 goto out; 928 929 chip->restore = false; 930 for_each_cpu(cpu, &mask) { 931 int index; 932 933 policy = cpufreq_cpu_get(cpu); 934 if (!policy) 935 continue; 936 index = cpufreq_table_find_index_c(policy, policy->cur, false); 937 powernv_cpufreq_target_index(policy, index); 938 cpumask_andnot(&mask, &mask, policy->cpus); 939 cpufreq_cpu_put(policy); 940 } 941 out: 942 cpus_read_unlock(); 943 } 944 945 static int powernv_cpufreq_occ_msg(struct notifier_block *nb, 946 unsigned long msg_type, void *_msg) 947 { 948 struct opal_msg *msg = _msg; 949 struct opal_occ_msg omsg; 950 int i; 951 952 if (msg_type != OPAL_MSG_OCC) 953 return 0; 954 955 omsg.type = be64_to_cpu(msg->params[0]); 956 957 switch (omsg.type) { 958 case OCC_RESET: 959 occ_reset = true; 960 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n"); 961 /* 962 * powernv_cpufreq_throttle_check() is called in 963 * target() callback which can detect the throttle state 964 * for governors like ondemand. 965 * But static governors will not call target() often thus 966 * report throttling here. 967 */ 968 if (!throttled) { 969 throttled = true; 970 pr_warn("CPU frequency is throttled for duration\n"); 971 } 972 973 break; 974 case OCC_LOAD: 975 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n"); 976 break; 977 case OCC_THROTTLE: 978 omsg.chip = be64_to_cpu(msg->params[1]); 979 omsg.throttle_status = be64_to_cpu(msg->params[2]); 980 981 if (occ_reset) { 982 occ_reset = false; 983 throttled = false; 984 pr_info("OCC Active, CPU frequency is no longer throttled\n"); 985 986 for (i = 0; i < nr_chips; i++) { 987 chips[i].restore = true; 988 schedule_work(&chips[i].throttle); 989 } 990 991 return 0; 992 } 993 994 for (i = 0; i < nr_chips; i++) 995 if (chips[i].id == omsg.chip) 996 break; 997 998 if (omsg.throttle_status >= 0 && 999 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) { 1000 chips[i].throttle_reason = omsg.throttle_status; 1001 chips[i].reason[omsg.throttle_status]++; 1002 } 1003 1004 if (!omsg.throttle_status) 1005 chips[i].restore = true; 1006 1007 schedule_work(&chips[i].throttle); 1008 } 1009 return 0; 1010 } 1011 1012 static struct notifier_block powernv_cpufreq_opal_nb = { 1013 .notifier_call = powernv_cpufreq_occ_msg, 1014 .next = NULL, 1015 .priority = 0, 1016 }; 1017 1018 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy, 1019 unsigned int target_freq) 1020 { 1021 int index; 1022 struct powernv_smp_call_data freq_data; 1023 1024 index = cpufreq_table_find_index_dl(policy, target_freq, false); 1025 freq_data.pstate_id = powernv_freqs[index].driver_data; 1026 freq_data.gpstate_id = powernv_freqs[index].driver_data; 1027 set_pstate(&freq_data); 1028 1029 return powernv_freqs[index].frequency; 1030 } 1031 1032 static struct cpufreq_driver powernv_cpufreq_driver = { 1033 .name = "powernv-cpufreq", 1034 .flags = CPUFREQ_CONST_LOOPS, 1035 .init = powernv_cpufreq_cpu_init, 1036 .exit = powernv_cpufreq_cpu_exit, 1037 .verify = cpufreq_generic_frequency_table_verify, 1038 .target_index = powernv_cpufreq_target_index, 1039 .fast_switch = powernv_fast_switch, 1040 .get = powernv_cpufreq_get, 1041 .attr = powernv_cpu_freq_attr, 1042 }; 1043 1044 static int init_chip_info(void) 1045 { 1046 unsigned int *chip; 1047 unsigned int cpu, i; 1048 unsigned int prev_chip_id = UINT_MAX; 1049 cpumask_t *chip_cpu_mask; 1050 int ret = 0; 1051 1052 chip = kcalloc(num_possible_cpus(), sizeof(*chip), GFP_KERNEL); 1053 if (!chip) 1054 return -ENOMEM; 1055 1056 /* Allocate a chip cpu mask large enough to fit mask for all chips */ 1057 chip_cpu_mask = kcalloc(MAX_NR_CHIPS, sizeof(cpumask_t), GFP_KERNEL); 1058 if (!chip_cpu_mask) { 1059 ret = -ENOMEM; 1060 goto free_and_return; 1061 } 1062 1063 for_each_possible_cpu(cpu) { 1064 unsigned int id = cpu_to_chip_id(cpu); 1065 1066 if (prev_chip_id != id) { 1067 prev_chip_id = id; 1068 chip[nr_chips++] = id; 1069 } 1070 cpumask_set_cpu(cpu, &chip_cpu_mask[nr_chips-1]); 1071 } 1072 1073 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL); 1074 if (!chips) { 1075 ret = -ENOMEM; 1076 goto out_free_chip_cpu_mask; 1077 } 1078 1079 for (i = 0; i < nr_chips; i++) { 1080 chips[i].id = chip[i]; 1081 cpumask_copy(&chips[i].mask, &chip_cpu_mask[i]); 1082 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn); 1083 for_each_cpu(cpu, &chips[i].mask) 1084 per_cpu(chip_info, cpu) = &chips[i]; 1085 } 1086 1087 out_free_chip_cpu_mask: 1088 kfree(chip_cpu_mask); 1089 free_and_return: 1090 kfree(chip); 1091 return ret; 1092 } 1093 1094 static inline void clean_chip_info(void) 1095 { 1096 int i; 1097 1098 /* flush any pending work items */ 1099 if (chips) 1100 for (i = 0; i < nr_chips; i++) 1101 cancel_work_sync(&chips[i].throttle); 1102 kfree(chips); 1103 } 1104 1105 static inline void unregister_all_notifiers(void) 1106 { 1107 opal_message_notifier_unregister(OPAL_MSG_OCC, 1108 &powernv_cpufreq_opal_nb); 1109 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb); 1110 } 1111 1112 static int __init powernv_cpufreq_init(void) 1113 { 1114 int rc = 0; 1115 1116 /* Don't probe on pseries (guest) platforms */ 1117 if (!firmware_has_feature(FW_FEATURE_OPAL)) 1118 return -ENODEV; 1119 1120 /* Discover pstates from device tree and init */ 1121 rc = init_powernv_pstates(); 1122 if (rc) 1123 goto out; 1124 1125 /* Populate chip info */ 1126 rc = init_chip_info(); 1127 if (rc) 1128 goto out; 1129 1130 if (powernv_pstate_info.wof_enabled) 1131 powernv_cpufreq_driver.boost_enabled = true; 1132 else 1133 powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL; 1134 1135 rc = cpufreq_register_driver(&powernv_cpufreq_driver); 1136 if (rc) { 1137 pr_info("Failed to register the cpufreq driver (%d)\n", rc); 1138 goto cleanup; 1139 } 1140 1141 if (powernv_pstate_info.wof_enabled) 1142 cpufreq_enable_boost_support(); 1143 1144 register_reboot_notifier(&powernv_cpufreq_reboot_nb); 1145 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb); 1146 1147 return 0; 1148 cleanup: 1149 clean_chip_info(); 1150 out: 1151 pr_info("Platform driver disabled. System does not support PState control\n"); 1152 return rc; 1153 } 1154 module_init(powernv_cpufreq_init); 1155 1156 static void __exit powernv_cpufreq_exit(void) 1157 { 1158 cpufreq_unregister_driver(&powernv_cpufreq_driver); 1159 unregister_all_notifiers(); 1160 clean_chip_info(); 1161 } 1162 module_exit(powernv_cpufreq_exit); 1163 1164 MODULE_DESCRIPTION("cpufreq driver for IBM/OpenPOWER powernv systems"); 1165 MODULE_LICENSE("GPL"); 1166 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>"); 1167