1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * POWERNV cpufreq driver for the IBM POWER processors 4 * 5 * (C) Copyright IBM 2014 6 * 7 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com> 8 */ 9 10 #define pr_fmt(fmt) "powernv-cpufreq: " fmt 11 12 #include <linux/kernel.h> 13 #include <linux/sysfs.h> 14 #include <linux/cpumask.h> 15 #include <linux/module.h> 16 #include <linux/cpufreq.h> 17 #include <linux/smp.h> 18 #include <linux/of.h> 19 #include <linux/reboot.h> 20 #include <linux/slab.h> 21 #include <linux/string_choices.h> 22 #include <linux/cpu.h> 23 #include <linux/hashtable.h> 24 #include <trace/events/power.h> 25 26 #include <asm/cputhreads.h> 27 #include <asm/firmware.h> 28 #include <asm/reg.h> 29 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */ 30 #include <asm/opal.h> 31 #include <linux/timer.h> 32 33 #define POWERNV_MAX_PSTATES_ORDER 8 34 #define POWERNV_MAX_PSTATES (1UL << (POWERNV_MAX_PSTATES_ORDER)) 35 #define PMSR_PSAFE_ENABLE (1UL << 30) 36 #define PMSR_SPR_EM_DISABLE (1UL << 31) 37 #define MAX_PSTATE_SHIFT 32 38 #define LPSTATE_SHIFT 48 39 #define GPSTATE_SHIFT 56 40 #define MAX_NR_CHIPS 32 41 42 #define MAX_RAMP_DOWN_TIME 5120 43 /* 44 * On an idle system we want the global pstate to ramp-down from max value to 45 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and 46 * then ramp-down rapidly later on. 47 * 48 * This gives a percentage rampdown for time elapsed in milliseconds. 49 * ramp_down_percentage = ((ms * ms) >> 18) 50 * ~= 3.8 * (sec * sec) 51 * 52 * At 0 ms ramp_down_percent = 0 53 * At 5120 ms ramp_down_percent = 100 54 */ 55 #define ramp_down_percent(time) ((time * time) >> 18) 56 57 /* Interval after which the timer is queued to bring down global pstate */ 58 #define GPSTATE_TIMER_INTERVAL 2000 59 60 /** 61 * struct global_pstate_info - Per policy data structure to maintain history of 62 * global pstates 63 * @highest_lpstate_idx: The local pstate index from which we are 64 * ramping down 65 * @elapsed_time: Time in ms spent in ramping down from 66 * highest_lpstate_idx 67 * @last_sampled_time: Time from boot in ms when global pstates were 68 * last set 69 * @last_lpstate_idx: Last set value of local pstate and global 70 * @last_gpstate_idx: pstate in terms of cpufreq table index 71 * @timer: Is used for ramping down if cpu goes idle for 72 * a long time with global pstate held high 73 * @gpstate_lock: A spinlock to maintain synchronization between 74 * routines called by the timer handler and 75 * governer's target_index calls 76 * @policy: Associated CPUFreq policy 77 */ 78 struct global_pstate_info { 79 int highest_lpstate_idx; 80 unsigned int elapsed_time; 81 unsigned int last_sampled_time; 82 int last_lpstate_idx; 83 int last_gpstate_idx; 84 spinlock_t gpstate_lock; 85 struct timer_list timer; 86 struct cpufreq_policy *policy; 87 }; 88 89 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1]; 90 91 static DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER); 92 /** 93 * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap 94 * indexed by a function of pstate id. 95 * 96 * @pstate_id: pstate id for this entry. 97 * 98 * @cpufreq_table_idx: Index into the powernv_freqs 99 * cpufreq_frequency_table for frequency 100 * corresponding to pstate_id. 101 * 102 * @hentry: hlist_node that hooks this entry into the pstate_revmap 103 * hashtable 104 */ 105 struct pstate_idx_revmap_data { 106 u8 pstate_id; 107 unsigned int cpufreq_table_idx; 108 struct hlist_node hentry; 109 }; 110 111 static bool rebooting, throttled, occ_reset; 112 113 static const char * const throttle_reason[] = { 114 "No throttling", 115 "Power Cap", 116 "Processor Over Temperature", 117 "Power Supply Failure", 118 "Over Current", 119 "OCC Reset" 120 }; 121 122 enum throttle_reason_type { 123 NO_THROTTLE = 0, 124 POWERCAP, 125 CPU_OVERTEMP, 126 POWER_SUPPLY_FAILURE, 127 OVERCURRENT, 128 OCC_RESET_THROTTLE, 129 OCC_MAX_REASON 130 }; 131 132 static struct chip { 133 unsigned int id; 134 bool throttled; 135 bool restore; 136 u8 throttle_reason; 137 cpumask_t mask; 138 struct work_struct throttle; 139 int throttle_turbo; 140 int throttle_sub_turbo; 141 int reason[OCC_MAX_REASON]; 142 } *chips; 143 144 static int nr_chips; 145 static DEFINE_PER_CPU(struct chip *, chip_info); 146 147 /* 148 * Note: 149 * The set of pstates consists of contiguous integers. 150 * powernv_pstate_info stores the index of the frequency table for 151 * max, min and nominal frequencies. It also stores number of 152 * available frequencies. 153 * 154 * powernv_pstate_info.nominal indicates the index to the highest 155 * non-turbo frequency. 156 */ 157 static struct powernv_pstate_info { 158 unsigned int min; 159 unsigned int max; 160 unsigned int nominal; 161 unsigned int nr_pstates; 162 bool wof_enabled; 163 } powernv_pstate_info; 164 165 static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift) 166 { 167 return ((pmsr_val >> shift) & 0xFF); 168 } 169 170 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT) 171 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT) 172 #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT) 173 174 /* Use following functions for conversions between pstate_id and index */ 175 176 /* 177 * idx_to_pstate : Returns the pstate id corresponding to the 178 * frequency in the cpufreq frequency table 179 * powernv_freqs indexed by @i. 180 * 181 * If @i is out of bound, this will return the pstate 182 * corresponding to the nominal frequency. 183 */ 184 static inline u8 idx_to_pstate(unsigned int i) 185 { 186 if (unlikely(i >= powernv_pstate_info.nr_pstates)) { 187 pr_warn_once("idx_to_pstate: index %u is out of bound\n", i); 188 return powernv_freqs[powernv_pstate_info.nominal].driver_data; 189 } 190 191 return powernv_freqs[i].driver_data; 192 } 193 194 /* 195 * pstate_to_idx : Returns the index in the cpufreq frequencytable 196 * powernv_freqs for the frequency whose corresponding 197 * pstate id is @pstate. 198 * 199 * If no frequency corresponding to @pstate is found, 200 * this will return the index of the nominal 201 * frequency. 202 */ 203 static unsigned int pstate_to_idx(u8 pstate) 204 { 205 unsigned int key = pstate % POWERNV_MAX_PSTATES; 206 struct pstate_idx_revmap_data *revmap_data; 207 208 hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) { 209 if (revmap_data->pstate_id == pstate) 210 return revmap_data->cpufreq_table_idx; 211 } 212 213 pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate); 214 return powernv_pstate_info.nominal; 215 } 216 217 static inline void reset_gpstates(struct cpufreq_policy *policy) 218 { 219 struct global_pstate_info *gpstates = policy->driver_data; 220 221 gpstates->highest_lpstate_idx = 0; 222 gpstates->elapsed_time = 0; 223 gpstates->last_sampled_time = 0; 224 gpstates->last_lpstate_idx = 0; 225 gpstates->last_gpstate_idx = 0; 226 } 227 228 /* 229 * Initialize the freq table based on data obtained 230 * from the firmware passed via device-tree 231 */ 232 static int init_powernv_pstates(void) 233 { 234 struct device_node *power_mgt; 235 int i, nr_pstates = 0; 236 const __be32 *pstate_ids, *pstate_freqs; 237 u32 len_ids, len_freqs; 238 u32 pstate_min, pstate_max, pstate_nominal; 239 u32 pstate_turbo, pstate_ultra_turbo; 240 int rc = -ENODEV; 241 242 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 243 if (!power_mgt) { 244 pr_warn("power-mgt node not found\n"); 245 return -ENODEV; 246 } 247 248 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) { 249 pr_warn("ibm,pstate-min node not found\n"); 250 goto out; 251 } 252 253 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) { 254 pr_warn("ibm,pstate-max node not found\n"); 255 goto out; 256 } 257 258 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal", 259 &pstate_nominal)) { 260 pr_warn("ibm,pstate-nominal not found\n"); 261 goto out; 262 } 263 264 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo", 265 &pstate_ultra_turbo)) { 266 powernv_pstate_info.wof_enabled = false; 267 goto next; 268 } 269 270 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo", 271 &pstate_turbo)) { 272 powernv_pstate_info.wof_enabled = false; 273 goto next; 274 } 275 276 if (pstate_turbo == pstate_ultra_turbo) 277 powernv_pstate_info.wof_enabled = false; 278 else 279 powernv_pstate_info.wof_enabled = true; 280 281 next: 282 pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min, 283 pstate_nominal, pstate_max); 284 pr_info("Workload Optimized Frequency is %s in the platform\n", 285 str_enabled_disabled(powernv_pstate_info.wof_enabled)); 286 287 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids); 288 if (!pstate_ids) { 289 pr_warn("ibm,pstate-ids not found\n"); 290 goto out; 291 } 292 293 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz", 294 &len_freqs); 295 if (!pstate_freqs) { 296 pr_warn("ibm,pstate-frequencies-mhz not found\n"); 297 goto out; 298 } 299 300 if (len_ids != len_freqs) { 301 pr_warn("Entries in ibm,pstate-ids and " 302 "ibm,pstate-frequencies-mhz does not match\n"); 303 } 304 305 nr_pstates = min(len_ids, len_freqs) / sizeof(u32); 306 if (!nr_pstates) { 307 pr_warn("No PStates found\n"); 308 goto out; 309 } 310 311 powernv_pstate_info.nr_pstates = nr_pstates; 312 pr_debug("NR PStates %d\n", nr_pstates); 313 314 for (i = 0; i < nr_pstates; i++) { 315 u32 id = be32_to_cpu(pstate_ids[i]); 316 u32 freq = be32_to_cpu(pstate_freqs[i]); 317 struct pstate_idx_revmap_data *revmap_data; 318 unsigned int key; 319 320 pr_debug("PState id %d freq %d MHz\n", id, freq); 321 powernv_freqs[i].frequency = freq * 1000; /* kHz */ 322 powernv_freqs[i].driver_data = id & 0xFF; 323 324 revmap_data = kmalloc(sizeof(*revmap_data), GFP_KERNEL); 325 if (!revmap_data) { 326 rc = -ENOMEM; 327 goto out; 328 } 329 330 revmap_data->pstate_id = id & 0xFF; 331 revmap_data->cpufreq_table_idx = i; 332 key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES; 333 hash_add(pstate_revmap, &revmap_data->hentry, key); 334 335 if (id == pstate_max) 336 powernv_pstate_info.max = i; 337 if (id == pstate_nominal) 338 powernv_pstate_info.nominal = i; 339 if (id == pstate_min) 340 powernv_pstate_info.min = i; 341 342 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) { 343 int j; 344 345 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--) 346 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ; 347 } 348 } 349 350 /* End of list marker entry */ 351 powernv_freqs[i].frequency = CPUFREQ_TABLE_END; 352 353 of_node_put(power_mgt); 354 return 0; 355 out: 356 of_node_put(power_mgt); 357 return rc; 358 } 359 360 /* Returns the CPU frequency corresponding to the pstate_id. */ 361 static unsigned int pstate_id_to_freq(u8 pstate_id) 362 { 363 int i; 364 365 i = pstate_to_idx(pstate_id); 366 if (i >= powernv_pstate_info.nr_pstates || i < 0) { 367 pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n", 368 pstate_id, idx_to_pstate(powernv_pstate_info.nominal)); 369 i = powernv_pstate_info.nominal; 370 } 371 372 return powernv_freqs[i].frequency; 373 } 374 375 /* 376 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by 377 * the firmware 378 */ 379 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy, 380 char *buf) 381 { 382 return sprintf(buf, "%u\n", 383 powernv_freqs[powernv_pstate_info.nominal].frequency); 384 } 385 386 static struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq = 387 __ATTR_RO(cpuinfo_nominal_freq); 388 389 static struct freq_attr *powernv_cpu_freq_attr[] = { 390 &cpufreq_freq_attr_cpuinfo_nominal_freq, 391 NULL, 392 }; 393 394 #define throttle_attr(name, member) \ 395 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \ 396 { \ 397 struct chip *chip = per_cpu(chip_info, policy->cpu); \ 398 \ 399 return sprintf(buf, "%u\n", chip->member); \ 400 } \ 401 \ 402 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \ 403 404 throttle_attr(unthrottle, reason[NO_THROTTLE]); 405 throttle_attr(powercap, reason[POWERCAP]); 406 throttle_attr(overtemp, reason[CPU_OVERTEMP]); 407 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]); 408 throttle_attr(overcurrent, reason[OVERCURRENT]); 409 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]); 410 throttle_attr(turbo_stat, throttle_turbo); 411 throttle_attr(sub_turbo_stat, throttle_sub_turbo); 412 413 static struct attribute *throttle_attrs[] = { 414 &throttle_attr_unthrottle.attr, 415 &throttle_attr_powercap.attr, 416 &throttle_attr_overtemp.attr, 417 &throttle_attr_supply_fault.attr, 418 &throttle_attr_overcurrent.attr, 419 &throttle_attr_occ_reset.attr, 420 &throttle_attr_turbo_stat.attr, 421 &throttle_attr_sub_turbo_stat.attr, 422 NULL, 423 }; 424 425 static const struct attribute_group throttle_attr_grp = { 426 .name = "throttle_stats", 427 .attrs = throttle_attrs, 428 }; 429 430 /* Helper routines */ 431 432 /* Access helpers to power mgt SPR */ 433 434 static inline unsigned long get_pmspr(unsigned long sprn) 435 { 436 switch (sprn) { 437 case SPRN_PMCR: 438 return mfspr(SPRN_PMCR); 439 440 case SPRN_PMICR: 441 return mfspr(SPRN_PMICR); 442 443 case SPRN_PMSR: 444 return mfspr(SPRN_PMSR); 445 } 446 BUG(); 447 } 448 449 static inline void set_pmspr(unsigned long sprn, unsigned long val) 450 { 451 switch (sprn) { 452 case SPRN_PMCR: 453 mtspr(SPRN_PMCR, val); 454 return; 455 456 case SPRN_PMICR: 457 mtspr(SPRN_PMICR, val); 458 return; 459 } 460 BUG(); 461 } 462 463 /* 464 * Use objects of this type to query/update 465 * pstates on a remote CPU via smp_call_function. 466 */ 467 struct powernv_smp_call_data { 468 unsigned int freq; 469 u8 pstate_id; 470 u8 gpstate_id; 471 }; 472 473 /* 474 * powernv_read_cpu_freq: Reads the current frequency on this CPU. 475 * 476 * Called via smp_call_function. 477 * 478 * Note: The caller of the smp_call_function should pass an argument of 479 * the type 'struct powernv_smp_call_data *' along with this function. 480 * 481 * The current frequency on this CPU will be returned via 482 * ((struct powernv_smp_call_data *)arg)->freq; 483 */ 484 static void powernv_read_cpu_freq(void *arg) 485 { 486 unsigned long pmspr_val; 487 struct powernv_smp_call_data *freq_data = arg; 488 489 pmspr_val = get_pmspr(SPRN_PMSR); 490 freq_data->pstate_id = extract_local_pstate(pmspr_val); 491 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id); 492 493 pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n", 494 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id, 495 freq_data->freq); 496 } 497 498 /* 499 * powernv_cpufreq_get: Returns the CPU frequency as reported by the 500 * firmware for CPU 'cpu'. This value is reported through the sysfs 501 * file cpuinfo_cur_freq. 502 */ 503 static unsigned int powernv_cpufreq_get(unsigned int cpu) 504 { 505 struct powernv_smp_call_data freq_data; 506 507 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq, 508 &freq_data, 1); 509 510 return freq_data.freq; 511 } 512 513 /* 514 * set_pstate: Sets the pstate on this CPU. 515 * 516 * This is called via an smp_call_function. 517 * 518 * The caller must ensure that freq_data is of the type 519 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set 520 * on this CPU should be present in freq_data->pstate_id. 521 */ 522 static void set_pstate(void *data) 523 { 524 unsigned long val; 525 struct powernv_smp_call_data *freq_data = data; 526 unsigned long pstate_ul = freq_data->pstate_id; 527 unsigned long gpstate_ul = freq_data->gpstate_id; 528 529 val = get_pmspr(SPRN_PMCR); 530 val = val & 0x0000FFFFFFFFFFFFULL; 531 532 pstate_ul = pstate_ul & 0xFF; 533 gpstate_ul = gpstate_ul & 0xFF; 534 535 /* Set both global(bits 56..63) and local(bits 48..55) PStates */ 536 val = val | (gpstate_ul << 56) | (pstate_ul << 48); 537 538 pr_debug("Setting cpu %d pmcr to %016lX\n", 539 raw_smp_processor_id(), val); 540 set_pmspr(SPRN_PMCR, val); 541 } 542 543 /* 544 * get_nominal_index: Returns the index corresponding to the nominal 545 * pstate in the cpufreq table 546 */ 547 static inline unsigned int get_nominal_index(void) 548 { 549 return powernv_pstate_info.nominal; 550 } 551 552 static void powernv_cpufreq_throttle_check(void *data) 553 { 554 struct chip *chip; 555 unsigned int cpu = smp_processor_id(); 556 unsigned long pmsr; 557 u8 pmsr_pmax; 558 unsigned int pmsr_pmax_idx; 559 560 pmsr = get_pmspr(SPRN_PMSR); 561 chip = this_cpu_read(chip_info); 562 563 /* Check for Pmax Capping */ 564 pmsr_pmax = extract_max_pstate(pmsr); 565 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax); 566 if (pmsr_pmax_idx != powernv_pstate_info.max) { 567 if (chip->throttled) 568 goto next; 569 chip->throttled = true; 570 if (pmsr_pmax_idx > powernv_pstate_info.nominal) { 571 pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n", 572 cpu, chip->id, pmsr_pmax, 573 idx_to_pstate(powernv_pstate_info.nominal)); 574 chip->throttle_sub_turbo++; 575 } else { 576 chip->throttle_turbo++; 577 } 578 trace_powernv_throttle(chip->id, 579 throttle_reason[chip->throttle_reason], 580 pmsr_pmax); 581 } else if (chip->throttled) { 582 chip->throttled = false; 583 trace_powernv_throttle(chip->id, 584 throttle_reason[chip->throttle_reason], 585 pmsr_pmax); 586 } 587 588 /* Check if Psafe_mode_active is set in PMSR. */ 589 next: 590 if (pmsr & PMSR_PSAFE_ENABLE) { 591 throttled = true; 592 pr_info("Pstate set to safe frequency\n"); 593 } 594 595 /* Check if SPR_EM_DISABLE is set in PMSR */ 596 if (pmsr & PMSR_SPR_EM_DISABLE) { 597 throttled = true; 598 pr_info("Frequency Control disabled from OS\n"); 599 } 600 601 if (throttled) { 602 pr_info("PMSR = %16lx\n", pmsr); 603 pr_warn("CPU Frequency could be throttled\n"); 604 } 605 } 606 607 /** 608 * calc_global_pstate - Calculate global pstate 609 * @elapsed_time: Elapsed time in milliseconds 610 * @local_pstate_idx: New local pstate 611 * @highest_lpstate_idx: pstate from which its ramping down 612 * 613 * Finds the appropriate global pstate based on the pstate from which its 614 * ramping down and the time elapsed in ramping down. It follows a quadratic 615 * equation which ensures that it reaches ramping down to pmin in 5sec. 616 */ 617 static inline int calc_global_pstate(unsigned int elapsed_time, 618 int highest_lpstate_idx, 619 int local_pstate_idx) 620 { 621 int index_diff; 622 623 /* 624 * Using ramp_down_percent we get the percentage of rampdown 625 * that we are expecting to be dropping. Difference between 626 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute 627 * number of how many pstates we will drop eventually by the end of 628 * 5 seconds, then just scale it get the number pstates to be dropped. 629 */ 630 index_diff = ((int)ramp_down_percent(elapsed_time) * 631 (powernv_pstate_info.min - highest_lpstate_idx)) / 100; 632 633 /* Ensure that global pstate is >= to local pstate */ 634 if (highest_lpstate_idx + index_diff >= local_pstate_idx) 635 return local_pstate_idx; 636 else 637 return highest_lpstate_idx + index_diff; 638 } 639 640 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates) 641 { 642 unsigned int timer_interval; 643 644 /* 645 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But 646 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time. 647 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME 648 * seconds of ramp down time. 649 */ 650 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL) 651 > MAX_RAMP_DOWN_TIME) 652 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time; 653 else 654 timer_interval = GPSTATE_TIMER_INTERVAL; 655 656 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval)); 657 } 658 659 /** 660 * gpstate_timer_handler 661 * 662 * @t: Timer context used to fetch global pstate info struct 663 * 664 * This handler brings down the global pstate closer to the local pstate 665 * according quadratic equation. Queues a new timer if it is still not equal 666 * to local pstate 667 */ 668 static void gpstate_timer_handler(struct timer_list *t) 669 { 670 struct global_pstate_info *gpstates = from_timer(gpstates, t, timer); 671 struct cpufreq_policy *policy = gpstates->policy; 672 int gpstate_idx, lpstate_idx; 673 unsigned long val; 674 unsigned int time_diff = jiffies_to_msecs(jiffies) 675 - gpstates->last_sampled_time; 676 struct powernv_smp_call_data freq_data; 677 678 if (!spin_trylock(&gpstates->gpstate_lock)) 679 return; 680 /* 681 * If the timer has migrated to the different cpu then bring 682 * it back to one of the policy->cpus 683 */ 684 if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) { 685 gpstates->timer.expires = jiffies + msecs_to_jiffies(1); 686 add_timer_on(&gpstates->timer, cpumask_first(policy->cpus)); 687 spin_unlock(&gpstates->gpstate_lock); 688 return; 689 } 690 691 /* 692 * If PMCR was last updated was using fast_switch then 693 * We may have wrong in gpstate->last_lpstate_idx 694 * value. Hence, read from PMCR to get correct data. 695 */ 696 val = get_pmspr(SPRN_PMCR); 697 freq_data.gpstate_id = extract_global_pstate(val); 698 freq_data.pstate_id = extract_local_pstate(val); 699 if (freq_data.gpstate_id == freq_data.pstate_id) { 700 reset_gpstates(policy); 701 spin_unlock(&gpstates->gpstate_lock); 702 return; 703 } 704 705 gpstates->last_sampled_time += time_diff; 706 gpstates->elapsed_time += time_diff; 707 708 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 709 gpstate_idx = pstate_to_idx(freq_data.pstate_id); 710 lpstate_idx = gpstate_idx; 711 reset_gpstates(policy); 712 gpstates->highest_lpstate_idx = gpstate_idx; 713 } else { 714 lpstate_idx = pstate_to_idx(freq_data.pstate_id); 715 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 716 gpstates->highest_lpstate_idx, 717 lpstate_idx); 718 } 719 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 720 gpstates->last_gpstate_idx = gpstate_idx; 721 gpstates->last_lpstate_idx = lpstate_idx; 722 /* 723 * If local pstate is equal to global pstate, rampdown is over 724 * So timer is not required to be queued. 725 */ 726 if (gpstate_idx != gpstates->last_lpstate_idx) 727 queue_gpstate_timer(gpstates); 728 729 set_pstate(&freq_data); 730 spin_unlock(&gpstates->gpstate_lock); 731 } 732 733 /* 734 * powernv_cpufreq_target_index: Sets the frequency corresponding to 735 * the cpufreq table entry indexed by new_index on the cpus in the 736 * mask policy->cpus 737 */ 738 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy, 739 unsigned int new_index) 740 { 741 struct powernv_smp_call_data freq_data; 742 unsigned int cur_msec, gpstate_idx; 743 struct global_pstate_info *gpstates = policy->driver_data; 744 745 if (unlikely(rebooting) && new_index != get_nominal_index()) 746 return 0; 747 748 if (!throttled) { 749 /* we don't want to be preempted while 750 * checking if the CPU frequency has been throttled 751 */ 752 preempt_disable(); 753 powernv_cpufreq_throttle_check(NULL); 754 preempt_enable(); 755 } 756 757 cur_msec = jiffies_to_msecs(get_jiffies_64()); 758 759 freq_data.pstate_id = idx_to_pstate(new_index); 760 if (!gpstates) { 761 freq_data.gpstate_id = freq_data.pstate_id; 762 goto no_gpstate; 763 } 764 765 spin_lock(&gpstates->gpstate_lock); 766 767 if (!gpstates->last_sampled_time) { 768 gpstate_idx = new_index; 769 gpstates->highest_lpstate_idx = new_index; 770 goto gpstates_done; 771 } 772 773 if (gpstates->last_gpstate_idx < new_index) { 774 gpstates->elapsed_time += cur_msec - 775 gpstates->last_sampled_time; 776 777 /* 778 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME 779 * we should be resetting all global pstate related data. Set it 780 * equal to local pstate to start fresh. 781 */ 782 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) { 783 reset_gpstates(policy); 784 gpstates->highest_lpstate_idx = new_index; 785 gpstate_idx = new_index; 786 } else { 787 /* Elaspsed_time is less than 5 seconds, continue to rampdown */ 788 gpstate_idx = calc_global_pstate(gpstates->elapsed_time, 789 gpstates->highest_lpstate_idx, 790 new_index); 791 } 792 } else { 793 reset_gpstates(policy); 794 gpstates->highest_lpstate_idx = new_index; 795 gpstate_idx = new_index; 796 } 797 798 /* 799 * If local pstate is equal to global pstate, rampdown is over 800 * So timer is not required to be queued. 801 */ 802 if (gpstate_idx != new_index) 803 queue_gpstate_timer(gpstates); 804 else 805 timer_delete_sync(&gpstates->timer); 806 807 gpstates_done: 808 freq_data.gpstate_id = idx_to_pstate(gpstate_idx); 809 gpstates->last_sampled_time = cur_msec; 810 gpstates->last_gpstate_idx = gpstate_idx; 811 gpstates->last_lpstate_idx = new_index; 812 813 spin_unlock(&gpstates->gpstate_lock); 814 815 no_gpstate: 816 /* 817 * Use smp_call_function to send IPI and execute the 818 * mtspr on target CPU. We could do that without IPI 819 * if current CPU is within policy->cpus (core) 820 */ 821 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1); 822 return 0; 823 } 824 825 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy) 826 { 827 int base, i; 828 struct kernfs_node *kn; 829 struct global_pstate_info *gpstates; 830 831 base = cpu_first_thread_sibling(policy->cpu); 832 833 for (i = 0; i < threads_per_core; i++) 834 cpumask_set_cpu(base + i, policy->cpus); 835 836 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name); 837 if (!kn) { 838 int ret; 839 840 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp); 841 if (ret) { 842 pr_info("Failed to create throttle stats directory for cpu %d\n", 843 policy->cpu); 844 return ret; 845 } 846 } else { 847 kernfs_put(kn); 848 } 849 850 policy->freq_table = powernv_freqs; 851 policy->fast_switch_possible = true; 852 853 if (pvr_version_is(PVR_POWER9)) 854 return 0; 855 856 /* Initialise Gpstate ramp-down timer only on POWER8 */ 857 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL); 858 if (!gpstates) 859 return -ENOMEM; 860 861 policy->driver_data = gpstates; 862 863 /* initialize timer */ 864 gpstates->policy = policy; 865 timer_setup(&gpstates->timer, gpstate_timer_handler, 866 TIMER_PINNED | TIMER_DEFERRABLE); 867 gpstates->timer.expires = jiffies + 868 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL); 869 spin_lock_init(&gpstates->gpstate_lock); 870 871 return 0; 872 } 873 874 static void powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy) 875 { 876 struct powernv_smp_call_data freq_data; 877 struct global_pstate_info *gpstates = policy->driver_data; 878 879 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min); 880 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min); 881 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1); 882 if (gpstates) 883 timer_delete_sync(&gpstates->timer); 884 885 kfree(policy->driver_data); 886 } 887 888 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb, 889 unsigned long action, void *unused) 890 { 891 int cpu; 892 struct cpufreq_policy *cpu_policy; 893 894 rebooting = true; 895 for_each_online_cpu(cpu) { 896 cpu_policy = cpufreq_cpu_get(cpu); 897 if (!cpu_policy) 898 continue; 899 powernv_cpufreq_target_index(cpu_policy, get_nominal_index()); 900 cpufreq_cpu_put(cpu_policy); 901 } 902 903 return NOTIFY_DONE; 904 } 905 906 static struct notifier_block powernv_cpufreq_reboot_nb = { 907 .notifier_call = powernv_cpufreq_reboot_notifier, 908 }; 909 910 static void powernv_cpufreq_work_fn(struct work_struct *work) 911 { 912 struct chip *chip = container_of(work, struct chip, throttle); 913 struct cpufreq_policy *policy; 914 unsigned int cpu; 915 cpumask_t mask; 916 917 cpus_read_lock(); 918 cpumask_and(&mask, &chip->mask, cpu_online_mask); 919 smp_call_function_any(&mask, 920 powernv_cpufreq_throttle_check, NULL, 0); 921 922 if (!chip->restore) 923 goto out; 924 925 chip->restore = false; 926 for_each_cpu(cpu, &mask) { 927 int index; 928 929 policy = cpufreq_cpu_get(cpu); 930 if (!policy) 931 continue; 932 index = cpufreq_table_find_index_c(policy, policy->cur, false); 933 powernv_cpufreq_target_index(policy, index); 934 cpumask_andnot(&mask, &mask, policy->cpus); 935 cpufreq_cpu_put(policy); 936 } 937 out: 938 cpus_read_unlock(); 939 } 940 941 static int powernv_cpufreq_occ_msg(struct notifier_block *nb, 942 unsigned long msg_type, void *_msg) 943 { 944 struct opal_msg *msg = _msg; 945 struct opal_occ_msg omsg; 946 int i; 947 948 if (msg_type != OPAL_MSG_OCC) 949 return 0; 950 951 omsg.type = be64_to_cpu(msg->params[0]); 952 953 switch (omsg.type) { 954 case OCC_RESET: 955 occ_reset = true; 956 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n"); 957 /* 958 * powernv_cpufreq_throttle_check() is called in 959 * target() callback which can detect the throttle state 960 * for governors like ondemand. 961 * But static governors will not call target() often thus 962 * report throttling here. 963 */ 964 if (!throttled) { 965 throttled = true; 966 pr_warn("CPU frequency is throttled for duration\n"); 967 } 968 969 break; 970 case OCC_LOAD: 971 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n"); 972 break; 973 case OCC_THROTTLE: 974 omsg.chip = be64_to_cpu(msg->params[1]); 975 omsg.throttle_status = be64_to_cpu(msg->params[2]); 976 977 if (occ_reset) { 978 occ_reset = false; 979 throttled = false; 980 pr_info("OCC Active, CPU frequency is no longer throttled\n"); 981 982 for (i = 0; i < nr_chips; i++) { 983 chips[i].restore = true; 984 schedule_work(&chips[i].throttle); 985 } 986 987 return 0; 988 } 989 990 for (i = 0; i < nr_chips; i++) 991 if (chips[i].id == omsg.chip) 992 break; 993 994 if (omsg.throttle_status >= 0 && 995 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) { 996 chips[i].throttle_reason = omsg.throttle_status; 997 chips[i].reason[omsg.throttle_status]++; 998 } 999 1000 if (!omsg.throttle_status) 1001 chips[i].restore = true; 1002 1003 schedule_work(&chips[i].throttle); 1004 } 1005 return 0; 1006 } 1007 1008 static struct notifier_block powernv_cpufreq_opal_nb = { 1009 .notifier_call = powernv_cpufreq_occ_msg, 1010 .next = NULL, 1011 .priority = 0, 1012 }; 1013 1014 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy, 1015 unsigned int target_freq) 1016 { 1017 int index; 1018 struct powernv_smp_call_data freq_data; 1019 1020 index = cpufreq_table_find_index_dl(policy, target_freq, false); 1021 freq_data.pstate_id = powernv_freqs[index].driver_data; 1022 freq_data.gpstate_id = powernv_freqs[index].driver_data; 1023 set_pstate(&freq_data); 1024 1025 return powernv_freqs[index].frequency; 1026 } 1027 1028 static struct cpufreq_driver powernv_cpufreq_driver = { 1029 .name = "powernv-cpufreq", 1030 .flags = CPUFREQ_CONST_LOOPS, 1031 .init = powernv_cpufreq_cpu_init, 1032 .exit = powernv_cpufreq_cpu_exit, 1033 .verify = cpufreq_generic_frequency_table_verify, 1034 .target_index = powernv_cpufreq_target_index, 1035 .fast_switch = powernv_fast_switch, 1036 .get = powernv_cpufreq_get, 1037 .attr = powernv_cpu_freq_attr, 1038 }; 1039 1040 static int init_chip_info(void) 1041 { 1042 unsigned int *chip; 1043 unsigned int cpu, i; 1044 unsigned int prev_chip_id = UINT_MAX; 1045 cpumask_t *chip_cpu_mask; 1046 int ret = 0; 1047 1048 chip = kcalloc(num_possible_cpus(), sizeof(*chip), GFP_KERNEL); 1049 if (!chip) 1050 return -ENOMEM; 1051 1052 /* Allocate a chip cpu mask large enough to fit mask for all chips */ 1053 chip_cpu_mask = kcalloc(MAX_NR_CHIPS, sizeof(cpumask_t), GFP_KERNEL); 1054 if (!chip_cpu_mask) { 1055 ret = -ENOMEM; 1056 goto free_and_return; 1057 } 1058 1059 for_each_possible_cpu(cpu) { 1060 unsigned int id = cpu_to_chip_id(cpu); 1061 1062 if (prev_chip_id != id) { 1063 prev_chip_id = id; 1064 chip[nr_chips++] = id; 1065 } 1066 cpumask_set_cpu(cpu, &chip_cpu_mask[nr_chips-1]); 1067 } 1068 1069 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL); 1070 if (!chips) { 1071 ret = -ENOMEM; 1072 goto out_free_chip_cpu_mask; 1073 } 1074 1075 for (i = 0; i < nr_chips; i++) { 1076 chips[i].id = chip[i]; 1077 cpumask_copy(&chips[i].mask, &chip_cpu_mask[i]); 1078 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn); 1079 for_each_cpu(cpu, &chips[i].mask) 1080 per_cpu(chip_info, cpu) = &chips[i]; 1081 } 1082 1083 out_free_chip_cpu_mask: 1084 kfree(chip_cpu_mask); 1085 free_and_return: 1086 kfree(chip); 1087 return ret; 1088 } 1089 1090 static inline void clean_chip_info(void) 1091 { 1092 int i; 1093 1094 /* flush any pending work items */ 1095 if (chips) 1096 for (i = 0; i < nr_chips; i++) 1097 cancel_work_sync(&chips[i].throttle); 1098 kfree(chips); 1099 } 1100 1101 static inline void unregister_all_notifiers(void) 1102 { 1103 opal_message_notifier_unregister(OPAL_MSG_OCC, 1104 &powernv_cpufreq_opal_nb); 1105 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb); 1106 } 1107 1108 static int __init powernv_cpufreq_init(void) 1109 { 1110 int rc = 0; 1111 1112 /* Don't probe on pseries (guest) platforms */ 1113 if (!firmware_has_feature(FW_FEATURE_OPAL)) 1114 return -ENODEV; 1115 1116 /* Discover pstates from device tree and init */ 1117 rc = init_powernv_pstates(); 1118 if (rc) 1119 goto out; 1120 1121 /* Populate chip info */ 1122 rc = init_chip_info(); 1123 if (rc) 1124 goto out; 1125 1126 if (powernv_pstate_info.wof_enabled) 1127 powernv_cpufreq_driver.set_boost = cpufreq_boost_set_sw; 1128 1129 rc = cpufreq_register_driver(&powernv_cpufreq_driver); 1130 if (rc) { 1131 pr_info("Failed to register the cpufreq driver (%d)\n", rc); 1132 goto cleanup; 1133 } 1134 1135 register_reboot_notifier(&powernv_cpufreq_reboot_nb); 1136 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb); 1137 1138 return 0; 1139 cleanup: 1140 clean_chip_info(); 1141 out: 1142 pr_info("Platform driver disabled. System does not support PState control\n"); 1143 return rc; 1144 } 1145 module_init(powernv_cpufreq_init); 1146 1147 static void __exit powernv_cpufreq_exit(void) 1148 { 1149 cpufreq_unregister_driver(&powernv_cpufreq_driver); 1150 unregister_all_notifiers(); 1151 clean_chip_info(); 1152 } 1153 module_exit(powernv_cpufreq_exit); 1154 1155 MODULE_DESCRIPTION("cpufreq driver for IBM/OpenPOWER powernv systems"); 1156 MODULE_LICENSE("GPL"); 1157 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>"); 1158