1 /* 2 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org> 3 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * TODO: Need a big cleanup here. Basically, we need to have different 10 * cpufreq_driver structures for the different type of HW instead of the 11 * current mess. We also need to better deal with the detection of the 12 * type of machine. 13 * 14 */ 15 16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 17 18 #include <linux/module.h> 19 #include <linux/types.h> 20 #include <linux/errno.h> 21 #include <linux/kernel.h> 22 #include <linux/delay.h> 23 #include <linux/sched.h> 24 #include <linux/adb.h> 25 #include <linux/pmu.h> 26 #include <linux/cpufreq.h> 27 #include <linux/init.h> 28 #include <linux/device.h> 29 #include <linux/hardirq.h> 30 #include <linux/of_device.h> 31 #include <asm/prom.h> 32 #include <asm/machdep.h> 33 #include <asm/irq.h> 34 #include <asm/pmac_feature.h> 35 #include <asm/mmu_context.h> 36 #include <asm/sections.h> 37 #include <asm/cputable.h> 38 #include <asm/time.h> 39 #include <asm/mpic.h> 40 #include <asm/keylargo.h> 41 #include <asm/switch_to.h> 42 43 /* WARNING !!! This will cause calibrate_delay() to be called, 44 * but this is an __init function ! So you MUST go edit 45 * init/main.c to make it non-init before enabling DEBUG_FREQ 46 */ 47 #undef DEBUG_FREQ 48 49 extern void low_choose_7447a_dfs(int dfs); 50 extern void low_choose_750fx_pll(int pll); 51 extern void low_sleep_handler(void); 52 53 /* 54 * Currently, PowerMac cpufreq supports only high & low frequencies 55 * that are set by the firmware 56 */ 57 static unsigned int low_freq; 58 static unsigned int hi_freq; 59 static unsigned int cur_freq; 60 static unsigned int sleep_freq; 61 static unsigned long transition_latency; 62 63 /* 64 * Different models uses different mechanisms to switch the frequency 65 */ 66 static int (*set_speed_proc)(int low_speed); 67 static unsigned int (*get_speed_proc)(void); 68 69 /* 70 * Some definitions used by the various speedprocs 71 */ 72 static u32 voltage_gpio; 73 static u32 frequency_gpio; 74 static u32 slew_done_gpio; 75 static int no_schedule; 76 static int has_cpu_l2lve; 77 static int is_pmu_based; 78 79 /* There are only two frequency states for each processor. Values 80 * are in kHz for the time being. 81 */ 82 #define CPUFREQ_HIGH 0 83 #define CPUFREQ_LOW 1 84 85 static struct cpufreq_frequency_table pmac_cpu_freqs[] = { 86 {0, CPUFREQ_HIGH, 0}, 87 {0, CPUFREQ_LOW, 0}, 88 {0, 0, CPUFREQ_TABLE_END}, 89 }; 90 91 static inline void local_delay(unsigned long ms) 92 { 93 if (no_schedule) 94 mdelay(ms); 95 else 96 msleep(ms); 97 } 98 99 #ifdef DEBUG_FREQ 100 static inline void debug_calc_bogomips(void) 101 { 102 /* This will cause a recalc of bogomips and display the 103 * result. We backup/restore the value to avoid affecting the 104 * core cpufreq framework's own calculation. 105 */ 106 unsigned long save_lpj = loops_per_jiffy; 107 calibrate_delay(); 108 loops_per_jiffy = save_lpj; 109 } 110 #endif /* DEBUG_FREQ */ 111 112 /* Switch CPU speed under 750FX CPU control 113 */ 114 static int cpu_750fx_cpu_speed(int low_speed) 115 { 116 u32 hid2; 117 118 if (low_speed == 0) { 119 /* ramping up, set voltage first */ 120 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); 121 /* Make sure we sleep for at least 1ms */ 122 local_delay(10); 123 124 /* tweak L2 for high voltage */ 125 if (has_cpu_l2lve) { 126 hid2 = mfspr(SPRN_HID2); 127 hid2 &= ~0x2000; 128 mtspr(SPRN_HID2, hid2); 129 } 130 } 131 #ifdef CONFIG_6xx 132 low_choose_750fx_pll(low_speed); 133 #endif 134 if (low_speed == 1) { 135 /* tweak L2 for low voltage */ 136 if (has_cpu_l2lve) { 137 hid2 = mfspr(SPRN_HID2); 138 hid2 |= 0x2000; 139 mtspr(SPRN_HID2, hid2); 140 } 141 142 /* ramping down, set voltage last */ 143 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); 144 local_delay(10); 145 } 146 147 return 0; 148 } 149 150 static unsigned int cpu_750fx_get_cpu_speed(void) 151 { 152 if (mfspr(SPRN_HID1) & HID1_PS) 153 return low_freq; 154 else 155 return hi_freq; 156 } 157 158 /* Switch CPU speed using DFS */ 159 static int dfs_set_cpu_speed(int low_speed) 160 { 161 if (low_speed == 0) { 162 /* ramping up, set voltage first */ 163 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); 164 /* Make sure we sleep for at least 1ms */ 165 local_delay(1); 166 } 167 168 /* set frequency */ 169 #ifdef CONFIG_6xx 170 low_choose_7447a_dfs(low_speed); 171 #endif 172 udelay(100); 173 174 if (low_speed == 1) { 175 /* ramping down, set voltage last */ 176 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); 177 local_delay(1); 178 } 179 180 return 0; 181 } 182 183 static unsigned int dfs_get_cpu_speed(void) 184 { 185 if (mfspr(SPRN_HID1) & HID1_DFS) 186 return low_freq; 187 else 188 return hi_freq; 189 } 190 191 192 /* Switch CPU speed using slewing GPIOs 193 */ 194 static int gpios_set_cpu_speed(int low_speed) 195 { 196 int gpio, timeout = 0; 197 198 /* If ramping up, set voltage first */ 199 if (low_speed == 0) { 200 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05); 201 /* Delay is way too big but it's ok, we schedule */ 202 local_delay(10); 203 } 204 205 /* Set frequency */ 206 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0); 207 if (low_speed == ((gpio & 0x01) == 0)) 208 goto skip; 209 210 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio, 211 low_speed ? 0x04 : 0x05); 212 udelay(200); 213 do { 214 if (++timeout > 100) 215 break; 216 local_delay(1); 217 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0); 218 } while((gpio & 0x02) == 0); 219 skip: 220 /* If ramping down, set voltage last */ 221 if (low_speed == 1) { 222 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04); 223 /* Delay is way too big but it's ok, we schedule */ 224 local_delay(10); 225 } 226 227 #ifdef DEBUG_FREQ 228 debug_calc_bogomips(); 229 #endif 230 231 return 0; 232 } 233 234 /* Switch CPU speed under PMU control 235 */ 236 static int pmu_set_cpu_speed(int low_speed) 237 { 238 struct adb_request req; 239 unsigned long save_l2cr; 240 unsigned long save_l3cr; 241 unsigned int pic_prio; 242 unsigned long flags; 243 244 preempt_disable(); 245 246 #ifdef DEBUG_FREQ 247 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1)); 248 #endif 249 pmu_suspend(); 250 251 /* Disable all interrupt sources on openpic */ 252 pic_prio = mpic_cpu_get_priority(); 253 mpic_cpu_set_priority(0xf); 254 255 /* Make sure the decrementer won't interrupt us */ 256 asm volatile("mtdec %0" : : "r" (0x7fffffff)); 257 /* Make sure any pending DEC interrupt occurring while we did 258 * the above didn't re-enable the DEC */ 259 mb(); 260 asm volatile("mtdec %0" : : "r" (0x7fffffff)); 261 262 /* We can now disable MSR_EE */ 263 local_irq_save(flags); 264 265 /* Giveup the FPU & vec */ 266 enable_kernel_fp(); 267 268 #ifdef CONFIG_ALTIVEC 269 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 270 enable_kernel_altivec(); 271 #endif /* CONFIG_ALTIVEC */ 272 273 /* Save & disable L2 and L3 caches */ 274 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ 275 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ 276 277 /* Send the new speed command. My assumption is that this command 278 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep 279 */ 280 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed); 281 while (!req.complete) 282 pmu_poll(); 283 284 /* Prepare the northbridge for the speed transition */ 285 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1); 286 287 /* Call low level code to backup CPU state and recover from 288 * hardware reset 289 */ 290 low_sleep_handler(); 291 292 /* Restore the northbridge */ 293 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0); 294 295 /* Restore L2 cache */ 296 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) 297 _set_L2CR(save_l2cr); 298 /* Restore L3 cache */ 299 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) 300 _set_L3CR(save_l3cr); 301 302 /* Restore userland MMU context */ 303 switch_mmu_context(NULL, current->active_mm, NULL); 304 305 #ifdef DEBUG_FREQ 306 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1)); 307 #endif 308 309 /* Restore low level PMU operations */ 310 pmu_unlock(); 311 312 /* 313 * Restore decrementer; we'll take a decrementer interrupt 314 * as soon as interrupts are re-enabled and the generic 315 * clockevents code will reprogram it with the right value. 316 */ 317 set_dec(1); 318 319 /* Restore interrupts */ 320 mpic_cpu_set_priority(pic_prio); 321 322 /* Let interrupts flow again ... */ 323 local_irq_restore(flags); 324 325 #ifdef DEBUG_FREQ 326 debug_calc_bogomips(); 327 #endif 328 329 pmu_resume(); 330 331 preempt_enable(); 332 333 return 0; 334 } 335 336 static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode) 337 { 338 unsigned long l3cr; 339 static unsigned long prev_l3cr; 340 341 if (speed_mode == CPUFREQ_LOW && 342 cpu_has_feature(CPU_FTR_L3CR)) { 343 l3cr = _get_L3CR(); 344 if (l3cr & L3CR_L3E) { 345 prev_l3cr = l3cr; 346 _set_L3CR(0); 347 } 348 } 349 set_speed_proc(speed_mode == CPUFREQ_LOW); 350 if (speed_mode == CPUFREQ_HIGH && 351 cpu_has_feature(CPU_FTR_L3CR)) { 352 l3cr = _get_L3CR(); 353 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr) 354 _set_L3CR(prev_l3cr); 355 } 356 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq; 357 358 return 0; 359 } 360 361 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu) 362 { 363 return cur_freq; 364 } 365 366 static int pmac_cpufreq_target( struct cpufreq_policy *policy, 367 unsigned int index) 368 { 369 int rc; 370 371 rc = do_set_cpu_speed(policy, index); 372 373 ppc_proc_freq = cur_freq * 1000ul; 374 return rc; 375 } 376 377 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) 378 { 379 return cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency); 380 } 381 382 static u32 read_gpio(struct device_node *np) 383 { 384 const u32 *reg = of_get_property(np, "reg", NULL); 385 u32 offset; 386 387 if (reg == NULL) 388 return 0; 389 /* That works for all keylargos but shall be fixed properly 390 * some day... The problem is that it seems we can't rely 391 * on the "reg" property of the GPIO nodes, they are either 392 * relative to the base of KeyLargo or to the base of the 393 * GPIO space, and the device-tree doesn't help. 394 */ 395 offset = *reg; 396 if (offset < KEYLARGO_GPIO_LEVELS0) 397 offset += KEYLARGO_GPIO_LEVELS0; 398 return offset; 399 } 400 401 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy) 402 { 403 /* Ok, this could be made a bit smarter, but let's be robust for now. We 404 * always force a speed change to high speed before sleep, to make sure 405 * we have appropriate voltage and/or bus speed for the wakeup process, 406 * and to make sure our loops_per_jiffies are "good enough", that is will 407 * not cause too short delays if we sleep in low speed and wake in high 408 * speed.. 409 */ 410 no_schedule = 1; 411 sleep_freq = cur_freq; 412 if (cur_freq == low_freq && !is_pmu_based) 413 do_set_cpu_speed(policy, CPUFREQ_HIGH); 414 return 0; 415 } 416 417 static int pmac_cpufreq_resume(struct cpufreq_policy *policy) 418 { 419 /* If we resume, first check if we have a get() function */ 420 if (get_speed_proc) 421 cur_freq = get_speed_proc(); 422 else 423 cur_freq = 0; 424 425 /* We don't, hrm... we don't really know our speed here, best 426 * is that we force a switch to whatever it was, which is 427 * probably high speed due to our suspend() routine 428 */ 429 do_set_cpu_speed(policy, sleep_freq == low_freq ? 430 CPUFREQ_LOW : CPUFREQ_HIGH); 431 432 ppc_proc_freq = cur_freq * 1000ul; 433 434 no_schedule = 0; 435 return 0; 436 } 437 438 static struct cpufreq_driver pmac_cpufreq_driver = { 439 .verify = cpufreq_generic_frequency_table_verify, 440 .target_index = pmac_cpufreq_target, 441 .get = pmac_cpufreq_get_speed, 442 .init = pmac_cpufreq_cpu_init, 443 .suspend = pmac_cpufreq_suspend, 444 .resume = pmac_cpufreq_resume, 445 .flags = CPUFREQ_PM_NO_WARN, 446 .attr = cpufreq_generic_attr, 447 .name = "powermac", 448 }; 449 450 451 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) 452 { 453 struct device_node *volt_gpio_np = of_find_node_by_name(NULL, 454 "voltage-gpio"); 455 struct device_node *freq_gpio_np = of_find_node_by_name(NULL, 456 "frequency-gpio"); 457 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL, 458 "slewing-done"); 459 const u32 *value; 460 461 /* 462 * Check to see if it's GPIO driven or PMU only 463 * 464 * The way we extract the GPIO address is slightly hackish, but it 465 * works well enough for now. We need to abstract the whole GPIO 466 * stuff sooner or later anyway 467 */ 468 469 if (volt_gpio_np) 470 voltage_gpio = read_gpio(volt_gpio_np); 471 if (freq_gpio_np) 472 frequency_gpio = read_gpio(freq_gpio_np); 473 if (slew_done_gpio_np) 474 slew_done_gpio = read_gpio(slew_done_gpio_np); 475 476 /* If we use the frequency GPIOs, calculate the min/max speeds based 477 * on the bus frequencies 478 */ 479 if (frequency_gpio && slew_done_gpio) { 480 int lenp, rc; 481 const u32 *freqs, *ratio; 482 483 freqs = of_get_property(cpunode, "bus-frequencies", &lenp); 484 lenp /= sizeof(u32); 485 if (freqs == NULL || lenp != 2) { 486 pr_err("bus-frequencies incorrect or missing\n"); 487 return 1; 488 } 489 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2", 490 NULL); 491 if (ratio == NULL) { 492 pr_err("processor-to-bus-ratio*2 missing\n"); 493 return 1; 494 } 495 496 /* Get the min/max bus frequencies */ 497 low_freq = min(freqs[0], freqs[1]); 498 hi_freq = max(freqs[0], freqs[1]); 499 500 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus 501 * frequency, it claims it to be around 84Mhz on some models while 502 * it appears to be approx. 101Mhz on all. Let's hack around here... 503 * fortunately, we don't need to be too precise 504 */ 505 if (low_freq < 98000000) 506 low_freq = 101000000; 507 508 /* Convert those to CPU core clocks */ 509 low_freq = (low_freq * (*ratio)) / 2000; 510 hi_freq = (hi_freq * (*ratio)) / 2000; 511 512 /* Now we get the frequencies, we read the GPIO to see what is out current 513 * speed 514 */ 515 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0); 516 cur_freq = (rc & 0x01) ? hi_freq : low_freq; 517 518 set_speed_proc = gpios_set_cpu_speed; 519 return 1; 520 } 521 522 /* If we use the PMU, look for the min & max frequencies in the 523 * device-tree 524 */ 525 value = of_get_property(cpunode, "min-clock-frequency", NULL); 526 if (!value) 527 return 1; 528 low_freq = (*value) / 1000; 529 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree 530 * here */ 531 if (low_freq < 100000) 532 low_freq *= 10; 533 534 value = of_get_property(cpunode, "max-clock-frequency", NULL); 535 if (!value) 536 return 1; 537 hi_freq = (*value) / 1000; 538 set_speed_proc = pmu_set_cpu_speed; 539 is_pmu_based = 1; 540 541 return 0; 542 } 543 544 static int pmac_cpufreq_init_7447A(struct device_node *cpunode) 545 { 546 struct device_node *volt_gpio_np; 547 548 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL) 549 return 1; 550 551 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select"); 552 if (volt_gpio_np) 553 voltage_gpio = read_gpio(volt_gpio_np); 554 if (!voltage_gpio){ 555 pr_err("missing cpu-vcore-select gpio\n"); 556 return 1; 557 } 558 559 /* OF only reports the high frequency */ 560 hi_freq = cur_freq; 561 low_freq = cur_freq/2; 562 563 /* Read actual frequency from CPU */ 564 cur_freq = dfs_get_cpu_speed(); 565 set_speed_proc = dfs_set_cpu_speed; 566 get_speed_proc = dfs_get_cpu_speed; 567 568 return 0; 569 } 570 571 static int pmac_cpufreq_init_750FX(struct device_node *cpunode) 572 { 573 struct device_node *volt_gpio_np; 574 u32 pvr; 575 const u32 *value; 576 577 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL) 578 return 1; 579 580 hi_freq = cur_freq; 581 value = of_get_property(cpunode, "reduced-clock-frequency", NULL); 582 if (!value) 583 return 1; 584 low_freq = (*value) / 1000; 585 586 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select"); 587 if (volt_gpio_np) 588 voltage_gpio = read_gpio(volt_gpio_np); 589 590 pvr = mfspr(SPRN_PVR); 591 has_cpu_l2lve = !((pvr & 0xf00) == 0x100); 592 593 set_speed_proc = cpu_750fx_cpu_speed; 594 get_speed_proc = cpu_750fx_get_cpu_speed; 595 cur_freq = cpu_750fx_get_cpu_speed(); 596 597 return 0; 598 } 599 600 /* Currently, we support the following machines: 601 * 602 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz) 603 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz) 604 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz) 605 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz) 606 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz) 607 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage) 608 * - Recent MacRISC3 laptops 609 * - All new machines with 7447A CPUs 610 */ 611 static int __init pmac_cpufreq_setup(void) 612 { 613 struct device_node *cpunode; 614 const u32 *value; 615 616 if (strstr(boot_command_line, "nocpufreq")) 617 return 0; 618 619 /* Get first CPU node */ 620 cpunode = of_cpu_device_node_get(0); 621 if (!cpunode) 622 goto out; 623 624 /* Get current cpu clock freq */ 625 value = of_get_property(cpunode, "clock-frequency", NULL); 626 if (!value) 627 goto out; 628 cur_freq = (*value) / 1000; 629 transition_latency = CPUFREQ_ETERNAL; 630 631 /* Check for 7447A based MacRISC3 */ 632 if (of_machine_is_compatible("MacRISC3") && 633 of_get_property(cpunode, "dynamic-power-step", NULL) && 634 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) { 635 pmac_cpufreq_init_7447A(cpunode); 636 transition_latency = 8000000; 637 /* Check for other MacRISC3 machines */ 638 } else if (of_machine_is_compatible("PowerBook3,4") || 639 of_machine_is_compatible("PowerBook3,5") || 640 of_machine_is_compatible("MacRISC3")) { 641 pmac_cpufreq_init_MacRISC3(cpunode); 642 /* Else check for iBook2 500/600 */ 643 } else if (of_machine_is_compatible("PowerBook4,1")) { 644 hi_freq = cur_freq; 645 low_freq = 400000; 646 set_speed_proc = pmu_set_cpu_speed; 647 is_pmu_based = 1; 648 } 649 /* Else check for TiPb 550 */ 650 else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) { 651 hi_freq = cur_freq; 652 low_freq = 500000; 653 set_speed_proc = pmu_set_cpu_speed; 654 is_pmu_based = 1; 655 } 656 /* Else check for TiPb 400 & 500 */ 657 else if (of_machine_is_compatible("PowerBook3,2")) { 658 /* We only know about the 400 MHz and the 500Mhz model 659 * they both have 300 MHz as low frequency 660 */ 661 if (cur_freq < 350000 || cur_freq > 550000) 662 goto out; 663 hi_freq = cur_freq; 664 low_freq = 300000; 665 set_speed_proc = pmu_set_cpu_speed; 666 is_pmu_based = 1; 667 } 668 /* Else check for 750FX */ 669 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000) 670 pmac_cpufreq_init_750FX(cpunode); 671 out: 672 of_node_put(cpunode); 673 if (set_speed_proc == NULL) 674 return -ENODEV; 675 676 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq; 677 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq; 678 ppc_proc_freq = cur_freq * 1000ul; 679 680 pr_info("Registering PowerMac CPU frequency driver\n"); 681 pr_info("Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n", 682 low_freq/1000, hi_freq/1000, cur_freq/1000); 683 684 return cpufreq_register_driver(&pmac_cpufreq_driver); 685 } 686 687 module_init(pmac_cpufreq_setup); 688 689