1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2016 Linaro. 4 * Viresh Kumar <viresh.kumar@linaro.org> 5 */ 6 7 #include <linux/err.h> 8 #include <linux/of.h> 9 #include <linux/of_device.h> 10 #include <linux/platform_device.h> 11 12 #include "cpufreq-dt.h" 13 14 /* 15 * Machines for which the cpufreq device is *always* created, mostly used for 16 * platforms using "operating-points" (V1) property. 17 */ 18 static const struct of_device_id whitelist[] __initconst = { 19 { .compatible = "allwinner,sun4i-a10", }, 20 { .compatible = "allwinner,sun5i-a10s", }, 21 { .compatible = "allwinner,sun5i-a13", }, 22 { .compatible = "allwinner,sun5i-r8", }, 23 { .compatible = "allwinner,sun6i-a31", }, 24 { .compatible = "allwinner,sun6i-a31s", }, 25 { .compatible = "allwinner,sun7i-a20", }, 26 { .compatible = "allwinner,sun8i-a23", }, 27 { .compatible = "allwinner,sun8i-a83t", }, 28 { .compatible = "allwinner,sun8i-h3", }, 29 30 { .compatible = "apm,xgene-shadowcat", }, 31 32 { .compatible = "arm,integrator-ap", }, 33 { .compatible = "arm,integrator-cp", }, 34 35 { .compatible = "hisilicon,hi3660", }, 36 37 { .compatible = "fsl,imx27", }, 38 { .compatible = "fsl,imx51", }, 39 { .compatible = "fsl,imx53", }, 40 41 { .compatible = "marvell,berlin", }, 42 { .compatible = "marvell,pxa250", }, 43 { .compatible = "marvell,pxa270", }, 44 45 { .compatible = "samsung,exynos3250", }, 46 { .compatible = "samsung,exynos4210", }, 47 { .compatible = "samsung,exynos5250", }, 48 #ifndef CONFIG_BL_SWITCHER 49 { .compatible = "samsung,exynos5800", }, 50 #endif 51 52 { .compatible = "renesas,emev2", }, 53 { .compatible = "renesas,r7s72100", }, 54 { .compatible = "renesas,r8a73a4", }, 55 { .compatible = "renesas,r8a7740", }, 56 { .compatible = "renesas,r8a7743", }, 57 { .compatible = "renesas,r8a7744", }, 58 { .compatible = "renesas,r8a7745", }, 59 { .compatible = "renesas,r8a7778", }, 60 { .compatible = "renesas,r8a7779", }, 61 { .compatible = "renesas,r8a7790", }, 62 { .compatible = "renesas,r8a7791", }, 63 { .compatible = "renesas,r8a7792", }, 64 { .compatible = "renesas,r8a7793", }, 65 { .compatible = "renesas,r8a7794", }, 66 { .compatible = "renesas,sh73a0", }, 67 68 { .compatible = "rockchip,rk2928", }, 69 { .compatible = "rockchip,rk3036", }, 70 { .compatible = "rockchip,rk3066a", }, 71 { .compatible = "rockchip,rk3066b", }, 72 { .compatible = "rockchip,rk3188", }, 73 { .compatible = "rockchip,rk3228", }, 74 { .compatible = "rockchip,rk3288", }, 75 { .compatible = "rockchip,rk3328", }, 76 { .compatible = "rockchip,rk3366", }, 77 { .compatible = "rockchip,rk3368", }, 78 { .compatible = "rockchip,rk3399", 79 .data = &(struct cpufreq_dt_platform_data) 80 { .have_governor_per_policy = true, }, 81 }, 82 83 { .compatible = "st-ericsson,u8500", }, 84 { .compatible = "st-ericsson,u8540", }, 85 { .compatible = "st-ericsson,u9500", }, 86 { .compatible = "st-ericsson,u9540", }, 87 88 { .compatible = "ti,omap2", }, 89 { .compatible = "ti,omap3", }, 90 { .compatible = "ti,omap4", }, 91 { .compatible = "ti,omap5", }, 92 93 { .compatible = "xlnx,zynq-7000", }, 94 { .compatible = "xlnx,zynqmp", }, 95 96 { } 97 }; 98 99 /* 100 * Machines for which the cpufreq device is *not* created, mostly used for 101 * platforms using "operating-points-v2" property. 102 */ 103 static const struct of_device_id blacklist[] __initconst = { 104 { .compatible = "calxeda,highbank", }, 105 { .compatible = "calxeda,ecx-2000", }, 106 107 { .compatible = "fsl,imx7d", }, 108 { .compatible = "fsl,imx8mq", }, 109 { .compatible = "fsl,imx8mm", }, 110 111 { .compatible = "marvell,armadaxp", }, 112 113 { .compatible = "mediatek,mt2701", }, 114 { .compatible = "mediatek,mt2712", }, 115 { .compatible = "mediatek,mt7622", }, 116 { .compatible = "mediatek,mt7623", }, 117 { .compatible = "mediatek,mt817x", }, 118 { .compatible = "mediatek,mt8173", }, 119 { .compatible = "mediatek,mt8176", }, 120 121 { .compatible = "nvidia,tegra124", }, 122 { .compatible = "nvidia,tegra210", }, 123 124 { .compatible = "qcom,apq8096", }, 125 { .compatible = "qcom,msm8996", }, 126 127 { .compatible = "st,stih407", }, 128 { .compatible = "st,stih410", }, 129 130 { .compatible = "sigma,tango4", }, 131 132 { .compatible = "ti,am33xx", }, 133 { .compatible = "ti,am43", }, 134 { .compatible = "ti,dra7", }, 135 136 { } 137 }; 138 139 static bool __init cpu0_node_has_opp_v2_prop(void) 140 { 141 struct device_node *np = of_cpu_device_node_get(0); 142 bool ret = false; 143 144 if (of_get_property(np, "operating-points-v2", NULL)) 145 ret = true; 146 147 of_node_put(np); 148 return ret; 149 } 150 151 static int __init cpufreq_dt_platdev_init(void) 152 { 153 struct device_node *np = of_find_node_by_path("/"); 154 const struct of_device_id *match; 155 const void *data = NULL; 156 157 if (!np) 158 return -ENODEV; 159 160 match = of_match_node(whitelist, np); 161 if (match) { 162 data = match->data; 163 goto create_pdev; 164 } 165 166 if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np)) 167 goto create_pdev; 168 169 of_node_put(np); 170 return -ENODEV; 171 172 create_pdev: 173 of_node_put(np); 174 return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt", 175 -1, data, 176 sizeof(struct cpufreq_dt_platform_data))); 177 } 178 device_initcall(cpufreq_dt_platdev_init); 179