xref: /linux/drivers/cpufreq/cpufreq-dt-platdev.c (revision bfd5bb6f90af092aa345b15cd78143956a13c2a8)
1 /*
2  * Copyright (C) 2016 Linaro.
3  * Viresh Kumar <viresh.kumar@linaro.org>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  */
9 
10 #include <linux/err.h>
11 #include <linux/of.h>
12 #include <linux/of_device.h>
13 #include <linux/platform_device.h>
14 
15 #include "cpufreq-dt.h"
16 
17 /*
18  * Machines for which the cpufreq device is *always* created, mostly used for
19  * platforms using "operating-points" (V1) property.
20  */
21 static const struct of_device_id whitelist[] __initconst = {
22 	{ .compatible = "allwinner,sun4i-a10", },
23 	{ .compatible = "allwinner,sun5i-a10s", },
24 	{ .compatible = "allwinner,sun5i-a13", },
25 	{ .compatible = "allwinner,sun5i-r8", },
26 	{ .compatible = "allwinner,sun6i-a31", },
27 	{ .compatible = "allwinner,sun6i-a31s", },
28 	{ .compatible = "allwinner,sun7i-a20", },
29 	{ .compatible = "allwinner,sun8i-a23", },
30 	{ .compatible = "allwinner,sun8i-a83t", },
31 	{ .compatible = "allwinner,sun8i-h3", },
32 
33 	{ .compatible = "apm,xgene-shadowcat", },
34 
35 	{ .compatible = "arm,integrator-ap", },
36 	{ .compatible = "arm,integrator-cp", },
37 
38 	{ .compatible = "hisilicon,hi3660", },
39 
40 	{ .compatible = "fsl,imx27", },
41 	{ .compatible = "fsl,imx51", },
42 	{ .compatible = "fsl,imx53", },
43 	{ .compatible = "fsl,imx7d", },
44 
45 	{ .compatible = "marvell,berlin", },
46 	{ .compatible = "marvell,pxa250", },
47 	{ .compatible = "marvell,pxa270", },
48 
49 	{ .compatible = "samsung,exynos3250", },
50 	{ .compatible = "samsung,exynos4210", },
51 	{ .compatible = "samsung,exynos5250", },
52 #ifndef CONFIG_BL_SWITCHER
53 	{ .compatible = "samsung,exynos5800", },
54 #endif
55 
56 	{ .compatible = "renesas,emev2", },
57 	{ .compatible = "renesas,r7s72100", },
58 	{ .compatible = "renesas,r8a73a4", },
59 	{ .compatible = "renesas,r8a7740", },
60 	{ .compatible = "renesas,r8a7743", },
61 	{ .compatible = "renesas,r8a7745", },
62 	{ .compatible = "renesas,r8a7778", },
63 	{ .compatible = "renesas,r8a7779", },
64 	{ .compatible = "renesas,r8a7790", },
65 	{ .compatible = "renesas,r8a7791", },
66 	{ .compatible = "renesas,r8a7792", },
67 	{ .compatible = "renesas,r8a7793", },
68 	{ .compatible = "renesas,r8a7794", },
69 	{ .compatible = "renesas,sh73a0", },
70 
71 	{ .compatible = "rockchip,rk2928", },
72 	{ .compatible = "rockchip,rk3036", },
73 	{ .compatible = "rockchip,rk3066a", },
74 	{ .compatible = "rockchip,rk3066b", },
75 	{ .compatible = "rockchip,rk3188", },
76 	{ .compatible = "rockchip,rk3228", },
77 	{ .compatible = "rockchip,rk3288", },
78 	{ .compatible = "rockchip,rk3328", },
79 	{ .compatible = "rockchip,rk3366", },
80 	{ .compatible = "rockchip,rk3368", },
81 	{ .compatible = "rockchip,rk3399", },
82 
83 	{ .compatible = "st-ericsson,u8500", },
84 	{ .compatible = "st-ericsson,u8540", },
85 	{ .compatible = "st-ericsson,u9500", },
86 	{ .compatible = "st-ericsson,u9540", },
87 
88 	{ .compatible = "ti,omap2", },
89 	{ .compatible = "ti,omap3", },
90 	{ .compatible = "ti,omap4", },
91 	{ .compatible = "ti,omap5", },
92 
93 	{ .compatible = "xlnx,zynq-7000", },
94 	{ .compatible = "xlnx,zynqmp", },
95 
96 	{ }
97 };
98 
99 /*
100  * Machines for which the cpufreq device is *not* created, mostly used for
101  * platforms using "operating-points-v2" property.
102  */
103 static const struct of_device_id blacklist[] __initconst = {
104 	{ .compatible = "calxeda,highbank", },
105 	{ .compatible = "calxeda,ecx-2000", },
106 
107 	{ .compatible = "marvell,armadaxp", },
108 
109 	{ .compatible = "mediatek,mt2701", },
110 	{ .compatible = "mediatek,mt2712", },
111 	{ .compatible = "mediatek,mt7622", },
112 	{ .compatible = "mediatek,mt7623", },
113 	{ .compatible = "mediatek,mt817x", },
114 	{ .compatible = "mediatek,mt8173", },
115 	{ .compatible = "mediatek,mt8176", },
116 
117 	{ .compatible = "nvidia,tegra124", },
118 
119 	{ .compatible = "qcom,apq8096", },
120 	{ .compatible = "qcom,msm8996", },
121 
122 	{ .compatible = "st,stih407", },
123 	{ .compatible = "st,stih410", },
124 
125 	{ .compatible = "sigma,tango4", },
126 
127 	{ .compatible = "ti,am33xx", },
128 	{ .compatible = "ti,am43", },
129 	{ .compatible = "ti,dra7", },
130 
131 	{ }
132 };
133 
134 static bool __init cpu0_node_has_opp_v2_prop(void)
135 {
136 	struct device_node *np = of_cpu_device_node_get(0);
137 	bool ret = false;
138 
139 	if (of_get_property(np, "operating-points-v2", NULL))
140 		ret = true;
141 
142 	of_node_put(np);
143 	return ret;
144 }
145 
146 static int __init cpufreq_dt_platdev_init(void)
147 {
148 	struct device_node *np = of_find_node_by_path("/");
149 	const struct of_device_id *match;
150 	const void *data = NULL;
151 
152 	if (!np)
153 		return -ENODEV;
154 
155 	match = of_match_node(whitelist, np);
156 	if (match) {
157 		data = match->data;
158 		goto create_pdev;
159 	}
160 
161 	if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np))
162 		goto create_pdev;
163 
164 	of_node_put(np);
165 	return -ENODEV;
166 
167 create_pdev:
168 	of_node_put(np);
169 	return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
170 			       -1, data,
171 			       sizeof(struct cpufreq_dt_platform_data)));
172 }
173 device_initcall(cpufreq_dt_platdev_init);
174