xref: /linux/drivers/clocksource/timer-milbeaut.c (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2018 Socionext Inc.
4  */
5 
6 #include <linux/clk.h>
7 #include <linux/interrupt.h>
8 #include <linux/irq.h>
9 #include <linux/irqreturn.h>
10 #include <linux/sched_clock.h>
11 #include "timer-of.h"
12 
13 #define MLB_TMR_TMCSR_OFS	0x0
14 #define MLB_TMR_TMR_OFS		0x4
15 #define MLB_TMR_TMRLR1_OFS	0x8
16 #define MLB_TMR_TMRLR2_OFS	0xc
17 #define MLB_TMR_REGSZPCH	0x10
18 
19 #define MLB_TMR_TMCSR_OUTL	BIT(5)
20 #define MLB_TMR_TMCSR_RELD	BIT(4)
21 #define MLB_TMR_TMCSR_INTE	BIT(3)
22 #define MLB_TMR_TMCSR_UF	BIT(2)
23 #define MLB_TMR_TMCSR_CNTE	BIT(1)
24 #define MLB_TMR_TMCSR_TRG	BIT(0)
25 
26 #define MLB_TMR_TMCSR_CSL_DIV2	0
27 #define MLB_TMR_DIV_CNT		2
28 
29 #define MLB_TMR_SRC_CH		1
30 #define MLB_TMR_EVT_CH		0
31 
32 #define MLB_TMR_SRC_CH_OFS	(MLB_TMR_REGSZPCH * MLB_TMR_SRC_CH)
33 #define MLB_TMR_EVT_CH_OFS	(MLB_TMR_REGSZPCH * MLB_TMR_EVT_CH)
34 
35 #define MLB_TMR_SRC_TMCSR_OFS	(MLB_TMR_SRC_CH_OFS + MLB_TMR_TMCSR_OFS)
36 #define MLB_TMR_SRC_TMR_OFS	(MLB_TMR_SRC_CH_OFS + MLB_TMR_TMR_OFS)
37 #define MLB_TMR_SRC_TMRLR1_OFS	(MLB_TMR_SRC_CH_OFS + MLB_TMR_TMRLR1_OFS)
38 #define MLB_TMR_SRC_TMRLR2_OFS	(MLB_TMR_SRC_CH_OFS + MLB_TMR_TMRLR2_OFS)
39 
40 #define MLB_TMR_EVT_TMCSR_OFS	(MLB_TMR_EVT_CH_OFS + MLB_TMR_TMCSR_OFS)
41 #define MLB_TMR_EVT_TMR_OFS	(MLB_TMR_EVT_CH_OFS + MLB_TMR_TMR_OFS)
42 #define MLB_TMR_EVT_TMRLR1_OFS	(MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR1_OFS)
43 #define MLB_TMR_EVT_TMRLR2_OFS	(MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR2_OFS)
44 
45 #define MLB_TIMER_RATING	500
46 #define MLB_TIMER_ONESHOT	0
47 #define MLB_TIMER_PERIODIC	1
48 
49 static irqreturn_t mlb_timer_interrupt(int irq, void *dev_id)
50 {
51 	struct clock_event_device *clk = dev_id;
52 	struct timer_of *to = to_timer_of(clk);
53 	u32 val;
54 
55 	val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
56 	val &= ~MLB_TMR_TMCSR_UF;
57 	writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
58 
59 	clk->event_handler(clk);
60 
61 	return IRQ_HANDLED;
62 }
63 
64 static void mlb_evt_timer_start(struct timer_of *to, bool periodic)
65 {
66 	u32 val = MLB_TMR_TMCSR_CSL_DIV2;
67 
68 	val |= MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE;
69 	if (periodic)
70 		val |= MLB_TMR_TMCSR_RELD;
71 	writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
72 }
73 
74 static void mlb_evt_timer_stop(struct timer_of *to)
75 {
76 	u32 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
77 
78 	val &= ~MLB_TMR_TMCSR_CNTE;
79 	writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
80 }
81 
82 static void mlb_evt_timer_register_count(struct timer_of *to, unsigned long cnt)
83 {
84 	writel_relaxed(cnt, timer_of_base(to) + MLB_TMR_EVT_TMRLR1_OFS);
85 }
86 
87 static int mlb_set_state_periodic(struct clock_event_device *clk)
88 {
89 	struct timer_of *to = to_timer_of(clk);
90 
91 	mlb_evt_timer_stop(to);
92 	mlb_evt_timer_register_count(to, to->of_clk.period);
93 	mlb_evt_timer_start(to, MLB_TIMER_PERIODIC);
94 	return 0;
95 }
96 
97 static int mlb_set_state_oneshot(struct clock_event_device *clk)
98 {
99 	struct timer_of *to = to_timer_of(clk);
100 
101 	mlb_evt_timer_stop(to);
102 	mlb_evt_timer_start(to, MLB_TIMER_ONESHOT);
103 	return 0;
104 }
105 
106 static int mlb_set_state_shutdown(struct clock_event_device *clk)
107 {
108 	struct timer_of *to = to_timer_of(clk);
109 
110 	mlb_evt_timer_stop(to);
111 	return 0;
112 }
113 
114 static int mlb_clkevt_next_event(unsigned long event,
115 				   struct clock_event_device *clk)
116 {
117 	struct timer_of *to = to_timer_of(clk);
118 
119 	mlb_evt_timer_stop(to);
120 	mlb_evt_timer_register_count(to, event);
121 	mlb_evt_timer_start(to, MLB_TIMER_ONESHOT);
122 	return 0;
123 }
124 
125 static int mlb_config_clock_source(struct timer_of *to)
126 {
127 	u32 val = MLB_TMR_TMCSR_CSL_DIV2;
128 
129 	writel_relaxed(val, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS);
130 	writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR1_OFS);
131 	writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR2_OFS);
132 	val |= MLB_TMR_TMCSR_RELD | MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG;
133 	writel_relaxed(val, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS);
134 	return 0;
135 }
136 
137 static int mlb_config_clock_event(struct timer_of *to)
138 {
139 	writel_relaxed(0, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
140 	return 0;
141 }
142 
143 static struct timer_of to = {
144 	.flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK,
145 
146 	.clkevt = {
147 		.name = "mlb-clkevt",
148 		.rating = MLB_TIMER_RATING,
149 		.cpumask = cpu_possible_mask,
150 		.features = CLOCK_EVT_FEAT_DYNIRQ | CLOCK_EVT_FEAT_ONESHOT,
151 		.set_state_oneshot = mlb_set_state_oneshot,
152 		.set_state_periodic = mlb_set_state_periodic,
153 		.set_state_shutdown = mlb_set_state_shutdown,
154 		.set_next_event = mlb_clkevt_next_event,
155 	},
156 
157 	.of_irq = {
158 		.flags = IRQF_TIMER | IRQF_IRQPOLL,
159 		.handler = mlb_timer_interrupt,
160 	},
161 };
162 
163 static u64 notrace mlb_timer_sched_read(void)
164 {
165 	return ~readl_relaxed(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS);
166 }
167 
168 static int __init mlb_timer_init(struct device_node *node)
169 {
170 	int ret;
171 	unsigned long rate;
172 
173 	ret = timer_of_init(node, &to);
174 	if (ret)
175 		return ret;
176 
177 	rate = timer_of_rate(&to) / MLB_TMR_DIV_CNT;
178 	mlb_config_clock_source(&to);
179 	clocksource_mmio_init(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS,
180 		node->name, rate, MLB_TIMER_RATING, 32,
181 		clocksource_mmio_readl_down);
182 	sched_clock_register(mlb_timer_sched_read, 32, rate);
183 	mlb_config_clock_event(&to);
184 	clockevents_config_and_register(&to.clkevt, timer_of_rate(&to), 15,
185 		0xffffffff);
186 	return 0;
187 }
188 TIMER_OF_DECLARE(mlb_peritimer, "socionext,milbeaut-timer",
189 		mlb_timer_init);
190