1ae278a93SStephen Warrenconfig CLKSRC_OF 2ae278a93SStephen Warren bool 3ae278a93SStephen Warren 489c0b8e2SRussell Kingconfig CLKSRC_I8253 589c0b8e2SRussell King bool 6442c8176SRussell King 7e6220bdcSThomas Gleixnerconfig CLKEVT_I8253 8e6220bdcSThomas Gleixner bool 9e6220bdcSThomas Gleixner 1015f304b6SRalf Baechleconfig I8253_LOCK 1115f304b6SRalf Baechle bool 1215f304b6SRalf Baechle 1315f304b6SRalf Baechleconfig CLKBLD_I8253 14e6220bdcSThomas Gleixner def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK 1515f304b6SRalf Baechle 16442c8176SRussell Kingconfig CLKSRC_MMIO 17442c8176SRussell King bool 1806c3df49SJamie Iles 1906c3df49SJamie Ilesconfig DW_APB_TIMER 2006c3df49SJamie Iles bool 21489bcceaSMattias Wallin 22cfda5901SDinh Nguyenconfig DW_APB_TIMER_OF 23cfda5901SDinh Nguyen bool 24*1b4eca0fSHeiko Stuebner select DW_APB_TIMER 25cfda5901SDinh Nguyen 266fe9cbd1SGregory CLEMENTconfig ARMADA_370_XP_TIMER 276fe9cbd1SGregory CLEMENT bool 286fe9cbd1SGregory CLEMENT 29119fd635SMaxime Ripardconfig SUN4I_TIMER 30b2ac5d75SMaxime Ripard bool 31b2ac5d75SMaxime Ripard 32ff7ec345STony Priskconfig VT8500_TIMER 33ff7ec345STony Prisk bool 34ff7ec345STony Prisk 354f0f234fSMichal Simekconfig CADENCE_TTC_TIMER 364f0f234fSMichal Simek bool 374f0f234fSMichal Simek 38694e33a7SLinus Walleijconfig CLKSRC_NOMADIK_MTU 39694e33a7SLinus Walleij bool 40694e33a7SLinus Walleij depends on (ARCH_NOMADIK || ARCH_U8500) 41694e33a7SLinus Walleij select CLKSRC_MMIO 42694e33a7SLinus Walleij help 43694e33a7SLinus Walleij Support for Multi Timer Unit. MTU provides access 44694e33a7SLinus Walleij to multiple interrupt generating programmable 45694e33a7SLinus Walleij 32-bit free running decrementing counters. 46694e33a7SLinus Walleij 47694e33a7SLinus Walleijconfig CLKSRC_NOMADIK_MTU_SCHED_CLOCK 48694e33a7SLinus Walleij bool 49694e33a7SLinus Walleij depends on CLKSRC_NOMADIK_MTU 50694e33a7SLinus Walleij help 51694e33a7SLinus Walleij Use the Multi Timer Unit as the sched_clock. 52694e33a7SLinus Walleij 53489bcceaSMattias Wallinconfig CLKSRC_DBX500_PRCMU 54489bcceaSMattias Wallin bool "Clocksource PRCMU Timer" 5529746f48SLinus Walleij depends on UX500_SOC_DB8500 56489bcceaSMattias Wallin default y 57489bcceaSMattias Wallin help 58489bcceaSMattias Wallin Use the always on PRCMU Timer as clocksource 59489bcceaSMattias Wallin 60489bcceaSMattias Wallinconfig CLKSRC_DBX500_PRCMU_SCHED_CLOCK 61489bcceaSMattias Wallin bool "Clocksource PRCMU Timer sched_clock" 62694e33a7SLinus Walleij depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) 63489bcceaSMattias Wallin default y 64489bcceaSMattias Wallin help 65489bcceaSMattias Wallin Use the always on PRCMU Timer as sched_clock 66985c0679SMarc Zyngier 678a4da6e3SMark Rutlandconfig ARM_ARCH_TIMER 688a4da6e3SMark Rutland bool 690583fe47SRob Herring select CLKSRC_OF if OF 70a2c5d4edSJames Hogan 71a2c5d4edSJames Hoganconfig CLKSRC_METAG_GENERIC 72a2c5d4edSJames Hogan def_bool y if METAG 73a2c5d4edSJames Hogan help 74a2c5d4edSJames Hogan This option enables support for the Meta per-thread timers. 756938d75aSThomas Abraham 766938d75aSThomas Abrahamconfig CLKSRC_EXYNOS_MCT 776938d75aSThomas Abraham def_bool y if ARCH_EXYNOS 786938d75aSThomas Abraham help 796938d75aSThomas Abraham Support for Multi Core Timer controller on Exynos SoCs. 80241a9871SArnd Bergmann 81f1189989STomasz Figaconfig CLKSRC_SAMSUNG_PWM 8277d84434STomasz Figa bool 83f1189989STomasz Figa select CLKSRC_MMIO 84f1189989STomasz Figa help 85f1189989STomasz Figa This is a new clocksource driver for the PWM timer found in 86f1189989STomasz Figa Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver 87f1189989STomasz Figa for all devicetree enabled platforms. This driver will be 88f1189989STomasz Figa needed only on systems that do not have the Exynos MCT available. 89