xref: /linux/drivers/clk/versatile/clk-impd1.c (revision b8d312aa075f33282565467662c4628dae0a2aff)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Clock driver for the ARM Integrator/IM-PD1 board
4  * Copyright (C) 2012-2013 Linus Walleij
5  */
6 #include <linux/clk-provider.h>
7 #include <linux/clkdev.h>
8 #include <linux/err.h>
9 #include <linux/io.h>
10 #include <linux/platform_data/clk-integrator.h>
11 
12 #include "icst.h"
13 #include "clk-icst.h"
14 
15 #define IMPD1_OSC1	0x00
16 #define IMPD1_OSC2	0x04
17 #define IMPD1_LOCK	0x08
18 
19 struct impd1_clk {
20 	char *pclkname;
21 	struct clk *pclk;
22 	char *vco1name;
23 	struct clk *vco1clk;
24 	char *vco2name;
25 	struct clk *vco2clk;
26 	struct clk *mmciclk;
27 	char *uartname;
28 	struct clk *uartclk;
29 	char *spiname;
30 	struct clk *spiclk;
31 	char *scname;
32 	struct clk *scclk;
33 	struct clk_lookup *clks[15];
34 };
35 
36 /* One entry for each connected IM-PD1 LM */
37 static struct impd1_clk impd1_clks[4];
38 
39 /*
40  * There are two VCO's on the IM-PD1
41  */
42 
43 static const struct icst_params impd1_vco1_params = {
44 	.ref		= 24000000,	/* 24 MHz */
45 	.vco_max	= ICST525_VCO_MAX_3V,
46 	.vco_min	= ICST525_VCO_MIN,
47 	.vd_min		= 12,
48 	.vd_max		= 519,
49 	.rd_min		= 3,
50 	.rd_max		= 120,
51 	.s2div		= icst525_s2div,
52 	.idx2s		= icst525_idx2s,
53 };
54 
55 static const struct clk_icst_desc impd1_icst1_desc = {
56 	.params = &impd1_vco1_params,
57 	.vco_offset = IMPD1_OSC1,
58 	.lock_offset = IMPD1_LOCK,
59 };
60 
61 static const struct icst_params impd1_vco2_params = {
62 	.ref		= 24000000,	/* 24 MHz */
63 	.vco_max	= ICST525_VCO_MAX_3V,
64 	.vco_min	= ICST525_VCO_MIN,
65 	.vd_min		= 12,
66 	.vd_max		= 519,
67 	.rd_min		= 3,
68 	.rd_max		= 120,
69 	.s2div		= icst525_s2div,
70 	.idx2s		= icst525_idx2s,
71 };
72 
73 static const struct clk_icst_desc impd1_icst2_desc = {
74 	.params = &impd1_vco2_params,
75 	.vco_offset = IMPD1_OSC2,
76 	.lock_offset = IMPD1_LOCK,
77 };
78 
79 /**
80  * integrator_impd1_clk_init() - set up the integrator clock tree
81  * @base: base address of the logic module (LM)
82  * @id: the ID of this LM
83  */
84 void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
85 {
86 	struct impd1_clk *imc;
87 	struct clk *clk;
88 	struct clk *pclk;
89 	int i;
90 
91 	if (id > 3) {
92 		pr_crit("no more than 4 LMs can be attached\n");
93 		return;
94 	}
95 	imc = &impd1_clks[id];
96 
97 	/* Register the fixed rate PCLK */
98 	imc->pclkname = kasprintf(GFP_KERNEL, "lm%x-pclk", id);
99 	pclk = clk_register_fixed_rate(NULL, imc->pclkname, NULL, 0, 0);
100 	imc->pclk = pclk;
101 
102 	imc->vco1name = kasprintf(GFP_KERNEL, "lm%x-vco1", id);
103 	clk = icst_clk_register(NULL, &impd1_icst1_desc, imc->vco1name, NULL,
104 				base);
105 	imc->vco1clk = clk;
106 	imc->clks[0] = clkdev_alloc(pclk, "apb_pclk", "lm%x:01000", id);
107 	imc->clks[1] = clkdev_alloc(clk, NULL, "lm%x:01000", id);
108 
109 	/* VCO2 is also called "CLK2" */
110 	imc->vco2name = kasprintf(GFP_KERNEL, "lm%x-vco2", id);
111 	clk = icst_clk_register(NULL, &impd1_icst2_desc, imc->vco2name, NULL,
112 				base);
113 	imc->vco2clk = clk;
114 
115 	/* MMCI uses CLK2 right off */
116 	imc->clks[2] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00700", id);
117 	imc->clks[3] = clkdev_alloc(clk, NULL, "lm%x:00700", id);
118 
119 	/* UART reference clock divides CLK2 by a fixed factor 4 */
120 	imc->uartname = kasprintf(GFP_KERNEL, "lm%x-uartclk", id);
121 	clk = clk_register_fixed_factor(NULL, imc->uartname, imc->vco2name,
122 				   CLK_IGNORE_UNUSED, 1, 4);
123 	imc->uartclk = clk;
124 	imc->clks[4] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00100", id);
125 	imc->clks[5] = clkdev_alloc(clk, NULL, "lm%x:00100", id);
126 	imc->clks[6] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00200", id);
127 	imc->clks[7] = clkdev_alloc(clk, NULL, "lm%x:00200", id);
128 
129 	/* SPI PL022 clock divides CLK2 by a fixed factor 64 */
130 	imc->spiname = kasprintf(GFP_KERNEL, "lm%x-spiclk", id);
131 	clk = clk_register_fixed_factor(NULL, imc->spiname, imc->vco2name,
132 				   CLK_IGNORE_UNUSED, 1, 64);
133 	imc->clks[8] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00300", id);
134 	imc->clks[9] = clkdev_alloc(clk, NULL, "lm%x:00300", id);
135 
136 	/* The GPIO blocks and AACI have only PCLK */
137 	imc->clks[10] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00400", id);
138 	imc->clks[11] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00500", id);
139 	imc->clks[12] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00800", id);
140 
141 	/* Smart Card clock divides CLK2 by a fixed factor 4 */
142 	imc->scname = kasprintf(GFP_KERNEL, "lm%x-scclk", id);
143 	clk = clk_register_fixed_factor(NULL, imc->scname, imc->vco2name,
144 				   CLK_IGNORE_UNUSED, 1, 4);
145 	imc->scclk = clk;
146 	imc->clks[13] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00600", id);
147 	imc->clks[14] = clkdev_alloc(clk, NULL, "lm%x:00600", id);
148 
149 	for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
150 		clkdev_add(imc->clks[i]);
151 }
152 EXPORT_SYMBOL_GPL(integrator_impd1_clk_init);
153 
154 void integrator_impd1_clk_exit(unsigned int id)
155 {
156 	int i;
157 	struct impd1_clk *imc;
158 
159 	if (id > 3)
160 		return;
161 	imc = &impd1_clks[id];
162 
163 	for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
164 		clkdev_drop(imc->clks[i]);
165 	clk_unregister(imc->spiclk);
166 	clk_unregister(imc->uartclk);
167 	clk_unregister(imc->vco2clk);
168 	clk_unregister(imc->vco1clk);
169 	clk_unregister(imc->pclk);
170 	kfree(imc->scname);
171 	kfree(imc->spiname);
172 	kfree(imc->uartname);
173 	kfree(imc->vco2name);
174 	kfree(imc->vco1name);
175 	kfree(imc->pclkname);
176 }
177 EXPORT_SYMBOL_GPL(integrator_impd1_clk_exit);
178