1 /* 2 * PRCC clock implementation for ux500 platform. 3 * 4 * Copyright (C) 2012 ST-Ericsson SA 5 * Author: Ulf Hansson <ulf.hansson@linaro.org> 6 * 7 * License terms: GNU General Public License (GPL) version 2 8 */ 9 10 #include <linux/clk-provider.h> 11 #include <linux/slab.h> 12 #include <linux/io.h> 13 #include <linux/err.h> 14 #include <linux/types.h> 15 16 #include "clk.h" 17 18 #define PRCC_PCKEN 0x000 19 #define PRCC_PCKDIS 0x004 20 #define PRCC_KCKEN 0x008 21 #define PRCC_KCKDIS 0x00C 22 #define PRCC_PCKSR 0x010 23 #define PRCC_KCKSR 0x014 24 25 #define to_clk_prcc(_hw) container_of(_hw, struct clk_prcc, hw) 26 27 struct clk_prcc { 28 struct clk_hw hw; 29 void __iomem *base; 30 u32 cg_sel; 31 int is_enabled; 32 }; 33 34 /* PRCC clock operations. */ 35 36 static int clk_prcc_pclk_enable(struct clk_hw *hw) 37 { 38 struct clk_prcc *clk = to_clk_prcc(hw); 39 40 writel(clk->cg_sel, (clk->base + PRCC_PCKEN)); 41 while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel)) 42 cpu_relax(); 43 44 clk->is_enabled = 1; 45 return 0; 46 } 47 48 static void clk_prcc_pclk_disable(struct clk_hw *hw) 49 { 50 struct clk_prcc *clk = to_clk_prcc(hw); 51 52 writel(clk->cg_sel, (clk->base + PRCC_PCKDIS)); 53 clk->is_enabled = 0; 54 } 55 56 static int clk_prcc_kclk_enable(struct clk_hw *hw) 57 { 58 struct clk_prcc *clk = to_clk_prcc(hw); 59 60 writel(clk->cg_sel, (clk->base + PRCC_KCKEN)); 61 while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel)) 62 cpu_relax(); 63 64 clk->is_enabled = 1; 65 return 0; 66 } 67 68 static void clk_prcc_kclk_disable(struct clk_hw *hw) 69 { 70 struct clk_prcc *clk = to_clk_prcc(hw); 71 72 writel(clk->cg_sel, (clk->base + PRCC_KCKDIS)); 73 clk->is_enabled = 0; 74 } 75 76 static int clk_prcc_is_enabled(struct clk_hw *hw) 77 { 78 struct clk_prcc *clk = to_clk_prcc(hw); 79 return clk->is_enabled; 80 } 81 82 static struct clk_ops clk_prcc_pclk_ops = { 83 .enable = clk_prcc_pclk_enable, 84 .disable = clk_prcc_pclk_disable, 85 .is_enabled = clk_prcc_is_enabled, 86 }; 87 88 static struct clk_ops clk_prcc_kclk_ops = { 89 .enable = clk_prcc_kclk_enable, 90 .disable = clk_prcc_kclk_disable, 91 .is_enabled = clk_prcc_is_enabled, 92 }; 93 94 static struct clk *clk_reg_prcc(const char *name, 95 const char *parent_name, 96 resource_size_t phy_base, 97 u32 cg_sel, 98 unsigned long flags, 99 struct clk_ops *clk_prcc_ops) 100 { 101 struct clk_prcc *clk; 102 struct clk_init_data clk_prcc_init; 103 struct clk *clk_reg; 104 105 if (!name) { 106 pr_err("clk_prcc: %s invalid arguments passed\n", __func__); 107 return ERR_PTR(-EINVAL); 108 } 109 110 clk = kzalloc(sizeof(struct clk_prcc), GFP_KERNEL); 111 if (!clk) { 112 pr_err("clk_prcc: %s could not allocate clk\n", __func__); 113 return ERR_PTR(-ENOMEM); 114 } 115 116 clk->base = ioremap(phy_base, SZ_4K); 117 if (!clk->base) 118 goto free_clk; 119 120 clk->cg_sel = cg_sel; 121 clk->is_enabled = 1; 122 123 clk_prcc_init.name = name; 124 clk_prcc_init.ops = clk_prcc_ops; 125 clk_prcc_init.flags = flags; 126 clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL); 127 clk_prcc_init.num_parents = (parent_name ? 1 : 0); 128 clk->hw.init = &clk_prcc_init; 129 130 clk_reg = clk_register(NULL, &clk->hw); 131 if (IS_ERR_OR_NULL(clk_reg)) 132 goto unmap_clk; 133 134 return clk_reg; 135 136 unmap_clk: 137 iounmap(clk->base); 138 free_clk: 139 kfree(clk); 140 pr_err("clk_prcc: %s failed to register clk\n", __func__); 141 return ERR_PTR(-ENOMEM); 142 } 143 144 struct clk *clk_reg_prcc_pclk(const char *name, 145 const char *parent_name, 146 resource_size_t phy_base, 147 u32 cg_sel, 148 unsigned long flags) 149 { 150 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags, 151 &clk_prcc_pclk_ops); 152 } 153 154 struct clk *clk_reg_prcc_kclk(const char *name, 155 const char *parent_name, 156 resource_size_t phy_base, 157 u32 cg_sel, 158 unsigned long flags) 159 { 160 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags, 161 &clk_prcc_kclk_ops); 162 } 163