1 /* 2 * clk-dfll.h - prototypes and macros for the Tegra DFLL clocksource driver 3 * Copyright (C) 2013 NVIDIA Corporation. All rights reserved. 4 * 5 * Aleksandr Frid <afrid@nvidia.com> 6 * Paul Walmsley <pwalmsley@nvidia.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 */ 17 18 #ifndef __DRIVERS_CLK_TEGRA_CLK_DFLL_H 19 #define __DRIVERS_CLK_TEGRA_CLK_DFLL_H 20 21 #include <linux/platform_device.h> 22 #include <linux/reset.h> 23 #include <linux/types.h> 24 25 /** 26 * struct tegra_dfll_soc_data - SoC-specific hooks/integration for the DFLL driver 27 * @opp_dev: struct device * that holds the OPP table for the DFLL 28 * @min_millivolts: minimum voltage (in mV) that the DFLL can operate 29 * @tune0_low: DFLL tuning register 0 (low voltage range) 30 * @tune0_high: DFLL tuning register 0 (high voltage range) 31 * @tune1: DFLL tuning register 1 32 * @assert_dvco_reset: fn ptr to place the DVCO in reset 33 * @deassert_dvco_reset: fn ptr to release the DVCO reset 34 * @set_clock_trimmers_high: fn ptr to tune clock trimmers for high voltage 35 * @set_clock_trimmers_low: fn ptr to tune clock trimmers for low voltage 36 */ 37 struct tegra_dfll_soc_data { 38 struct device *dev; 39 unsigned int min_millivolts; 40 u32 tune0_low; 41 u32 tune0_high; 42 u32 tune1; 43 void (*init_clock_trimmers)(void); 44 void (*set_clock_trimmers_high)(void); 45 void (*set_clock_trimmers_low)(void); 46 }; 47 48 int tegra_dfll_register(struct platform_device *pdev, 49 struct tegra_dfll_soc_data *soc); 50 int tegra_dfll_unregister(struct platform_device *pdev); 51 int tegra_dfll_runtime_suspend(struct device *dev); 52 int tegra_dfll_runtime_resume(struct device *dev); 53 54 #endif /* __DRIVERS_CLK_TEGRA_CLK_DFLL_H */ 55