1 /* 2 * Copyright (C) 2013 Emilio López <emilio@elopez.com.ar> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * Adjustable factor-based clock implementation 9 */ 10 11 #include <linux/clk-provider.h> 12 #include <linux/delay.h> 13 #include <linux/err.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/of_address.h> 17 #include <linux/slab.h> 18 #include <linux/string.h> 19 20 #include "clk-factors.h" 21 22 /* 23 * DOC: basic adjustable factor-based clock 24 * 25 * Traits of this clock: 26 * prepare - clk_prepare only ensures that parents are prepared 27 * enable - clk_enable only ensures that parents are enabled 28 * rate - rate is adjustable. 29 * clk->rate = (parent->rate * N * (K + 1) >> P) / (M + 1) 30 * parent - fixed parent. No clk_set_parent support 31 */ 32 33 #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw) 34 35 #define FACTORS_MAX_PARENTS 5 36 37 #define SETMASK(len, pos) (((1U << (len)) - 1) << (pos)) 38 #define CLRMASK(len, pos) (~(SETMASK(len, pos))) 39 #define FACTOR_GET(bit, len, reg) (((reg) & SETMASK(len, bit)) >> (bit)) 40 41 #define FACTOR_SET(bit, len, reg, val) \ 42 (((reg) & CLRMASK(len, bit)) | (val << (bit))) 43 44 static unsigned long clk_factors_recalc_rate(struct clk_hw *hw, 45 unsigned long parent_rate) 46 { 47 u8 n = 1, k = 0, p = 0, m = 0; 48 u32 reg; 49 unsigned long rate; 50 struct clk_factors *factors = to_clk_factors(hw); 51 const struct clk_factors_config *config = factors->config; 52 53 /* Fetch the register value */ 54 reg = readl(factors->reg); 55 56 /* Get each individual factor if applicable */ 57 if (config->nwidth != SUNXI_FACTORS_NOT_APPLICABLE) 58 n = FACTOR_GET(config->nshift, config->nwidth, reg); 59 if (config->kwidth != SUNXI_FACTORS_NOT_APPLICABLE) 60 k = FACTOR_GET(config->kshift, config->kwidth, reg); 61 if (config->mwidth != SUNXI_FACTORS_NOT_APPLICABLE) 62 m = FACTOR_GET(config->mshift, config->mwidth, reg); 63 if (config->pwidth != SUNXI_FACTORS_NOT_APPLICABLE) 64 p = FACTOR_GET(config->pshift, config->pwidth, reg); 65 66 if (factors->recalc) { 67 struct factors_request factors_req = { 68 .parent_rate = parent_rate, 69 .n = n, 70 .k = k, 71 .m = m, 72 .p = p, 73 }; 74 75 /* get mux details from mux clk structure */ 76 if (factors->mux) 77 factors_req.parent_index = 78 (reg >> factors->mux->shift) & 79 factors->mux->mask; 80 81 factors->recalc(&factors_req); 82 83 return factors_req.rate; 84 } 85 86 /* Calculate the rate */ 87 rate = (parent_rate * (n + config->n_start) * (k + 1) >> p) / (m + 1); 88 89 return rate; 90 } 91 92 static int clk_factors_determine_rate(struct clk_hw *hw, 93 struct clk_rate_request *req) 94 { 95 struct clk_factors *factors = to_clk_factors(hw); 96 struct clk_hw *parent, *best_parent = NULL; 97 int i, num_parents; 98 unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0; 99 100 /* find the parent that can help provide the fastest rate <= rate */ 101 num_parents = clk_hw_get_num_parents(hw); 102 for (i = 0; i < num_parents; i++) { 103 struct factors_request factors_req = { 104 .rate = req->rate, 105 .parent_index = i, 106 }; 107 parent = clk_hw_get_parent_by_index(hw, i); 108 if (!parent) 109 continue; 110 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) 111 parent_rate = clk_hw_round_rate(parent, req->rate); 112 else 113 parent_rate = clk_hw_get_rate(parent); 114 115 factors_req.parent_rate = parent_rate; 116 factors->get_factors(&factors_req); 117 child_rate = factors_req.rate; 118 119 if (child_rate <= req->rate && child_rate > best_child_rate) { 120 best_parent = parent; 121 best = parent_rate; 122 best_child_rate = child_rate; 123 } 124 } 125 126 if (!best_parent) 127 return -EINVAL; 128 129 req->best_parent_hw = best_parent; 130 req->best_parent_rate = best; 131 req->rate = best_child_rate; 132 133 return 0; 134 } 135 136 static int clk_factors_set_rate(struct clk_hw *hw, unsigned long rate, 137 unsigned long parent_rate) 138 { 139 struct factors_request req = { 140 .rate = rate, 141 .parent_rate = parent_rate, 142 }; 143 u32 reg; 144 struct clk_factors *factors = to_clk_factors(hw); 145 const struct clk_factors_config *config = factors->config; 146 unsigned long flags = 0; 147 148 factors->get_factors(&req); 149 150 if (factors->lock) 151 spin_lock_irqsave(factors->lock, flags); 152 153 /* Fetch the register value */ 154 reg = readl(factors->reg); 155 156 /* Set up the new factors - macros do not do anything if width is 0 */ 157 reg = FACTOR_SET(config->nshift, config->nwidth, reg, req.n); 158 reg = FACTOR_SET(config->kshift, config->kwidth, reg, req.k); 159 reg = FACTOR_SET(config->mshift, config->mwidth, reg, req.m); 160 reg = FACTOR_SET(config->pshift, config->pwidth, reg, req.p); 161 162 /* Apply them now */ 163 writel(reg, factors->reg); 164 165 /* delay 500us so pll stabilizes */ 166 __delay((rate >> 20) * 500 / 2); 167 168 if (factors->lock) 169 spin_unlock_irqrestore(factors->lock, flags); 170 171 return 0; 172 } 173 174 static const struct clk_ops clk_factors_ops = { 175 .determine_rate = clk_factors_determine_rate, 176 .recalc_rate = clk_factors_recalc_rate, 177 .set_rate = clk_factors_set_rate, 178 }; 179 180 struct clk *sunxi_factors_register(struct device_node *node, 181 const struct factors_data *data, 182 spinlock_t *lock, 183 void __iomem *reg) 184 { 185 struct clk *clk; 186 struct clk_factors *factors; 187 struct clk_gate *gate = NULL; 188 struct clk_mux *mux = NULL; 189 struct clk_hw *gate_hw = NULL; 190 struct clk_hw *mux_hw = NULL; 191 const char *clk_name = node->name; 192 const char *parents[FACTORS_MAX_PARENTS]; 193 int ret, i = 0; 194 195 /* if we have a mux, we will have >1 parents */ 196 i = of_clk_parent_fill(node, parents, FACTORS_MAX_PARENTS); 197 198 /* 199 * some factor clocks, such as pll5 and pll6, may have multiple 200 * outputs, and have their name designated in factors_data 201 */ 202 if (data->name) 203 clk_name = data->name; 204 else 205 of_property_read_string(node, "clock-output-names", &clk_name); 206 207 factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL); 208 if (!factors) 209 goto err_factors; 210 211 /* set up factors properties */ 212 factors->reg = reg; 213 factors->config = data->table; 214 factors->get_factors = data->getter; 215 factors->recalc = data->recalc; 216 factors->lock = lock; 217 218 /* Add a gate if this factor clock can be gated */ 219 if (data->enable) { 220 gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); 221 if (!gate) 222 goto err_gate; 223 224 factors->gate = gate; 225 226 /* set up gate properties */ 227 gate->reg = reg; 228 gate->bit_idx = data->enable; 229 gate->lock = factors->lock; 230 gate_hw = &gate->hw; 231 } 232 233 /* Add a mux if this factor clock can be muxed */ 234 if (data->mux) { 235 mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); 236 if (!mux) 237 goto err_mux; 238 239 factors->mux = mux; 240 241 /* set up gate properties */ 242 mux->reg = reg; 243 mux->shift = data->mux; 244 mux->mask = data->muxmask; 245 mux->lock = factors->lock; 246 mux_hw = &mux->hw; 247 } 248 249 clk = clk_register_composite(NULL, clk_name, 250 parents, i, 251 mux_hw, &clk_mux_ops, 252 &factors->hw, &clk_factors_ops, 253 gate_hw, &clk_gate_ops, 0); 254 if (IS_ERR(clk)) 255 goto err_register; 256 257 ret = of_clk_add_provider(node, of_clk_src_simple_get, clk); 258 if (ret) 259 goto err_provider; 260 261 return clk; 262 263 err_provider: 264 /* TODO: The composite clock stuff will leak a bit here. */ 265 clk_unregister(clk); 266 err_register: 267 kfree(mux); 268 err_mux: 269 kfree(gate); 270 err_gate: 271 kfree(factors); 272 err_factors: 273 return NULL; 274 } 275 276 void sunxi_factors_unregister(struct device_node *node, struct clk *clk) 277 { 278 struct clk_hw *hw = __clk_get_hw(clk); 279 struct clk_factors *factors; 280 const char *name; 281 282 if (!hw) 283 return; 284 285 factors = to_clk_factors(hw); 286 name = clk_hw_get_name(hw); 287 288 of_clk_del_provider(node); 289 /* TODO: The composite clock stuff will leak a bit here. */ 290 clk_unregister(clk); 291 kfree(factors->mux); 292 kfree(factors->gate); 293 kfree(factors); 294 } 295