xref: /linux/drivers/clk/sunxi-ng/ccu_nkmp.h (revision 22d55f02b8922a097cd4be1e2f131dfa7ef65901)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2016 Maxime Ripard. All rights reserved.
4  */
5 
6 #ifndef _CCU_NKMP_H_
7 #define _CCU_NKMP_H_
8 
9 #include <linux/clk-provider.h>
10 
11 #include "ccu_common.h"
12 #include "ccu_div.h"
13 #include "ccu_mult.h"
14 
15 /*
16  * struct ccu_nkmp - Definition of an N-K-M-P clock
17  *
18  * Clocks based on the formula parent * N * K >> P / M
19  */
20 struct ccu_nkmp {
21 	u32			enable;
22 	u32			lock;
23 
24 	struct ccu_mult_internal	n;
25 	struct ccu_mult_internal	k;
26 	struct ccu_div_internal		m;
27 	struct ccu_div_internal		p;
28 
29 	unsigned int		fixed_post_div;
30 	unsigned int		max_rate;
31 
32 	struct ccu_common	common;
33 };
34 
35 #define SUNXI_CCU_NKMP_WITH_GATE_LOCK(_struct, _name, _parent, _reg,	\
36 				      _nshift, _nwidth,			\
37 				      _kshift, _kwidth,			\
38 				      _mshift, _mwidth,			\
39 				      _pshift, _pwidth,			\
40 				      _gate, _lock, _flags)		\
41 	struct ccu_nkmp _struct = {					\
42 		.enable		= _gate,				\
43 		.lock		= _lock,				\
44 		.n		= _SUNXI_CCU_MULT(_nshift, _nwidth),	\
45 		.k		= _SUNXI_CCU_MULT(_kshift, _kwidth),	\
46 		.m		= _SUNXI_CCU_DIV(_mshift, _mwidth),	\
47 		.p		= _SUNXI_CCU_DIV(_pshift, _pwidth),	\
48 		.common		= {					\
49 			.reg		= _reg,				\
50 			.hw.init	= CLK_HW_INIT(_name,		\
51 						      _parent,		\
52 						      &ccu_nkmp_ops,	\
53 						      _flags),		\
54 		},							\
55 	}
56 
57 static inline struct ccu_nkmp *hw_to_ccu_nkmp(struct clk_hw *hw)
58 {
59 	struct ccu_common *common = hw_to_ccu_common(hw);
60 
61 	return container_of(common, struct ccu_nkmp, common);
62 }
63 
64 extern const struct clk_ops ccu_nkmp_ops;
65 
66 #endif /* _CCU_NKMP_H_ */
67