xref: /linux/drivers/clk/sunxi-ng/ccu_mp.c (revision e5c86679d5e864947a52fb31e45a425dea3e7fa9)
1 /*
2  * Copyright (C) 2016 Maxime Ripard
3  * Maxime Ripard <maxime.ripard@free-electrons.com>
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License as
7  * published by the Free Software Foundation; either version 2 of
8  * the License, or (at your option) any later version.
9  */
10 
11 #include <linux/clk-provider.h>
12 
13 #include "ccu_gate.h"
14 #include "ccu_mp.h"
15 
16 static void ccu_mp_find_best(unsigned long parent, unsigned long rate,
17 			     unsigned int max_m, unsigned int max_p,
18 			     unsigned int *m, unsigned int *p)
19 {
20 	unsigned long best_rate = 0;
21 	unsigned int best_m = 0, best_p = 0;
22 	unsigned int _m, _p;
23 
24 	for (_p = 1; _p <= max_p; _p <<= 1) {
25 		for (_m = 1; _m <= max_m; _m++) {
26 			unsigned long tmp_rate = parent / _p / _m;
27 
28 			if (tmp_rate > rate)
29 				continue;
30 
31 			if ((rate - tmp_rate) < (rate - best_rate)) {
32 				best_rate = tmp_rate;
33 				best_m = _m;
34 				best_p = _p;
35 			}
36 		}
37 	}
38 
39 	*m = best_m;
40 	*p = best_p;
41 }
42 
43 static unsigned long ccu_mp_round_rate(struct ccu_mux_internal *mux,
44 				       unsigned long parent_rate,
45 				       unsigned long rate,
46 				       void *data)
47 {
48 	struct ccu_mp *cmp = data;
49 	unsigned int max_m, max_p;
50 	unsigned int m, p;
51 
52 	max_m = cmp->m.max ?: 1 << cmp->m.width;
53 	max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1);
54 
55 	ccu_mp_find_best(parent_rate, rate, max_m, max_p, &m, &p);
56 
57 	return parent_rate / p / m;
58 }
59 
60 static void ccu_mp_disable(struct clk_hw *hw)
61 {
62 	struct ccu_mp *cmp = hw_to_ccu_mp(hw);
63 
64 	return ccu_gate_helper_disable(&cmp->common, cmp->enable);
65 }
66 
67 static int ccu_mp_enable(struct clk_hw *hw)
68 {
69 	struct ccu_mp *cmp = hw_to_ccu_mp(hw);
70 
71 	return ccu_gate_helper_enable(&cmp->common, cmp->enable);
72 }
73 
74 static int ccu_mp_is_enabled(struct clk_hw *hw)
75 {
76 	struct ccu_mp *cmp = hw_to_ccu_mp(hw);
77 
78 	return ccu_gate_helper_is_enabled(&cmp->common, cmp->enable);
79 }
80 
81 static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw,
82 					unsigned long parent_rate)
83 {
84 	struct ccu_mp *cmp = hw_to_ccu_mp(hw);
85 	unsigned int m, p;
86 	u32 reg;
87 
88 	/* Adjust parent_rate according to pre-dividers */
89 	ccu_mux_helper_adjust_parent_for_prediv(&cmp->common, &cmp->mux,
90 						-1, &parent_rate);
91 
92 	reg = readl(cmp->common.base + cmp->common.reg);
93 
94 	m = reg >> cmp->m.shift;
95 	m &= (1 << cmp->m.width) - 1;
96 	m += cmp->m.offset;
97 	if (!m)
98 		m++;
99 
100 	p = reg >> cmp->p.shift;
101 	p &= (1 << cmp->p.width) - 1;
102 
103 	return (parent_rate >> p) / m;
104 }
105 
106 static int ccu_mp_determine_rate(struct clk_hw *hw,
107 				 struct clk_rate_request *req)
108 {
109 	struct ccu_mp *cmp = hw_to_ccu_mp(hw);
110 
111 	return ccu_mux_helper_determine_rate(&cmp->common, &cmp->mux,
112 					     req, ccu_mp_round_rate, cmp);
113 }
114 
115 static int ccu_mp_set_rate(struct clk_hw *hw, unsigned long rate,
116 			   unsigned long parent_rate)
117 {
118 	struct ccu_mp *cmp = hw_to_ccu_mp(hw);
119 	unsigned long flags;
120 	unsigned int max_m, max_p;
121 	unsigned int m, p;
122 	u32 reg;
123 
124 	/* Adjust parent_rate according to pre-dividers */
125 	ccu_mux_helper_adjust_parent_for_prediv(&cmp->common, &cmp->mux,
126 						-1, &parent_rate);
127 
128 	max_m = cmp->m.max ?: 1 << cmp->m.width;
129 	max_p = cmp->p.max ?: 1 << ((1 << cmp->p.width) - 1);
130 
131 	ccu_mp_find_best(parent_rate, rate, max_m, max_p, &m, &p);
132 
133 	spin_lock_irqsave(cmp->common.lock, flags);
134 
135 	reg = readl(cmp->common.base + cmp->common.reg);
136 	reg &= ~GENMASK(cmp->m.width + cmp->m.shift - 1, cmp->m.shift);
137 	reg &= ~GENMASK(cmp->p.width + cmp->p.shift - 1, cmp->p.shift);
138 	reg |= (m - cmp->m.offset) << cmp->m.shift;
139 	reg |= ilog2(p) << cmp->p.shift;
140 
141 	writel(reg, cmp->common.base + cmp->common.reg);
142 
143 	spin_unlock_irqrestore(cmp->common.lock, flags);
144 
145 	return 0;
146 }
147 
148 static u8 ccu_mp_get_parent(struct clk_hw *hw)
149 {
150 	struct ccu_mp *cmp = hw_to_ccu_mp(hw);
151 
152 	return ccu_mux_helper_get_parent(&cmp->common, &cmp->mux);
153 }
154 
155 static int ccu_mp_set_parent(struct clk_hw *hw, u8 index)
156 {
157 	struct ccu_mp *cmp = hw_to_ccu_mp(hw);
158 
159 	return ccu_mux_helper_set_parent(&cmp->common, &cmp->mux, index);
160 }
161 
162 const struct clk_ops ccu_mp_ops = {
163 	.disable	= ccu_mp_disable,
164 	.enable		= ccu_mp_enable,
165 	.is_enabled	= ccu_mp_is_enabled,
166 
167 	.get_parent	= ccu_mp_get_parent,
168 	.set_parent	= ccu_mp_set_parent,
169 
170 	.determine_rate	= ccu_mp_determine_rate,
171 	.recalc_rate	= ccu_mp_recalc_rate,
172 	.set_rate	= ccu_mp_set_rate,
173 };
174