1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright 2016 Chen-Yu Tsai 4 * 5 * Chen-Yu Tsai <wens@csie.org> 6 */ 7 8 #ifndef _CCU_SUN9I_A80_DE_H_ 9 #define _CCU_SUN9I_A80_DE_H_ 10 11 #include <dt-bindings/clock/sun9i-a80-de.h> 12 #include <dt-bindings/reset/sun9i-a80-de.h> 13 14 /* Intermediary clock dividers are not exported */ 15 #define CLK_FE0_DIV 31 16 #define CLK_FE1_DIV 32 17 #define CLK_FE2_DIV 33 18 #define CLK_BE0_DIV 34 19 #define CLK_BE1_DIV 35 20 #define CLK_BE2_DIV 36 21 22 #define CLK_NUMBER (CLK_BE2_DIV + 1) 23 24 #endif /* _CCU_SUN9I_A80_DE_H_ */ 25