1637cee5fSGabriel Fernandez /* SPDX-License-Identifier: GPL-2.0 */ 2637cee5fSGabriel Fernandez /* 3637cee5fSGabriel Fernandez * Copyright (C) STMicroelectronics 2022 - All Rights Reserved 4637cee5fSGabriel Fernandez * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics. 5637cee5fSGabriel Fernandez */ 6637cee5fSGabriel Fernandez 7*fd7a1c90SGabriel Fernandez struct stm32_reset_cfg { 8*fd7a1c90SGabriel Fernandez u16 offset; 9*fd7a1c90SGabriel Fernandez u8 bit_idx; 10*fd7a1c90SGabriel Fernandez bool set_clr; 11*fd7a1c90SGabriel Fernandez }; 12*fd7a1c90SGabriel Fernandez 1330500c2aSGabriel Fernandez struct clk_stm32_reset_data { 1430500c2aSGabriel Fernandez const struct reset_control_ops *ops; 15*fd7a1c90SGabriel Fernandez const struct stm32_reset_cfg **reset_lines; 1630500c2aSGabriel Fernandez unsigned int nr_lines; 1730500c2aSGabriel Fernandez u32 clear_offset; 1830500c2aSGabriel Fernandez }; 1930500c2aSGabriel Fernandez 2030500c2aSGabriel Fernandez int stm32_rcc_reset_init(struct device *dev, struct clk_stm32_reset_data *data, 21637cee5fSGabriel Fernandez void __iomem *base); 22