1*1b72c59dSHaylen Chu /* SPDX-License-Identifier: GPL-2.0-only */
2*1b72c59dSHaylen Chu /*
3*1b72c59dSHaylen Chu * Copyright (c) 2024 SpacemiT Technology Co. Ltd
4*1b72c59dSHaylen Chu * Copyright (c) 2024-2025 Haylen Chu <heylenay@4d2.org>
5*1b72c59dSHaylen Chu */
6*1b72c59dSHaylen Chu
7*1b72c59dSHaylen Chu #ifndef _CCU_COMMON_H_
8*1b72c59dSHaylen Chu #define _CCU_COMMON_H_
9*1b72c59dSHaylen Chu
10*1b72c59dSHaylen Chu #include <linux/regmap.h>
11*1b72c59dSHaylen Chu
12*1b72c59dSHaylen Chu struct ccu_common {
13*1b72c59dSHaylen Chu struct regmap *regmap;
14*1b72c59dSHaylen Chu struct regmap *lock_regmap;
15*1b72c59dSHaylen Chu
16*1b72c59dSHaylen Chu union {
17*1b72c59dSHaylen Chu /* For DDN and MIX */
18*1b72c59dSHaylen Chu struct {
19*1b72c59dSHaylen Chu u32 reg_ctrl;
20*1b72c59dSHaylen Chu u32 reg_fc;
21*1b72c59dSHaylen Chu u32 mask_fc;
22*1b72c59dSHaylen Chu };
23*1b72c59dSHaylen Chu
24*1b72c59dSHaylen Chu /* For PLL */
25*1b72c59dSHaylen Chu struct {
26*1b72c59dSHaylen Chu u32 reg_swcr1;
27*1b72c59dSHaylen Chu u32 reg_swcr3;
28*1b72c59dSHaylen Chu };
29*1b72c59dSHaylen Chu };
30*1b72c59dSHaylen Chu
31*1b72c59dSHaylen Chu struct clk_hw hw;
32*1b72c59dSHaylen Chu };
33*1b72c59dSHaylen Chu
hw_to_ccu_common(struct clk_hw * hw)34*1b72c59dSHaylen Chu static inline struct ccu_common *hw_to_ccu_common(struct clk_hw *hw)
35*1b72c59dSHaylen Chu {
36*1b72c59dSHaylen Chu return container_of(hw, struct ccu_common, hw);
37*1b72c59dSHaylen Chu }
38*1b72c59dSHaylen Chu
39*1b72c59dSHaylen Chu #define ccu_read(c, reg) \
40*1b72c59dSHaylen Chu ({ \
41*1b72c59dSHaylen Chu u32 tmp; \
42*1b72c59dSHaylen Chu regmap_read((c)->regmap, (c)->reg_##reg, &tmp); \
43*1b72c59dSHaylen Chu tmp; \
44*1b72c59dSHaylen Chu })
45*1b72c59dSHaylen Chu #define ccu_update(c, reg, mask, val) \
46*1b72c59dSHaylen Chu regmap_update_bits((c)->regmap, (c)->reg_##reg, mask, val)
47*1b72c59dSHaylen Chu
48*1b72c59dSHaylen Chu #endif /* _CCU_COMMON_H_ */
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