1*1ccea77eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 266314223SDinh Nguyen /* 356c5c13fSDinh Nguyen * Copyright 2011-2012 Calxeda, Inc. 456c5c13fSDinh Nguyen * Copyright (C) 2012-2013 Altera Corporation <www.altera.com> 566314223SDinh Nguyen * 656c5c13fSDinh Nguyen * Based from clk-highbank.c 766314223SDinh Nguyen */ 856c5c13fSDinh Nguyen #include <linux/of.h> 966314223SDinh Nguyen 1097259e99SSteffen Trumtrar #include "clk.h" 1156c5c13fSDinh Nguyen 12a30d27edSDinh Nguyen CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init); 13a30d27edSDinh Nguyen CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init); 14a30d27edSDinh Nguyen CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init); 155343325fSDinh Nguyen CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock", 165343325fSDinh Nguyen socfpga_a10_pll_init); 175343325fSDinh Nguyen CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk", 185343325fSDinh Nguyen socfpga_a10_periph_init); 195343325fSDinh Nguyen CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk", 205343325fSDinh Nguyen socfpga_a10_gate_init); 21