1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 4 * Copyright (c) 2013 Linaro Ltd. 5 * 6 * Common Clock Framework support for all PLL's in Samsung platforms 7 */ 8 9 #ifndef __SAMSUNG_CLK_PLL_H 10 #define __SAMSUNG_CLK_PLL_H 11 12 enum samsung_pll_type { 13 pll_2126, 14 pll_3000, 15 pll_35xx, 16 pll_36xx, 17 pll_2550, 18 pll_2650, 19 pll_4500, 20 pll_4502, 21 pll_4508, 22 pll_4600, 23 pll_4650, 24 pll_4650c, 25 pll_6552, 26 pll_6552_s3c2416, 27 pll_6553, 28 pll_2550x, 29 pll_2550xx, 30 pll_2650x, 31 pll_2650xx, 32 pll_1417x, 33 pll_1450x, 34 pll_1451x, 35 pll_1452x, 36 pll_1460x, 37 pll_0818x, 38 pll_0822x, 39 pll_0831x, 40 pll_142xx, 41 pll_0516x, 42 pll_0517x, 43 pll_0518x, 44 }; 45 46 #define PLL_RATE(_fin, _m, _p, _s, _k, _ks) \ 47 ((u64)(_fin) * (BIT(_ks) * (_m) + (_k)) / BIT(_ks) / ((_p) << (_s))) 48 #define PLL_VALID_RATE(_fin, _fout, _m, _p, _s, _k, _ks) ((_fout) + \ 49 BUILD_BUG_ON_ZERO(PLL_RATE(_fin, _m, _p, _s, _k, _ks) != (_fout))) 50 51 #define PLL_35XX_RATE(_fin, _rate, _m, _p, _s) \ 52 { \ 53 .rate = PLL_VALID_RATE(_fin, _rate, \ 54 _m, _p, _s, 0, 16), \ 55 .mdiv = (_m), \ 56 .pdiv = (_p), \ 57 .sdiv = (_s), \ 58 } 59 60 #define PLL_36XX_RATE(_fin, _rate, _m, _p, _s, _k) \ 61 { \ 62 .rate = PLL_VALID_RATE(_fin, _rate, \ 63 _m, _p, _s, _k, 16), \ 64 .mdiv = (_m), \ 65 .pdiv = (_p), \ 66 .sdiv = (_s), \ 67 .kdiv = (_k), \ 68 } 69 70 #define PLL_4508_RATE(_fin, _rate, _m, _p, _s, _afc) \ 71 { \ 72 .rate = PLL_VALID_RATE(_fin, _rate, \ 73 _m, _p, _s - 1, 0, 16), \ 74 .mdiv = (_m), \ 75 .pdiv = (_p), \ 76 .sdiv = (_s), \ 77 .afc = (_afc), \ 78 } 79 80 #define PLL_4600_RATE(_fin, _rate, _m, _p, _s, _k, _vsel) \ 81 { \ 82 .rate = PLL_VALID_RATE(_fin, _rate, \ 83 _m, _p, _s, _k, 16), \ 84 .mdiv = (_m), \ 85 .pdiv = (_p), \ 86 .sdiv = (_s), \ 87 .kdiv = (_k), \ 88 .vsel = (_vsel), \ 89 } 90 91 #define PLL_4650_RATE(_fin, _rate, _m, _p, _s, _k, _mfr, _mrr, _vsel) \ 92 { \ 93 .rate = PLL_VALID_RATE(_fin, _rate, \ 94 _m, _p, _s, _k, 10), \ 95 .mdiv = (_m), \ 96 .pdiv = (_p), \ 97 .sdiv = (_s), \ 98 .kdiv = (_k), \ 99 .mfr = (_mfr), \ 100 .mrr = (_mrr), \ 101 .vsel = (_vsel), \ 102 } 103 104 /* NOTE: Rate table should be kept sorted in descending order. */ 105 106 struct samsung_pll_rate_table { 107 unsigned int rate; 108 unsigned int pdiv; 109 unsigned int mdiv; 110 unsigned int sdiv; 111 unsigned int kdiv; 112 unsigned int afc; 113 unsigned int mfr; 114 unsigned int mrr; 115 unsigned int vsel; 116 }; 117 118 #endif /* __SAMSUNG_CLK_PLL_H */ 119