1 /* 2 * Copyright 2015 Heiko Stuebner <heiko@sntech.de> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <linux/slab.h> 16 #include <linux/clk-provider.h> 17 #include <linux/io.h> 18 #include <linux/spinlock.h> 19 #include <linux/kernel.h> 20 #include "clk.h" 21 22 struct rockchip_inv_clock { 23 struct clk_hw hw; 24 void __iomem *reg; 25 int shift; 26 int flags; 27 spinlock_t *lock; 28 }; 29 30 #define to_inv_clock(_hw) container_of(_hw, struct rockchip_inv_clock, hw) 31 32 #define INVERTER_MASK 0x1 33 34 static int rockchip_inv_get_phase(struct clk_hw *hw) 35 { 36 struct rockchip_inv_clock *inv_clock = to_inv_clock(hw); 37 u32 val; 38 39 val = readl(inv_clock->reg) >> inv_clock->shift; 40 val &= INVERTER_MASK; 41 return val ? 180 : 0; 42 } 43 44 static int rockchip_inv_set_phase(struct clk_hw *hw, int degrees) 45 { 46 struct rockchip_inv_clock *inv_clock = to_inv_clock(hw); 47 u32 val; 48 49 if (degrees % 180 == 0) { 50 val = !!degrees; 51 } else { 52 pr_err("%s: unsupported phase %d for %s\n", 53 __func__, degrees, clk_hw_get_name(hw)); 54 return -EINVAL; 55 } 56 57 if (inv_clock->flags & ROCKCHIP_INVERTER_HIWORD_MASK) { 58 writel(HIWORD_UPDATE(val, INVERTER_MASK, inv_clock->shift), 59 inv_clock->reg); 60 } else { 61 unsigned long flags; 62 u32 reg; 63 64 spin_lock_irqsave(inv_clock->lock, flags); 65 66 reg = readl(inv_clock->reg); 67 reg &= ~BIT(inv_clock->shift); 68 reg |= val; 69 writel(reg, inv_clock->reg); 70 71 spin_unlock_irqrestore(inv_clock->lock, flags); 72 } 73 74 return 0; 75 } 76 77 static const struct clk_ops rockchip_inv_clk_ops = { 78 .get_phase = rockchip_inv_get_phase, 79 .set_phase = rockchip_inv_set_phase, 80 }; 81 82 struct clk *rockchip_clk_register_inverter(const char *name, 83 const char *const *parent_names, u8 num_parents, 84 void __iomem *reg, int shift, int flags, 85 spinlock_t *lock) 86 { 87 struct clk_init_data init; 88 struct rockchip_inv_clock *inv_clock; 89 struct clk *clk; 90 91 inv_clock = kmalloc(sizeof(*inv_clock), GFP_KERNEL); 92 if (!inv_clock) 93 return ERR_PTR(-ENOMEM); 94 95 init.name = name; 96 init.num_parents = num_parents; 97 init.flags = CLK_SET_RATE_PARENT; 98 init.parent_names = parent_names; 99 init.ops = &rockchip_inv_clk_ops; 100 101 inv_clock->hw.init = &init; 102 inv_clock->reg = reg; 103 inv_clock->shift = shift; 104 inv_clock->flags = flags; 105 inv_clock->lock = lock; 106 107 clk = clk_register(NULL, &inv_clock->hw); 108 if (IS_ERR(clk)) 109 kfree(inv_clock); 110 111 return clk; 112 } 113