1# SPDX-License-Identifier: GPL-2.0 2# 3# Rockchip Clock specific Makefile 4# 5 6obj-y += clk.o 7obj-y += clk-pll.o 8obj-y += clk-cpu.o 9obj-y += clk-half-divider.o 10obj-y += clk-inverter.o 11obj-y += clk-mmc-phase.o 12obj-y += clk-muxgrf.o 13obj-y += clk-ddr.o 14obj-$(CONFIG_RESET_CONTROLLER) += softrst.o 15 16obj-y += clk-px30.o 17obj-y += clk-rv1108.o 18obj-y += clk-rk3036.o 19obj-y += clk-rk3128.o 20obj-y += clk-rk3188.o 21obj-y += clk-rk3228.o 22obj-y += clk-rk3288.o 23obj-y += clk-rk3308.o 24obj-y += clk-rk3328.o 25obj-y += clk-rk3368.o 26obj-y += clk-rk3399.o 27