1# SPDX-License-Identifier: GPL-2.0 2# 3# Rockchip Clock specific Makefile 4# 5 6obj-$(CONFIG_COMMON_CLK_ROCKCHIP) += clk-rockchip.o 7 8clk-rockchip-y += clk.o 9clk-rockchip-y += clk-pll.o 10clk-rockchip-y += clk-cpu.o 11clk-rockchip-y += clk-gate-grf.o 12clk-rockchip-y += clk-half-divider.o 13clk-rockchip-y += clk-inverter.o 14clk-rockchip-y += clk-mmc-phase.o 15clk-rockchip-y += clk-muxgrf.o 16clk-rockchip-y += clk-ddr.o 17clk-rockchip-y += gate-link.o 18clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o 19 20obj-$(CONFIG_CLK_PX30) += clk-px30.o 21obj-$(CONFIG_CLK_RV1103B) += clk-rv1103b.o 22obj-$(CONFIG_CLK_RV1106) += clk-rv1106.o 23obj-$(CONFIG_CLK_RV110X) += clk-rv1108.o 24obj-$(CONFIG_CLK_RV1126) += clk-rv1126.o 25obj-$(CONFIG_CLK_RV1126B) += clk-rv1126b.o rst-rv1126b.o 26obj-$(CONFIG_CLK_RK3036) += clk-rk3036.o 27obj-$(CONFIG_CLK_RK312X) += clk-rk3128.o 28obj-$(CONFIG_CLK_RK3188) += clk-rk3188.o 29obj-$(CONFIG_CLK_RK322X) += clk-rk3228.o 30obj-$(CONFIG_CLK_RK3288) += clk-rk3288.o 31obj-$(CONFIG_CLK_RK3308) += clk-rk3308.o 32obj-$(CONFIG_CLK_RK3328) += clk-rk3328.o 33obj-$(CONFIG_CLK_RK3368) += clk-rk3368.o 34obj-$(CONFIG_CLK_RK3399) += clk-rk3399.o 35obj-$(CONFIG_CLK_RK3506) += clk-rk3506.o rst-rk3506.o 36obj-$(CONFIG_CLK_RK3528) += clk-rk3528.o rst-rk3528.o 37obj-$(CONFIG_CLK_RK3562) += clk-rk3562.o rst-rk3562.o 38obj-$(CONFIG_CLK_RK3568) += clk-rk3568.o 39obj-$(CONFIG_CLK_RK3576) += clk-rk3576.o rst-rk3576.o 40obj-$(CONFIG_CLK_RK3588) += clk-rk3588.o rst-rk3588.o 41